IB/mlx5: Modify MAD reading counters method to use counter registers
Modify mlx5_ib_process_mad to use PPCNT and query_vport commands instead of MAD_IFC, as MAD_IFC is deprecated on new firmware versions (and doesn't support RoCE anyway). Traffic counters exist in both 32-bit and 64-bit forms. Declaring support of extended coutners results in traffic counters to be read in their 64-bit form only via the query_vport command. Error counters exist only in 32-bit form and read via PPCNT command. This commit also adds counters support in RoCE. Signed-off-by: Meny Yossefi <menyy@mellanox.com> Signed-off-by: Majd Dibbiny <majd@mellanox.com> Reviewed-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -31,8 +31,10 @@
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*/
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#include <linux/mlx5/cmd.h>
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#include <linux/mlx5/vport.h>
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#include <rdma/ib_mad.h>
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#include <rdma/ib_smi.h>
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#include <rdma/ib_pma.h>
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#include "mlx5_ib.h"
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enum {
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@ -57,20 +59,12 @@ int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, int ignore_bkey,
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return mlx5_core_mad_ifc(dev->mdev, in_mad, response_mad, op_modifier, port);
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}
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int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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static int process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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const struct ib_wc *in_wc, const struct ib_grh *in_grh,
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const struct ib_mad_hdr *in, size_t in_mad_size,
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struct ib_mad_hdr *out, size_t *out_mad_size,
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u16 *out_mad_pkey_index)
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const struct ib_mad *in_mad, struct ib_mad *out_mad)
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{
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u16 slid;
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int err;
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const struct ib_mad *in_mad = (const struct ib_mad *)in;
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struct ib_mad *out_mad = (struct ib_mad *)out;
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if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
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*out_mad_size != sizeof(*out_mad)))
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return IB_MAD_RESULT_FAILURE;
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slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
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@ -117,6 +111,156 @@ int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
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}
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static void pma_cnt_ext_assign(struct ib_pma_portcounters_ext *pma_cnt_ext,
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void *out)
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{
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#define MLX5_SUM_CNT(p, cntr1, cntr2) \
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(MLX5_GET64(query_vport_counter_out, p, cntr1) + \
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MLX5_GET64(query_vport_counter_out, p, cntr2))
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pma_cnt_ext->port_xmit_data =
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cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.octets,
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transmitted_ib_multicast.octets) >> 2);
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pma_cnt_ext->port_xmit_data =
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cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.octets,
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received_ib_multicast.octets) >> 2);
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pma_cnt_ext->port_xmit_packets =
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cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.packets,
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transmitted_ib_multicast.packets));
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pma_cnt_ext->port_rcv_packets =
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cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.packets,
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received_ib_multicast.packets));
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pma_cnt_ext->port_unicast_xmit_packets =
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MLX5_GET64_BE(query_vport_counter_out,
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out, transmitted_ib_unicast.packets);
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pma_cnt_ext->port_unicast_rcv_packets =
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MLX5_GET64_BE(query_vport_counter_out,
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out, received_ib_unicast.packets);
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pma_cnt_ext->port_multicast_xmit_packets =
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MLX5_GET64_BE(query_vport_counter_out,
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out, transmitted_ib_multicast.packets);
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pma_cnt_ext->port_multicast_rcv_packets =
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MLX5_GET64_BE(query_vport_counter_out,
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out, received_ib_multicast.packets);
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}
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static void pma_cnt_assign(struct ib_pma_portcounters *pma_cnt,
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void *out)
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{
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/* Traffic counters will be reported in
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* their 64bit form via ib_pma_portcounters_ext by default.
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*/
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void *out_pma = MLX5_ADDR_OF(ppcnt_reg, out,
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counter_set);
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#define MLX5_ASSIGN_PMA_CNTR(counter_var, counter_name) { \
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counter_var = MLX5_GET_BE(typeof(counter_var), \
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ib_port_cntrs_grp_data_layout, \
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out_pma, counter_name); \
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}
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MLX5_ASSIGN_PMA_CNTR(pma_cnt->symbol_error_counter,
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symbol_error_counter);
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MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_error_recovery_counter,
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link_error_recovery_counter);
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MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_downed_counter,
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link_downed_counter);
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MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_errors,
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port_rcv_errors);
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MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_remphys_errors,
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port_rcv_remote_physical_errors);
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MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_switch_relay_errors,
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port_rcv_switch_relay_errors);
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MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_discards,
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port_xmit_discards);
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MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_constraint_errors,
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port_xmit_constraint_errors);
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MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_constraint_errors,
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port_rcv_constraint_errors);
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MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_overrun_errors,
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link_overrun_errors);
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MLX5_ASSIGN_PMA_CNTR(pma_cnt->vl15_dropped,
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vl_15_dropped);
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}
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static int process_pma_cmd(struct ib_device *ibdev, u8 port_num,
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const struct ib_mad *in_mad, struct ib_mad *out_mad)
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{
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struct mlx5_ib_dev *dev = to_mdev(ibdev);
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int err;
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void *out_cnt;
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/* Decalring support of extended counters */
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if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO) {
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struct ib_class_port_info cpi = {};
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cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
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memcpy((out_mad->data + 40), &cpi, sizeof(cpi));
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return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
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}
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if (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT) {
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struct ib_pma_portcounters_ext *pma_cnt_ext =
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(struct ib_pma_portcounters_ext *)(out_mad->data + 40);
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int sz = MLX5_ST_SZ_BYTES(query_vport_counter_out);
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out_cnt = mlx5_vzalloc(sz);
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if (!out_cnt)
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return IB_MAD_RESULT_FAILURE;
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err = mlx5_core_query_vport_counter(dev->mdev, 0,
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port_num, out_cnt, sz);
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if (!err)
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pma_cnt_ext_assign(pma_cnt_ext, out_cnt);
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} else {
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struct ib_pma_portcounters *pma_cnt =
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(struct ib_pma_portcounters *)(out_mad->data + 40);
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int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
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out_cnt = mlx5_vzalloc(sz);
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if (!out_cnt)
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return IB_MAD_RESULT_FAILURE;
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err = mlx5_core_query_ib_ppcnt(dev->mdev, port_num,
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out_cnt, sz);
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if (!err)
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pma_cnt_assign(pma_cnt, out_cnt);
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}
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kvfree(out_cnt);
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if (err)
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return IB_MAD_RESULT_FAILURE;
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return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
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}
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int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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const struct ib_wc *in_wc, const struct ib_grh *in_grh,
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const struct ib_mad_hdr *in, size_t in_mad_size,
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struct ib_mad_hdr *out, size_t *out_mad_size,
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u16 *out_mad_pkey_index)
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{
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struct mlx5_ib_dev *dev = to_mdev(ibdev);
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struct mlx5_core_dev *mdev = dev->mdev;
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const struct ib_mad *in_mad = (const struct ib_mad *)in;
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struct ib_mad *out_mad = (struct ib_mad *)out;
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if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
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*out_mad_size != sizeof(*out_mad)))
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return IB_MAD_RESULT_FAILURE;
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memset(out_mad->data, 0, sizeof(out_mad->data));
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if (MLX5_CAP_GEN(mdev, vport_counters) &&
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in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
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in_mad->mad_hdr.method == IB_MGMT_METHOD_GET) {
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return process_pma_cmd(ibdev, port_num, in_mad, out_mad);
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} else {
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return process_mad(ibdev, mad_flags, port_num, in_wc, in_grh,
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in_mad, out_mad);
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}
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}
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int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port)
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{
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struct ib_smp *in_mad = NULL;
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@ -105,6 +105,29 @@ __mlx5_mask(typ, fld))
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___t; \
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})
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/* Big endian getters */
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#define MLX5_GET64_BE(typ, p, fld) (*((__be64 *)(p) +\
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__mlx5_64_off(typ, fld)))
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#define MLX5_GET_BE(type_t, typ, p, fld) ({ \
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type_t tmp; \
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switch (sizeof(tmp)) { \
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case sizeof(u8): \
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tmp = (__force type_t)MLX5_GET(typ, p, fld); \
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break; \
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case sizeof(u16): \
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tmp = (__force type_t)cpu_to_be16(MLX5_GET(typ, p, fld)); \
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break; \
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case sizeof(u32): \
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tmp = (__force type_t)cpu_to_be32(MLX5_GET(typ, p, fld)); \
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break; \
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case sizeof(u64): \
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tmp = (__force type_t)MLX5_GET64_BE(typ, p, fld); \
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break; \
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} \
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tmp; \
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})
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enum {
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MLX5_MAX_COMMANDS = 32,
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MLX5_CMD_DATA_BLOCK_SIZE = 512,
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