Memory controller drivers for v5.20
Add MediaTek MT6795 Helio X10 SMI support. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmK1ctQQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1xiKEACG8M1wlmgTXsVOZ8DlBvKJXRrQZV2nSRDb NTyUki0OCjugfSelJPgmi0GIloykSsPTrl0lSnmv9er6CmnitvhCukwT71aHa1ql yi+MuKKY8gW9Akdhp+tzRlmX1A5jDbf2O2xZTCMxeei6eiIhI+IIUQ8Tl6mGWJ3G 0uvAJAgDANhOH66qSJzSiRE/E8eAF2vAdUKpvl2XVIvY/TbX+kB+G9Nm3mi/bXsp PxMvQSOyWYf/+iarDMiYgpABtOONXSSkhxH7xT+aPLCrINesxY0CldJw3lFPPPVl Ay2/cwyN/RsgwmHumBn4OtYttsGn2W+ahpVyLYsrlxFkAYk8Xgj89Llcj8qho4oO 2Cku+AjuzL054sQrnioU3gHTWF4EaacgOmWhFiWF+WTWfxhYgbj6r5iV7uPIqhDy M3lLuyF6LjuQqVQl2LrzPWW8WLVIUAW+5JCs3RnH02nbODXsGQbX6SvwtCt90oEM 3CMzhGfQf3ckxxhj8DToNht2UV0ptvvZGy1BdLI4HWUV+46CXMwdFB+GcmYNxKsD 949P/bQmk7Ahb2fDEefJc0MaPmhhWZjqy6R1RCf1HIbRu/1XTzzu5wZ8Hi+aBMlj tUd7J3SINCR7NpUAqhZKOWpy4FRpqM3dsuxL8jVj8ZQ93HTay/3lJAda25j2N1zA 0d1hFOeasg== =q3mn -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmK/X4cACgkQmmx57+YA GNlp3xAAhtq3N39aw2XkkMAfK+hLKH15yBFi1VSj1l2sbln8uiYobQFp8XaIdkSP ZT/dwCkgvvcXkttDoTA0oAOjsRrXz0Vgktvz+D6JHOImbfPcnNS8OH3Z6ZRM6u/l KN1U5GyemlrluNYjWAvI3RTWSQxYmpk/5d5yYsGGfCxxJmkTAjkTNj/HgQpYOIIh RmkuGN9Gg+eJ3VNrwUPIdb7xWJUJWFZLJAiok36MCQLwUZ9Zpw6lqlluZ+DHMG9f P41WDvCw3Z4hP/zkYUWPAKN7URenXRFqNx18laKDGrlqXvLPks3GSporNRdRNhxp 9I69jy29WKxiGC2WrRkIzuOO29OOX96obwt1QTzgx/C6RF0xAjenvReoGJNbBmp+ N+qWYZVavC1pzz2SHcmFX7p0wU4kdUZeY5PYTCerOf5YmCEf8wz8CaTWRAzaPEqX fx9LM6wJCKjcfu1rzyDtpqzGS/+L5/Ffh76TWHLFodqjsEbF1B4D8IAGtJNjn5cZ OGRvQfayarQcofB5klXeIiZXpZxtBf6qTC736sBKtXpoTDQevP4sd2qgvSU3TjlC FcNIwGGYnnFpERZmdODVevFCK59mZCs0T823YNbug32xc+Fzzhc9yrcEUNtpZ71m dpjdX1nJ+EqaVLE73lBhMhkoNRtT2sj0mjkHiZGOCTUajzhyDpY= =mBKt -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.20 Add MediaTek MT6795 Helio X10 SMI support. * tag 'memory-controller-drv-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: mtk-smi: Add support for MT6795 Helio X10 dt-bindings: memory: mtk-smi: Add MT6795 Helio X10 bindings Link: https://lore.kernel.org/r/20220624081828.33649-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
3ed9222ce7
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@ -32,6 +32,7 @@ properties:
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- mediatek,mt2701-smi-common
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- mediatek,mt2712-smi-common
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- mediatek,mt6779-smi-common
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- mediatek,mt6795-smi-common
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- mediatek,mt8167-smi-common
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- mediatek,mt8173-smi-common
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- mediatek,mt8183-smi-common
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@ -20,6 +20,7 @@ properties:
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- mediatek,mt2701-smi-larb
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- mediatek,mt2712-smi-larb
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- mediatek,mt6779-smi-larb
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- mediatek,mt6795-smi-larb
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- mediatek,mt8167-smi-larb
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- mediatek,mt8173-smi-larb
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- mediatek,mt8183-smi-larb
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@ -21,11 +21,13 @@
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/* SMI COMMON */
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#define SMI_L1LEN 0x100
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#define SMI_L1_ARB 0x200
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#define SMI_BUS_SEL 0x220
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#define SMI_BUS_LARB_SHIFT(larbid) ((larbid) << 1)
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/* All are MMU0 defaultly. Only specialize mmu1 here. */
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#define F_MMU1_LARB(larbid) (0x1 << SMI_BUS_LARB_SHIFT(larbid))
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#define SMI_READ_FIFO_TH 0x230
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#define SMI_M4U_TH 0x234
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#define SMI_FIFO_TH1 0x238
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#define SMI_FIFO_TH2 0x23c
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@ -360,6 +362,7 @@ static const struct of_device_id mtk_smi_larb_of_ids[] = {
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{.compatible = "mediatek,mt2701-smi-larb", .data = &mtk_smi_larb_mt2701},
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{.compatible = "mediatek,mt2712-smi-larb", .data = &mtk_smi_larb_mt2712},
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{.compatible = "mediatek,mt6779-smi-larb", .data = &mtk_smi_larb_mt6779},
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{.compatible = "mediatek,mt6795-smi-larb", .data = &mtk_smi_larb_mt8173},
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{.compatible = "mediatek,mt8167-smi-larb", .data = &mtk_smi_larb_mt8167},
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{.compatible = "mediatek,mt8173-smi-larb", .data = &mtk_smi_larb_mt8173},
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{.compatible = "mediatek,mt8183-smi-larb", .data = &mtk_smi_larb_mt8183},
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@ -544,6 +547,13 @@ static struct platform_driver mtk_smi_larb_driver = {
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}
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};
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static const struct mtk_smi_reg_pair mtk_smi_common_mt6795_init[SMI_COMMON_INIT_REGS_NR] = {
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{SMI_L1_ARB, 0x1b},
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{SMI_M4U_TH, 0xce810c85},
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{SMI_FIFO_TH1, 0x43214c8},
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{SMI_READ_FIFO_TH, 0x191f},
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};
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static const struct mtk_smi_reg_pair mtk_smi_common_mt8195_init[SMI_COMMON_INIT_REGS_NR] = {
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{SMI_L1LEN, 0xb},
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{SMI_M4U_TH, 0xe100e10},
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@ -568,6 +578,12 @@ static const struct mtk_smi_common_plat mtk_smi_common_mt6779 = {
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F_MMU1_LARB(5) | F_MMU1_LARB(6) | F_MMU1_LARB(7),
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};
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static const struct mtk_smi_common_plat mtk_smi_common_mt6795 = {
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.type = MTK_SMI_GEN2,
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.bus_sel = F_MMU1_LARB(0),
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.init = mtk_smi_common_mt6795_init,
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};
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static const struct mtk_smi_common_plat mtk_smi_common_mt8183 = {
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.type = MTK_SMI_GEN2,
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.has_gals = true,
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@ -612,6 +628,7 @@ static const struct of_device_id mtk_smi_common_of_ids[] = {
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{.compatible = "mediatek,mt2701-smi-common", .data = &mtk_smi_common_gen1},
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{.compatible = "mediatek,mt2712-smi-common", .data = &mtk_smi_common_gen2},
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{.compatible = "mediatek,mt6779-smi-common", .data = &mtk_smi_common_mt6779},
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{.compatible = "mediatek,mt6795-smi-common", .data = &mtk_smi_common_mt6795},
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{.compatible = "mediatek,mt8167-smi-common", .data = &mtk_smi_common_gen2},
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{.compatible = "mediatek,mt8173-smi-common", .data = &mtk_smi_common_gen2},
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{.compatible = "mediatek,mt8183-smi-common", .data = &mtk_smi_common_mt8183},
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