Merge branch 'x86/iommu' into x86/core
This commit is contained in:
commit
3e5621edb3
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@ -563,7 +563,7 @@ config AMD_IOMMU
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# need this always selected by IOMMU for the VIA workaround
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config SWIOTLB
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bool
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def_bool y if X86_64
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help
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Support for software bounce buffers used on x86-64 systems
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which don't have a hardware IOMMU (e.g. the current generation
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@ -71,12 +71,10 @@ static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
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/* Make sure we keep the same behaviour */
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static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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#ifdef CONFIG_X86_64
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struct dma_mapping_ops *ops = get_dma_ops(dev);
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if (ops->mapping_error)
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return ops->mapping_error(dev, dma_addr);
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#endif
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return (dma_addr == bad_dma_address);
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}
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@ -29,6 +29,39 @@ extern int fix_aperture;
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#define AMD64_GARTCACHECTL 0x9c
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#define AMD64_GARTEN (1<<0)
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#ifdef CONFIG_GART_IOMMU
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extern int gart_iommu_aperture;
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extern int gart_iommu_aperture_allowed;
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extern int gart_iommu_aperture_disabled;
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extern void early_gart_iommu_check(void);
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extern void gart_iommu_init(void);
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extern void gart_iommu_shutdown(void);
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extern void __init gart_parse_options(char *);
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extern void gart_iommu_hole_init(void);
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#else
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#define gart_iommu_aperture 0
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#define gart_iommu_aperture_allowed 0
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#define gart_iommu_aperture_disabled 1
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static inline void early_gart_iommu_check(void)
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{
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}
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static inline void gart_iommu_init(void)
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{
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}
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static inline void gart_iommu_shutdown(void)
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{
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}
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static inline void gart_parse_options(char *options)
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{
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}
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static inline void gart_iommu_hole_init(void)
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{
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}
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#endif
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extern int agp_amd64_init(void);
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static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
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@ -80,8 +80,6 @@ static inline void writeq(__u64 val, volatile void __iomem *addr)
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#define readq readq
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#define writeq writeq
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extern int iommu_bio_merge;
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#ifdef CONFIG_X86_32
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# include "io_32.h"
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#else
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@ -232,8 +232,6 @@ void memset_io(volatile void __iomem *a, int b, size_t c);
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#define flush_write_buffers()
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#define BIO_VMERGE_BOUNDARY iommu_bio_merge
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/*
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* Convert a virtual cached pointer to an uncached pointer
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*/
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@ -12,37 +12,4 @@ extern unsigned long iommu_nr_pages(unsigned long addr, unsigned long len);
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/* 10 seconds */
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#define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000)
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#ifdef CONFIG_GART_IOMMU
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extern int gart_iommu_aperture;
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extern int gart_iommu_aperture_allowed;
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extern int gart_iommu_aperture_disabled;
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extern void early_gart_iommu_check(void);
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extern void gart_iommu_init(void);
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extern void gart_iommu_shutdown(void);
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extern void __init gart_parse_options(char *);
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extern void gart_iommu_hole_init(void);
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#else
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#define gart_iommu_aperture 0
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#define gart_iommu_aperture_allowed 0
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#define gart_iommu_aperture_disabled 1
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static inline void early_gart_iommu_check(void)
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{
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}
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static inline void gart_iommu_init(void)
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{
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}
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static inline void gart_iommu_shutdown(void)
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{
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}
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static inline void gart_parse_options(char *options)
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{
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}
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static inline void gart_iommu_hole_init(void)
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{
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}
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#endif
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#endif /* _ASM_X86_IOMMU_H */
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@ -24,6 +24,7 @@
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#include <linux/iommu-helper.h>
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#include <asm/proto.h>
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#include <asm/iommu.h>
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#include <asm/gart.h>
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#include <asm/amd_iommu_types.h>
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#include <asm/amd_iommu.h>
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@ -28,6 +28,7 @@
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#include <asm/amd_iommu_types.h>
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#include <asm/amd_iommu.h>
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#include <asm/iommu.h>
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#include <asm/gart.h>
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/*
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* definitions for the ACPI scanning code
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@ -1,8 +1,9 @@
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/*
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* Firmware replacement code.
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*
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* Work around broken BIOSes that don't set an aperture or only set the
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* aperture in the AGP bridge.
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* Work around broken BIOSes that don't set an aperture, only set the
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* aperture in the AGP bridge, or set too small aperture.
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*
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* If all fails map the aperture over some low memory. This is cheaper than
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* doing bounce buffering. The memory is lost. This is done at early boot
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* because only the bootmem allocator can allocate 32+MB.
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@ -17,6 +17,7 @@
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#include <asm/io_apic.h>
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#include <asm/apic.h>
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#include <asm/iommu.h>
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#include <asm/gart.h>
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static void __init fix_hypertransport_config(int num, int slot, int func)
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{
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@ -6,6 +6,7 @@
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#include <asm/proto.h>
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#include <asm/dma.h>
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#include <asm/iommu.h>
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#include <asm/gart.h>
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#include <asm/calgary.h>
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#include <asm/amd_iommu.h>
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@ -30,11 +31,6 @@ int no_iommu __read_mostly;
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/* Set this to 1 if there is a HW IOMMU in the system */
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int iommu_detected __read_mostly = 0;
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/* This tells the BIO block layer to assume merging. Default to off
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because we cannot guarantee merging later. */
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int iommu_bio_merge __read_mostly = 0;
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EXPORT_SYMBOL(iommu_bio_merge);
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dma_addr_t bad_dma_address __read_mostly = 0;
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EXPORT_SYMBOL(bad_dma_address);
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@ -188,7 +184,6 @@ static __init int iommu_setup(char *p)
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}
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if (!strncmp(p, "biomerge", 8)) {
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iommu_bio_merge = 4096;
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iommu_merge = 1;
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force_iommu = 1;
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}
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@ -93,6 +93,7 @@
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#include <asm/desc.h>
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#include <asm/dma.h>
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#include <asm/iommu.h>
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#include <asm/gart.h>
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#include <asm/mmu_context.h>
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#include <asm/proto.h>
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