drivers/bus: Split Arm CCI driver
The arm-cci driver is really two entirely separate drivers; one for MCPM port control and the other for the performance monitors. Since they are already relatively self-contained, let's take the plunge and move the PMU parts out to drivers/perf where they belong these days. For non-MCPM systems this leaves a small dependency on the remaining "bus" stub for initial probing and discovery, but we end up with something that still fits the general pattern of its fellow system PMU drivers to ease future maintenance. Moving code to a new file also offers a perfect excuse to modernise the license/copyright headers and clean up some funky linewraps on the way. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Suzuki Poulose <suzuki.poulose@arm.com> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -8,25 +8,10 @@ menu "Bus devices"
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config ARM_CCI
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config ARM_CCI
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bool
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bool
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config ARM_CCI_PMU
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bool
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select ARM_CCI
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config ARM_CCI400_COMMON
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config ARM_CCI400_COMMON
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bool
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bool
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select ARM_CCI
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select ARM_CCI
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config ARM_CCI400_PMU
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bool "ARM CCI400 PMU support"
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depends on (ARM && CPU_V7) || ARM64
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depends on PERF_EVENTS
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select ARM_CCI400_COMMON
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select ARM_CCI_PMU
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help
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Support for PMU events monitoring on the ARM CCI-400 (cache coherent
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interconnect). CCI-400 supports counting events related to the
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connected slave/master interfaces.
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config ARM_CCI400_PORT_CTRL
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config ARM_CCI400_PORT_CTRL
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bool
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bool
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depends on ARM && OF && CPU_V7
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depends on ARM && OF && CPU_V7
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@ -35,19 +20,6 @@ config ARM_CCI400_PORT_CTRL
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Low level power management driver for CCI400 cache coherent
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Low level power management driver for CCI400 cache coherent
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interconnect for ARM platforms.
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interconnect for ARM platforms.
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config ARM_CCI5xx_PMU
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bool "ARM CCI-500/CCI-550 PMU support"
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depends on (ARM && CPU_V7) || ARM64
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depends on PERF_EVENTS
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select ARM_CCI_PMU
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help
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Support for PMU events monitoring on the ARM CCI-500/CCI-550 cache
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coherent interconnects. Both of them provide 8 independent event counters,
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which can count events pertaining to the slave/master interfaces as well
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as the internal events to the CCI.
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If unsure, say Y
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config BRCMSTB_GISB_ARB
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config BRCMSTB_GISB_ARB
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bool "Broadcom STB GISB bus arbiter"
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bool "Broadcom STB GISB bus arbiter"
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depends on ARM || ARM64 || MIPS
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depends on ARM || ARM64 || MIPS
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@ -5,6 +5,32 @@
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menu "Performance monitor support"
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menu "Performance monitor support"
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depends on PERF_EVENTS
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depends on PERF_EVENTS
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config ARM_CCI_PMU
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bool
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select ARM_CCI
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config ARM_CCI400_PMU
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bool "ARM CCI400 PMU support"
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depends on (ARM && CPU_V7) || ARM64
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select ARM_CCI400_COMMON
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select ARM_CCI_PMU
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help
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Support for PMU events monitoring on the ARM CCI-400 (cache coherent
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interconnect). CCI-400 supports counting events related to the
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connected slave/master interfaces.
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config ARM_CCI5xx_PMU
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bool "ARM CCI-500/CCI-550 PMU support"
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depends on (ARM && CPU_V7) || ARM64
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select ARM_CCI_PMU
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help
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Support for PMU events monitoring on the ARM CCI-500/CCI-550 cache
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coherent interconnects. Both of them provide 8 independent event counters,
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which can count events pertaining to the slave/master interfaces as well
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as the internal events to the CCI.
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If unsure, say Y
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config ARM_CCN
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config ARM_CCN
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tristate "ARM CCN driver support"
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tristate "ARM CCN driver support"
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depends on ARM || ARM64
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depends on ARM || ARM64
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@ -1,4 +1,5 @@
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# SPDX-License-Identifier: GPL-2.0
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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_ARM_CCI_PMU) += arm-cci.o
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obj-$(CONFIG_ARM_CCN) += arm-ccn.o
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obj-$(CONFIG_ARM_CCN) += arm-ccn.o
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obj-$(CONFIG_ARM_DSU_PMU) += arm_dsu_pmu.o
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obj-$(CONFIG_ARM_DSU_PMU) += arm_dsu_pmu.o
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obj-$(CONFIG_ARM_PMU) += arm_pmu.o arm_pmu_platform.o
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obj-$(CONFIG_ARM_PMU) += arm_pmu.o arm_pmu_platform.o
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