cpufreq: powernv: Report Psafe only if PMSR.psafe_mode_active bit is set
On a reset cycle of OCC, although the system retires from safe frequency state the local pstate is not restored to Pmin or last requested pstate. Now if the cpufreq governor initiates a pstate change, the local pstate will be in Psafe and we will be reporting a false positive when we are not throttled. So in powernv_cpufreq_throttle_check() remove the condition which checks if local pstate is less than Pmin while checking for Psafe frequency. If the cpus are forced to Psafe then PMSR.psafe_mode_active bit will be set. So, when OCCs become active this bit will be cleared. Let us just rely on this bit for reporting throttling. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Reviewed-by: Preeti U Murthy <preeti@linux.vnet.ibm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -39,7 +39,6 @@
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#define PMSR_PSAFE_ENABLE (1UL << 30)
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#define PMSR_SPR_EM_DISABLE (1UL << 31)
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#define PMSR_MAX(x) ((x >> 32) & 0xFF)
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#define PMSR_LP(x) ((x >> 48) & 0xFF)
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static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
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static bool rebooting, throttled, occ_reset;
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@ -313,7 +312,7 @@ static void powernv_cpufreq_throttle_check(void *data)
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{
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unsigned int cpu = smp_processor_id();
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unsigned long pmsr;
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int pmsr_pmax, pmsr_lp, i;
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int pmsr_pmax, i;
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pmsr = get_pmspr(SPRN_PMSR);
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@ -335,14 +334,9 @@ static void powernv_cpufreq_throttle_check(void *data)
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chips[i].id, pmsr_pmax);
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}
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/*
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* Check for Psafe by reading LocalPstate
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* or check if Psafe_mode_active is set in PMSR.
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*/
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/* Check if Psafe_mode_active is set in PMSR. */
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next:
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pmsr_lp = (s8)PMSR_LP(pmsr);
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if ((pmsr_lp < powernv_pstate_info.min) ||
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(pmsr & PMSR_PSAFE_ENABLE)) {
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if (pmsr & PMSR_PSAFE_ENABLE) {
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throttled = true;
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pr_info("Pstate set to safe frequency\n");
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}
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