EHCI: maintain the ehci->command value properly
The ehci-hcd driver is a little haphazard about keeping track of the state of the USBCMD register. The ehci->command field is supposed to hold the register's value (apart from a few special bits) at all times, but it isn't maintained properly. This patch (as1543) cleans up the situation. It keeps ehci->command up-to-date, and uses that value rather than reading the register from the hardware whenever possible. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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09091a4d5f
commit
3d9545cc37
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@ -1025,10 +1025,8 @@ static ssize_t debug_lpm_write(struct file *file, const char __user *user_buf,
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if (strict_strtoul(buf + 5, 16, &hird))
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return -EINVAL;
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printk(KERN_INFO "setting hird %s %lu\n", buf + 6, hird);
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temp = ehci_readl(ehci, &ehci->regs->command);
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temp &= ~CMD_HIRD;
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temp |= hird << 24;
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ehci_writel(ehci, temp, &ehci->regs->command);
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ehci->command = (ehci->command & ~CMD_HIRD) | (hird << 24);
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ehci_writel(ehci, ehci->command, &ehci->regs->command);
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} else if (strncmp(buf, "disable", 7) == 0) {
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if (strict_strtoul(buf + 8, 10, &port))
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return -EINVAL;
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@ -226,8 +226,13 @@ static int ehci_halt (struct ehci_hcd *ehci)
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if ((temp & STS_HALT) != 0)
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return 0;
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/*
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* This routine gets called during probe before ehci->command
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* has been initialized, so we can't rely on its value.
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*/
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ehci->command &= ~CMD_RUN;
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temp = ehci_readl(ehci, &ehci->regs->command);
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temp &= ~CMD_RUN;
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temp &= ~(CMD_RUN | CMD_IAAD);
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ehci_writel(ehci, temp, &ehci->regs->command);
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return handshake (ehci, &ehci->regs->status,
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STS_HALT, STS_HALT, 16 * 125);
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@ -347,6 +352,7 @@ static int ehci_reset (struct ehci_hcd *ehci)
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if (ehci->debug)
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dbgp_external_startup();
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ehci->command = ehci_readl(ehci, &ehci->regs->command);
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ehci->port_c_suspend = ehci->suspended_ports =
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ehci->resuming_ports = 0;
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return retval;
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@ -363,16 +369,14 @@ static void ehci_quiesce (struct ehci_hcd *ehci)
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#endif
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/* wait for any schedule enables/disables to take effect */
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temp = ehci_readl(ehci, &ehci->regs->command) << 10;
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temp &= STS_ASS | STS_PSS;
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temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
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if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
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STS_ASS | STS_PSS, temp, 16 * 125))
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return;
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/* then disable anything that's still active */
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temp = ehci_readl(ehci, &ehci->regs->command);
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temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
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ehci_writel(ehci, temp, &ehci->regs->command);
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ehci->command &= ~(CMD_ASE | CMD_PSE);
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ehci_writel(ehci, ehci->command, &ehci->regs->command);
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/* hardware can take 16 microframes to turn off ... */
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handshake_on_error_set_halt(ehci, &ehci->regs->status,
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@ -233,7 +233,6 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
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/* stop schedules, clean any completed work */
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if (ehci->rh_state == EHCI_RH_RUNNING)
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ehci_quiesce (ehci);
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ehci->command = ehci_readl(ehci, &ehci->regs->command);
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ehci_work(ehci);
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/* Unlike other USB host controller types, EHCI doesn't have
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@ -374,6 +373,7 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
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ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next);
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/* restore CMD_RUN, framelist size, and irq threshold */
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ehci->command |= CMD_RUN;
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ehci_writel(ehci, ehci->command, &ehci->regs->command);
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ehci->rh_state = EHCI_RH_RUNNING;
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@ -981,14 +981,12 @@ static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
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head = ehci->async;
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timer_action_done (ehci, TIMER_ASYNC_OFF);
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if (!head->qh_next.qh) {
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u32 cmd = ehci_readl(ehci, &ehci->regs->command);
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if (!(cmd & CMD_ASE)) {
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if (!(ehci->command & CMD_ASE)) {
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/* in case a clear of CMD_ASE didn't take yet */
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(void)handshake(ehci, &ehci->regs->status,
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STS_ASS, 0, 150);
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cmd |= CMD_ASE;
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ehci_writel(ehci, cmd, &ehci->regs->command);
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ehci->command |= CMD_ASE;
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ehci_writel(ehci, ehci->command, &ehci->regs->command);
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/* posted write need not be known to HC yet ... */
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}
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}
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@ -1204,7 +1202,6 @@ static void end_unlink_async (struct ehci_hcd *ehci)
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static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
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{
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int cmd = ehci_readl(ehci, &ehci->regs->command);
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struct ehci_qh *prev;
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#ifdef DEBUG
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@ -1222,8 +1219,8 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
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if (ehci->rh_state != EHCI_RH_HALTED
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&& !ehci->reclaim) {
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/* ... and CMD_IAAD clear */
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ehci_writel(ehci, cmd & ~CMD_ASE,
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&ehci->regs->command);
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ehci->command &= ~CMD_ASE;
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ehci_writel(ehci, ehci->command, &ehci->regs->command);
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wmb ();
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// handshake later, if we need to
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timer_action_done (ehci, TIMER_ASYNC_OFF);
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@ -1253,8 +1250,7 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
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return;
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}
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cmd |= CMD_IAAD;
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ehci_writel(ehci, cmd, &ehci->regs->command);
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ehci_writel(ehci, ehci->command | CMD_IAAD, &ehci->regs->command);
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(void)ehci_readl(ehci, &ehci->regs->command);
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iaa_watchdog_start(ehci);
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}
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@ -481,7 +481,6 @@ static int tt_no_collision (
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static int enable_periodic (struct ehci_hcd *ehci)
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{
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u32 cmd;
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int status;
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if (ehci->periodic_sched++)
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@ -497,8 +496,8 @@ static int enable_periodic (struct ehci_hcd *ehci)
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return status;
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}
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cmd = ehci_readl(ehci, &ehci->regs->command) | CMD_PSE;
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ehci_writel(ehci, cmd, &ehci->regs->command);
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ehci->command |= CMD_PSE;
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ehci_writel(ehci, ehci->command, &ehci->regs->command);
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/* posted write ... PSS happens later */
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/* make sure ehci_work scans these */
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@ -511,7 +510,6 @@ static int enable_periodic (struct ehci_hcd *ehci)
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static int disable_periodic (struct ehci_hcd *ehci)
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{
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u32 cmd;
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int status;
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if (--ehci->periodic_sched)
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@ -537,8 +535,8 @@ static int disable_periodic (struct ehci_hcd *ehci)
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return status;
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}
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cmd = ehci_readl(ehci, &ehci->regs->command) & ~CMD_PSE;
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ehci_writel(ehci, cmd, &ehci->regs->command);
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ehci->command &= ~CMD_PSE;
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ehci_writel(ehci, ehci->command, &ehci->regs->command);
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/* posted write ... */
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free_cached_lists(ehci);
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