mx35: Fix boot ROM hang in internal boot mode
If a watchdog reset occurs after booting in internal boot mode, the i.MX35 won't boot anymore. The boot ROM code seems to assume that some clocks are turned on (they are after a power-on reset). This patch turns on the necessary clocks. Signed-off-by: Hans J. Koch <hjk@linutronix.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reported-by: John Ogness <jogness@linutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -485,10 +485,10 @@ static struct clk_lookup lookups[] = {
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int __init mx35_clocks_init()
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{
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unsigned int ll = 0;
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unsigned int cgr2 = 3 << 26, cgr3 = 0;
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#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
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ll = (3 << 16);
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cgr2 |= 3 << 16;
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#endif
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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@ -499,8 +499,20 @@ int __init mx35_clocks_init()
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__raw_writel((3 << 18), CCM_BASE + CCM_CGR0);
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__raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
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CCM_BASE + CCM_CGR1);
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__raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2);
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__raw_writel(0, CCM_BASE + CCM_CGR3);
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/*
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* Check if we came up in internal boot mode. If yes, we need some
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* extra clocks turned on, otherwise the MX35 boot ROM code will
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* hang after a watchdog reset.
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*/
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if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) {
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/* Additionally turn on UART1, SCC, and IIM clocks */
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cgr2 |= 3 << 16 | 3 << 4;
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cgr3 |= 3 << 2;
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}
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__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
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__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
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mxc_timer_init(&gpt_clk,
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MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
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