mv643xx_eth: allow multiple TX queues
As with the multiple RX queue support, allow the platform code to specify that the hardware we are running on supports multiple TX queues. This patch only uses the highest-numbered enabled queue to send packets to for now, this can be extended later to enable QoS and such. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Dale Farnsworth <dale@farnsworth.org>
This commit is contained in:
Lennert Buytenhek
parent
64da80a29c
commit
3d6b35bc50
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@ -103,16 +103,16 @@ static char mv643xx_eth_driver_version[] = "1.0";
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#define INT_EXT_PHY 0x00010000
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#define INT_EXT_TX_ERROR_0 0x00000100
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#define INT_EXT_TX_0 0x00000001
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#define INT_EXT_TX 0x00000101
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#define INT_EXT_TX 0x0000ffff
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#define INT_MASK(p) (0x0468 + ((p) << 10))
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#define INT_MASK_EXT(p) (0x046c + ((p) << 10))
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#define TX_FIFO_URGENT_THRESHOLD(p) (0x0474 + ((p) << 10))
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#define RXQ_CURRENT_DESC_PTR(p, q) (0x060c + ((p) << 10) + ((q) << 4))
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#define RXQ_COMMAND(p) (0x0680 + ((p) << 10))
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#define TXQ_CURRENT_DESC_PTR(p) (0x06c0 + ((p) << 10))
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#define TXQ_BW_TOKENS(p) (0x0700 + ((p) << 10))
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#define TXQ_BW_CONF(p) (0x0704 + ((p) << 10))
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#define TXQ_BW_WRR_CONF(p) (0x0708 + ((p) << 10))
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#define TXQ_CURRENT_DESC_PTR(p, q) (0x06c0 + ((p) << 10) + ((q) << 2))
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#define TXQ_BW_TOKENS(p, q) (0x0700 + ((p) << 10) + ((q) << 4))
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#define TXQ_BW_CONF(p, q) (0x0704 + ((p) << 10) + ((q) << 4))
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#define TXQ_BW_WRR_CONF(p, q) (0x0708 + ((p) << 10) + ((q) << 4))
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#define MIB_COUNTERS(p) (0x1000 + ((p) << 7))
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#define SPECIAL_MCAST_TABLE(p) (0x1400 + ((p) << 10))
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#define OTHER_MCAST_TABLE(p) (0x1500 + ((p) << 10))
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@ -303,6 +303,8 @@ struct rx_queue {
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};
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struct tx_queue {
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int index;
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int tx_ring_size;
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int tx_desc_count;
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@ -347,7 +349,9 @@ struct mv643xx_eth_private {
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int default_tx_ring_size;
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unsigned long tx_desc_sram_addr;
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int tx_desc_sram_size;
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struct tx_queue txq[1];
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u8 txq_mask;
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int txq_primary;
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struct tx_queue txq[8];
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#ifdef MV643XX_ETH_TX_FAST_REFILL
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int tx_clean_threshold;
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#endif
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@ -374,7 +378,7 @@ static struct mv643xx_eth_private *rxq_to_mp(struct rx_queue *rxq)
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static struct mv643xx_eth_private *txq_to_mp(struct tx_queue *txq)
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{
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return container_of(txq, struct mv643xx_eth_private, txq[0]);
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return container_of(txq, struct mv643xx_eth_private, txq[txq->index]);
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}
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static void rxq_enable(struct rx_queue *rxq)
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@ -396,13 +400,13 @@ static void rxq_disable(struct rx_queue *rxq)
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static void txq_enable(struct tx_queue *txq)
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{
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struct mv643xx_eth_private *mp = txq_to_mp(txq);
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wrl(mp, TXQ_COMMAND(mp->port_num), 1);
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wrl(mp, TXQ_COMMAND(mp->port_num), 1 << txq->index);
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}
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static void txq_disable(struct tx_queue *txq)
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{
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struct mv643xx_eth_private *mp = txq_to_mp(txq);
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u8 mask = 1;
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u8 mask = 1 << txq->index;
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wrl(mp, TXQ_COMMAND(mp->port_num), mask << 8);
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while (rdl(mp, TXQ_COMMAND(mp->port_num)) & mask)
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@ -413,6 +417,12 @@ static void __txq_maybe_wake(struct tx_queue *txq)
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{
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struct mv643xx_eth_private *mp = txq_to_mp(txq);
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/*
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* netif_{stop,wake}_queue() flow control only applies to
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* the primary queue.
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*/
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BUG_ON(txq->index != mp->txq_primary);
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if (txq->tx_ring_size - txq->tx_desc_count >= MAX_DESCS_PER_SKB)
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netif_wake_queue(mp->dev);
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}
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@ -593,8 +603,10 @@ static int mv643xx_eth_poll(struct napi_struct *napi, int budget)
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#ifdef MV643XX_ETH_TX_FAST_REFILL
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if (++mp->tx_clean_threshold > 5) {
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txq_reclaim(mp->txq, 0);
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mp->tx_clean_threshold = 0;
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for (i = 0; i < 8; i++)
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if (mp->txq_mask & (1 << i))
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txq_reclaim(mp->txq + i, 0);
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}
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#endif
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@ -754,8 +766,6 @@ static int mv643xx_eth_xmit(struct sk_buff *skb, struct net_device *dev)
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struct tx_queue *txq;
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unsigned long flags;
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BUG_ON(netif_queue_stopped(dev));
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if (has_tiny_unaligned_frags(skb) && __skb_linearize(skb)) {
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stats->tx_dropped++;
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dev_printk(KERN_DEBUG, &dev->dev,
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@ -766,13 +776,15 @@ static int mv643xx_eth_xmit(struct sk_buff *skb, struct net_device *dev)
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spin_lock_irqsave(&mp->lock, flags);
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txq = mp->txq;
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txq = mp->txq + mp->txq_primary;
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if (txq->tx_ring_size - txq->tx_desc_count < MAX_DESCS_PER_SKB) {
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printk(KERN_ERR "%s: transmit with queue full\n", dev->name);
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netif_stop_queue(dev);
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spin_unlock_irqrestore(&mp->lock, flags);
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return NETDEV_TX_BUSY;
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if (txq->index == mp->txq_primary && net_ratelimit())
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dev_printk(KERN_ERR, &dev->dev,
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"primary tx queue full?!\n");
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kfree_skb(skb);
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return NETDEV_TX_OK;
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}
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txq_submit_skb(txq, skb);
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@ -780,8 +792,13 @@ static int mv643xx_eth_xmit(struct sk_buff *skb, struct net_device *dev)
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stats->tx_packets++;
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dev->trans_start = jiffies;
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if (txq->tx_ring_size - txq->tx_desc_count < MAX_DESCS_PER_SKB)
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netif_stop_queue(dev);
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if (txq->index == mp->txq_primary) {
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int entries_left;
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entries_left = txq->tx_ring_size - txq->tx_desc_count;
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if (entries_left < MAX_DESCS_PER_SKB)
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netif_stop_queue(dev);
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}
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spin_unlock_irqrestore(&mp->lock, flags);
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@ -831,8 +848,8 @@ static void txq_set_rate(struct tx_queue *txq, int rate, int burst)
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if (bucket_size > 65535)
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bucket_size = 65535;
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wrl(mp, TXQ_BW_TOKENS(mp->port_num), token_rate << 14);
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wrl(mp, TXQ_BW_CONF(mp->port_num),
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wrl(mp, TXQ_BW_TOKENS(mp->port_num, txq->index), token_rate << 14);
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wrl(mp, TXQ_BW_CONF(mp->port_num, txq->index),
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(bucket_size << 10) | token_rate);
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}
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@ -848,7 +865,7 @@ static void txq_set_fixed_prio_mode(struct tx_queue *txq)
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off = TXQ_FIX_PRIO_CONF(mp->port_num);
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val = rdl(mp, off);
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val |= 1;
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val |= 1 << txq->index;
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wrl(mp, off, val);
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}
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@ -864,13 +881,13 @@ static void txq_set_wrr(struct tx_queue *txq, int weight)
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off = TXQ_FIX_PRIO_CONF(mp->port_num);
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val = rdl(mp, off);
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val &= ~1;
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val &= ~(1 << txq->index);
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wrl(mp, off, val);
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/*
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* Configure WRR weight for this queue.
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*/
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off = TXQ_BW_WRR_CONF(mp->port_num);
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off = TXQ_BW_WRR_CONF(mp->port_num, txq->index);
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val = rdl(mp, off);
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val = (val & ~0xff) | (weight & 0xff);
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@ -1415,13 +1432,15 @@ static void rxq_deinit(struct rx_queue *rxq)
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kfree(rxq->rx_skb);
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}
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static int txq_init(struct mv643xx_eth_private *mp)
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static int txq_init(struct mv643xx_eth_private *mp, int index)
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{
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struct tx_queue *txq = mp->txq;
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struct tx_queue *txq = mp->txq + index;
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struct tx_desc *tx_desc;
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int size;
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int i;
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txq->index = index;
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txq->tx_ring_size = mp->default_tx_ring_size;
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txq->tx_desc_count = 0;
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@ -1430,7 +1449,7 @@ static int txq_init(struct mv643xx_eth_private *mp)
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size = txq->tx_ring_size * sizeof(struct tx_desc);
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if (size <= mp->tx_desc_sram_size) {
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if (index == mp->txq_primary && size <= mp->tx_desc_sram_size) {
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txq->tx_desc_area = ioremap(mp->tx_desc_sram_addr,
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mp->tx_desc_sram_size);
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txq->tx_desc_dma = mp->tx_desc_sram_addr;
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@ -1467,7 +1486,7 @@ static int txq_init(struct mv643xx_eth_private *mp)
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out_free:
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if (size <= mp->tx_desc_sram_size)
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if (index == mp->txq_primary && size <= mp->tx_desc_sram_size)
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iounmap(txq->tx_desc_area);
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else
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dma_free_coherent(NULL, size,
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@ -1539,7 +1558,8 @@ static void txq_deinit(struct tx_queue *txq)
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BUG_ON(txq->tx_used_desc != txq->tx_curr_desc);
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if (txq->tx_desc_area_size <= mp->tx_desc_sram_size)
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if (txq->index == mp->txq_primary &&
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txq->tx_desc_area_size <= mp->tx_desc_sram_size)
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iounmap(txq->tx_desc_area);
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else
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dma_free_coherent(NULL, txq->tx_desc_area_size,
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@ -1578,12 +1598,20 @@ static void update_pscr(struct mv643xx_eth_private *mp, int speed, int duplex)
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if ((pscr_o & SERIAL_PORT_ENABLE) == 0)
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wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr_n);
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else {
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txq_disable(mp->txq);
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int i;
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for (i = 0; i < 8; i++)
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if (mp->txq_mask & (1 << i))
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txq_disable(mp->txq + i);
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pscr_o &= ~SERIAL_PORT_ENABLE;
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wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr_o);
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wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr_n);
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wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr_n);
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txq_enable(mp->txq);
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for (i = 0; i < 8; i++)
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if (mp->txq_mask & (1 << i))
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txq_enable(mp->txq + i);
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}
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}
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}
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@ -1609,13 +1637,17 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id)
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if (int_cause_ext & (INT_EXT_PHY | INT_EXT_LINK)) {
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if (mii_link_ok(&mp->mii)) {
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struct ethtool_cmd cmd;
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int i;
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mii_ethtool_gset(&mp->mii, &cmd);
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update_pscr(mp, cmd.speed, cmd.duplex);
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txq_enable(mp->txq);
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for (i = 0; i < 8; i++)
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if (mp->txq_mask & (1 << i))
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txq_enable(mp->txq + i);
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if (!netif_carrier_ok(dev)) {
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netif_carrier_on(dev);
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__txq_maybe_wake(mp->txq);
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__txq_maybe_wake(mp->txq + mp->txq_primary);
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}
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} else if (netif_carrier_ok(dev)) {
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netif_stop_queue(dev);
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@ -1643,9 +1675,17 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id)
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}
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#endif
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/*
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* TxBuffer or TxError set for any of the 8 queues?
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*/
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if (int_cause_ext & INT_EXT_TX) {
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txq_reclaim(mp->txq, 0);
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__txq_maybe_wake(mp->txq);
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int i;
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for (i = 0; i < 8; i++)
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if (mp->txq_mask & (1 << i))
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txq_reclaim(mp->txq + i, 0);
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__txq_maybe_wake(mp->txq + mp->txq_primary);
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}
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return IRQ_HANDLED;
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@ -1696,11 +1736,14 @@ static void port_start(struct mv643xx_eth_private *mp)
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* Configure TX path and queues.
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*/
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tx_set_rate(mp, 1000000000, 16777216);
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for (i = 0; i < 1; i++) {
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struct tx_queue *txq = mp->txq;
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int off = TXQ_CURRENT_DESC_PTR(mp->port_num);
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for (i = 0; i < 8; i++) {
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struct tx_queue *txq = mp->txq + i;
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int off = TXQ_CURRENT_DESC_PTR(mp->port_num, i);
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u32 addr;
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if ((mp->txq_mask & (1 << i)) == 0)
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continue;
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addr = (u32)txq->tx_desc_dma;
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addr += txq->tx_curr_desc * sizeof(struct tx_desc);
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wrl(mp, off, addr);
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@ -1801,9 +1844,18 @@ static int mv643xx_eth_open(struct net_device *dev)
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rxq_refill(mp->rxq + i);
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}
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err = txq_init(mp);
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if (err)
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goto out_free;
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for (i = 0; i < 8; i++) {
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if ((mp->txq_mask & (1 << i)) == 0)
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continue;
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err = txq_init(mp, i);
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if (err) {
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while (--i >= 0)
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if (mp->txq_mask & (1 << i))
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txq_deinit(mp->txq + i);
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goto out_free;
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}
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}
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#ifdef MV643XX_ETH_NAPI
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napi_enable(&mp->napi);
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@ -1840,8 +1892,9 @@ static void port_reset(struct mv643xx_eth_private *mp)
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for (i = 0; i < 8; i++) {
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if (mp->rxq_mask & (1 << i))
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rxq_disable(mp->rxq + i);
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if (mp->txq_mask & (1 << i))
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txq_disable(mp->txq + i);
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}
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txq_disable(mp->txq);
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while (!(rdl(mp, PORT_STATUS(mp->port_num)) & TX_FIFO_EMPTY))
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udelay(10);
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@ -1875,8 +1928,9 @@ static int mv643xx_eth_stop(struct net_device *dev)
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for (i = 0; i < 8; i++) {
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if (mp->rxq_mask & (1 << i))
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rxq_deinit(mp->rxq + i);
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if (mp->txq_mask & (1 << i))
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txq_deinit(mp->txq + i);
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}
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txq_deinit(mp->txq);
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return 0;
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}
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@ -1928,7 +1982,7 @@ static void tx_timeout_task(struct work_struct *ugly)
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port_reset(mp);
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port_start(mp);
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__txq_maybe_wake(mp->txq);
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__txq_maybe_wake(mp->txq + mp->txq_primary);
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}
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}
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@ -2139,6 +2193,12 @@ static void set_params(struct mv643xx_eth_private *mp,
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mp->default_tx_ring_size = pd->tx_queue_size;
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mp->tx_desc_sram_addr = pd->tx_sram_addr;
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mp->tx_desc_sram_size = pd->tx_sram_size;
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if (pd->tx_queue_mask)
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mp->txq_mask = pd->tx_queue_mask;
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else
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mp->txq_mask = 0x01;
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mp->txq_primary = fls(mp->txq_mask) - 1;
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}
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static int phy_detect(struct mv643xx_eth_private *mp)
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@ -49,9 +49,10 @@ struct mv643xx_eth_platform_data {
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int duplex;
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/*
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* Which RX queues to use.
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* Which RX/TX queues to use.
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*/
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int rx_queue_mask;
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int tx_queue_mask;
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/*
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* Override default RX/TX queue sizes if nonzero.
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