drm/radeon/kms: Only restrict BO to visible VRAM size when pinning to VRAM.
This prevented radeon.test=1 from testing transfers from/to GTT beyond the visible VRAM size. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -185,8 +185,10 @@ int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
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return 0;
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}
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radeon_ttm_placement_from_domain(bo, domain);
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/* force to pin into visible video ram */
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bo->placement.lpfn = bo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
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if (domain == RADEON_GEM_DOMAIN_VRAM) {
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/* force to pin into visible video ram */
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bo->placement.lpfn = bo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
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}
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for (i = 0; i < bo->placement.num_placement; i++)
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bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
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r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
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