pinctrl: Use new GPIO_LINE_DIRECTION
Use newly added GPIO defines GPIO_LINE_DIRECTION_IN and GPIO_LINE_DIRECTION_OUT instead of using hard-coded 1 and 0. Main benefit is to make it easier to see which values mean IN and which OUT. As a side effect this helps GPIO framework to change the direction defines to something else if ever needed. Please note that return value from get_direction call on pinctrl-axp209 driver was changed. Previously pinctrl-axp209 might have returned value 2 for direction INPUT. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Reported-by: kbuild test robot <lkp@intel.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Link: https://lore.kernel.org/r/20200214135712.GA14557@localhost.localdomain Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
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8587b21c59
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3c82787359
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@ -329,7 +329,10 @@ static int bcm2835_gpio_get_direction(struct gpio_chip *chip, unsigned int offse
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if (fsel > BCM2835_FSEL_GPIO_OUT)
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return -EINVAL;
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return (fsel == BCM2835_FSEL_GPIO_IN);
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if (fsel == BCM2835_FSEL_GPIO_IN)
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return GPIO_LINE_DIRECTION_IN;
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return GPIO_LINE_DIRECTION_OUT;
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}
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static void bcm2835_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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@ -363,7 +363,10 @@ static int iproc_gpio_get_direction(struct gpio_chip *gc, unsigned int gpio)
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unsigned int offset = IPROC_GPIO_REG(gpio, IPROC_GPIO_OUT_EN_OFFSET);
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unsigned int shift = IPROC_GPIO_SHIFT(gpio);
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return !(readl(chip->base + offset) & BIT(shift));
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if (readl(chip->base + offset) & BIT(shift))
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static void iproc_gpio_set(struct gpio_chip *gc, unsigned gpio, int val)
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@ -804,7 +804,10 @@ static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
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pctl->devdata->spec_dir_set(®_addr, offset);
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regmap_read(pctl->regmap1, reg_addr, &read_val);
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return !(read_val & bit);
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if (read_val & bit)
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static int mtk_gpio_get(struct gpio_chip *chip, unsigned offset)
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@ -775,7 +775,10 @@ static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio)
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if (err)
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return err;
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return !value;
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if (value)
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
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@ -402,7 +402,10 @@ static int armada_37xx_gpio_get_direction(struct gpio_chip *chip,
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mask = BIT(offset);
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regmap_read(info->regmap, reg, &val);
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return !(val & mask);
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if (val & mask)
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static int armada_37xx_gpio_direction_output(struct gpio_chip *chip,
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@ -831,11 +831,14 @@ static int nmk_gpio_get_dir(struct gpio_chip *chip, unsigned offset)
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clk_enable(nmk_chip->clk);
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dir = !(readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset));
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dir = readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset);
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clk_disable(nmk_chip->clk);
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return dir;
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if (dir)
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
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@ -46,7 +46,10 @@ static int amd_gpio_get_direction(struct gpio_chip *gc, unsigned offset)
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pin_reg = readl(gpio_dev->base + offset * 4);
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raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
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return !(pin_reg & BIT(OUTPUT_ENABLE_OFF));
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if (pin_reg & BIT(OUTPUT_ENABLE_OFF))
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static int amd_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
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@ -1414,7 +1414,10 @@ static int at91_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
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u32 osr;
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osr = readl_relaxed(pio + PIO_OSR);
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return !(osr & mask);
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if (osr & mask)
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static int at91_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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@ -149,13 +149,16 @@ static int axp20x_gpio_get_direction(struct gpio_chip *chip,
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* going to change the value soon anyway. Default to output.
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*/
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if ((val & AXP20X_GPIO_FUNCTIONS) > 2)
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return 0;
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return GPIO_LINE_DIRECTION_OUT;
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/*
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* The GPIO directions are the three lowest values.
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* 2 is input, 0 and 1 are output
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*/
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return val & 2;
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if (val & 2)
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return GPIO_LINE_DIRECTION_IN;
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return GPIO_LINE_DIRECTION_OUT;
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}
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static int axp20x_gpio_output(struct gpio_chip *chip, unsigned int offset,
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@ -1916,13 +1916,19 @@ static int ingenic_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
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struct ingenic_pinctrl *jzpc = jzgc->jzpc;
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unsigned int pin = gc->base + offset;
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if (jzpc->info->version >= ID_JZ4760)
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return ingenic_get_pin_config(jzpc, pin, JZ4760_GPIO_PAT1);
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if (jzpc->info->version >= ID_JZ4760) {
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if (ingenic_get_pin_config(jzpc, pin, JZ4760_GPIO_PAT1))
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return GPIO_LINE_DIRECTION_IN;
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return GPIO_LINE_DIRECTION_OUT;
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}
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if (ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_SELECT))
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return true;
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return GPIO_LINE_DIRECTION_IN;
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return !ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_DIR);
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if (ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_DIR))
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static const struct pinctrl_ops ingenic_pctlops = {
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@ -604,7 +604,10 @@ static int ocelot_gpio_get_direction(struct gpio_chip *chip,
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regmap_read(info->map, REG(OCELOT_GPIO_OE, info, offset), &val);
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return !(val & BIT(offset % 32));
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if (val & BIT(offset % 32))
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static int ocelot_gpio_direction_input(struct gpio_chip *chip,
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@ -756,7 +756,10 @@ static int oxnas_gpio_get_direction(struct gpio_chip *chip,
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struct oxnas_gpio_bank *bank = gpiochip_get_data(chip);
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u32 mask = BIT(offset);
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return !(readl_relaxed(bank->reg_base + OUTPUT_EN) & mask);
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if (readl_relaxed(bank->reg_base + OUTPUT_EN) & mask)
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static int oxnas_gpio_direction_input(struct gpio_chip *chip,
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@ -1990,7 +1990,10 @@ static int pic32_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
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{
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struct pic32_gpio_bank *bank = gpiochip_get_data(chip);
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return !!(readl(bank->reg_base + TRIS_REG) & BIT(offset));
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if (readl(bank->reg_base + TRIS_REG) & BIT(offset))
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return GPIO_LINE_DIRECTION_IN;
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return GPIO_LINE_DIRECTION_OUT;
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}
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static void pic32_gpio_irq_ack(struct irq_data *data)
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@ -1166,7 +1166,10 @@ static int pistachio_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
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{
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struct pistachio_gpio_bank *bank = gpiochip_get_data(chip);
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return !(gpio_readl(bank, GPIO_OUTPUT_EN) & BIT(offset));
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if (gpio_readl(bank, GPIO_OUTPUT_EN) & BIT(offset))
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static int pistachio_gpio_get(struct gpio_chip *chip, unsigned offset)
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@ -184,7 +184,7 @@ static int rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
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/* default output*/
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if (!pci->pin_cfg[offset].dir_msk)
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return 0;
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return GPIO_LINE_DIRECTION_OUT;
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ret = regmap_read(pci->rk808->regmap,
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pci->pin_cfg[offset].reg,
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return ret;
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}
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return !(val & pci->pin_cfg[offset].dir_msk);
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if (val & pci->pin_cfg[offset].dir_msk)
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static const struct gpio_chip rk805_gpio_chip = {
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@ -2549,7 +2549,10 @@ static int rockchip_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
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data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR);
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clk_disable(bank->clk);
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return !(data & BIT(offset));
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if (data & BIT(offset))
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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/*
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@ -777,7 +777,10 @@ static int rza1_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio)
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{
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struct rza1_port *port = gpiochip_get_data(chip);
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return !!rza1_get_bit(port, RZA1_PM_REG, gpio);
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if (rza1_get_bit(port, RZA1_PM_REG, gpio))
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return GPIO_LINE_DIRECTION_IN;
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return GPIO_LINE_DIRECTION_OUT;
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}
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static int rza1_gpio_direction_input(struct gpio_chip *chip,
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@ -135,10 +135,10 @@ static int rza2_chip_get_direction(struct gpio_chip *chip, unsigned int offset)
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reg16 = (reg16 >> (pin * 2)) & RZA2_PDR_MASK;
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if (reg16 == RZA2_PDR_OUTPUT)
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return 0;
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return GPIO_LINE_DIRECTION_OUT;
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if (reg16 == RZA2_PDR_INPUT)
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return 1;
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return GPIO_LINE_DIRECTION_IN;
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/*
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* This GPIO controller has a default Hi-Z state that is not input or
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*/
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rza2_pin_to_gpio(priv->base, offset, 1);
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return 1;
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return GPIO_LINE_DIRECTION_IN;
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}
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static int rza2_chip_direction_input(struct gpio_chip *chip,
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@ -746,7 +746,10 @@ static int st_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
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function = st_pctl_get_pin_function(&pc, offset);
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if (function) {
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st_pinconf_get_direction(&pc, offset, &config);
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return !ST_PINCONF_UNPACK_OE(config);
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if (ST_PINCONF_UNPACK_OE(config))
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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/*
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direction |= ((value >> offset) & 0x1) << i;
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}
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return (direction == ST_GPIO_DIRECTION_IN);
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if (direction == ST_GPIO_DIRECTION_IN)
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return GPIO_LINE_DIRECTION_IN;
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return GPIO_LINE_DIRECTION_OUT;
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}
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/* Pinctrl Groups */
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unsigned int function;
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int offset = st_gpio_pin(pin_id);
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char f[16];
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int oe;
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mutex_unlock(&pctldev->mutex);
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pc = st_get_pio_control(pctldev, pin_id);
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else
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snprintf(f, 5, "GPIO");
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oe = st_gpio_get_direction(&pc_to_bank(pc)->gpio_chip, offset);
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seq_printf(s, "[OE:%d,PU:%ld,OD:%ld]\t%s\n"
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"\t\t[retime:%ld,invclk:%ld,clknotdat:%ld,"
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"de:%ld,rt-clk:%ld,rt-delay:%ld]",
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!st_gpio_get_direction(&pc_to_bank(pc)->gpio_chip, offset),
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(oe == GPIO_LINE_DIRECTION_OUT),
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ST_PINCONF_UNPACK_PU(config),
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ST_PINCONF_UNPACK_OD(config),
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f,
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@ -134,10 +134,14 @@ static int stmfx_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
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ret = regmap_read(pctl->stmfx->map, reg, &val);
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/*
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* On stmfx, gpio pins direction is (0)input, (1)output.
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* .get_direction returns 0=out, 1=in
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*/
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if (ret)
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return ret;
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return ret ? ret : !(val & mask);
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if (val & mask)
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static int stmfx_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)
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dir = stmfx_gpio_get_direction(&pctl->gpio_chip, pin);
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if (dir < 0)
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return dir;
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/*
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* Currently the gpiolib IN is 1 and OUT is 0 but let's not count
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* on it just to be on the safe side also in the future :)
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*/
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dir = (dir == GPIO_LINE_DIRECTION_IN) ? 1 : 0;
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type = stmfx_pinconf_get_type(pctl, pin);
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if (type < 0)
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return type;
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if (val < 0)
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return;
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if (!dir) {
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if (dir == GPIO_LINE_DIRECTION_OUT) {
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seq_printf(s, "output %s ", val ? "high" : "low");
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if (type)
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seq_printf(s, "open drain %s internal pull-up ",
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@ -391,13 +391,16 @@ static int sx150x_gpio_get_direction(struct gpio_chip *chip,
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int ret;
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if (sx150x_pin_is_oscio(pctl, offset))
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return false;
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return GPIO_LINE_DIRECTION_OUT;
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ret = regmap_read(pctl->regmap, pctl->data->reg_dir, &value);
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if (ret < 0)
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return ret;
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return !!(value & BIT(offset));
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if (value & BIT(offset))
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return GPIO_LINE_DIRECTION_IN;
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return GPIO_LINE_DIRECTION_OUT;
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}
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static int sx150x_gpio_get(struct gpio_chip *chip, unsigned int offset)
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@ -687,7 +690,7 @@ static int sx150x_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
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if (ret < 0)
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return ret;
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if (ret)
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if (ret == GPIO_LINE_DIRECTION_IN)
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return -EINVAL;
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ret = sx150x_gpio_get(&pctl->gpio, pin);
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@ -489,8 +489,8 @@ static int msm_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
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val = msm_readl_ctl(pctrl, g);
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/* 0 = output, 1 = input */
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return val & BIT(g->oe_bit) ? 0 : 1;
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return val & BIT(g->oe_bit) ? GPIO_LINE_DIRECTION_OUT :
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GPIO_LINE_DIRECTION_IN;
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}
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static int msm_gpio_get(struct gpio_chip *chip, unsigned offset)
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@ -283,9 +283,9 @@ static int stm32_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
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stm32_pmx_get_mode(bank, pin, &mode, &alt);
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if ((alt == 0) && (mode == 0))
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ret = 1;
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ret = GPIO_LINE_DIRECTION_IN;
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else if ((alt == 0) && (mode == 1))
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ret = 0;
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ret = GPIO_LINE_DIRECTION_OUT;
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else
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ret = -EINVAL;
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@ -486,8 +486,10 @@ static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
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u32 val;
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val = readl_relaxed(data->base + reg_dir);
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/* Return 0 == output, 1 == input */
|
||||
return !(val & BIT(bit));
|
||||
if (val & BIT(bit))
|
||||
return GPIO_LINE_DIRECTION_OUT;
|
||||
|
||||
return GPIO_LINE_DIRECTION_IN;
|
||||
}
|
||||
|
||||
static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset)
|
||||
|
|
Loading…
Reference in New Issue