ARM: tegra: pinmux: Add missing drive pingroups and fix suspend
Adds missing drive pingroups, saves all drive pingroups in suspend, and restores the pinmux registers in the proper order. Signed-off-by: Gary King <gking@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
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@ -167,6 +167,16 @@ enum tegra_drive_pingroup {
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TEGRA_DRIVE_PINGROUP_XM2D,
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TEGRA_DRIVE_PINGROUP_XM2D,
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TEGRA_DRIVE_PINGROUP_XM2CLK,
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TEGRA_DRIVE_PINGROUP_XM2CLK,
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TEGRA_DRIVE_PINGROUP_MEMCOMP,
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TEGRA_DRIVE_PINGROUP_MEMCOMP,
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TEGRA_DRIVE_PINGROUP_SDIO1,
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TEGRA_DRIVE_PINGROUP_CRT,
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TEGRA_DRIVE_PINGROUP_DDC,
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TEGRA_DRIVE_PINGROUP_GMA,
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TEGRA_DRIVE_PINGROUP_GMB,
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TEGRA_DRIVE_PINGROUP_GMC,
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TEGRA_DRIVE_PINGROUP_GMD,
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TEGRA_DRIVE_PINGROUP_GME,
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TEGRA_DRIVE_PINGROUP_OWR,
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TEGRA_DRIVE_PINGROUP_UAD,
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TEGRA_MAX_DRIVE_PINGROUP,
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TEGRA_MAX_DRIVE_PINGROUP,
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};
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};
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@ -66,6 +66,16 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE
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DRIVE_PINGROUP(XM2D, 0x8cc),
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DRIVE_PINGROUP(XM2D, 0x8cc),
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DRIVE_PINGROUP(XM2CLK, 0x8d0),
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DRIVE_PINGROUP(XM2CLK, 0x8d0),
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DRIVE_PINGROUP(MEMCOMP, 0x8d4),
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DRIVE_PINGROUP(MEMCOMP, 0x8d4),
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DRIVE_PINGROUP(SDIO1, 0x8e0),
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DRIVE_PINGROUP(CRT, 0x8ec),
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DRIVE_PINGROUP(DDC, 0x8f0),
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DRIVE_PINGROUP(GMA, 0x8f4),
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DRIVE_PINGROUP(GMB, 0x8f8),
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DRIVE_PINGROUP(GMC, 0x8fc),
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DRIVE_PINGROUP(GMD, 0x900),
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DRIVE_PINGROUP(GME, 0x904),
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DRIVE_PINGROUP(OWR, 0x908),
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DRIVE_PINGROUP(UAD, 0x90c),
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};
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};
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#define PINGROUP(pg_name, vdd, f0, f1, f2, f3, f_safe, \
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#define PINGROUP(pg_name, vdd, f0, f1, f2, f3, f_safe, \
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@ -217,7 +227,8 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = {
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#define PULLUPDOWN_REG_NUM 5
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#define PULLUPDOWN_REG_NUM 5
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static u32 pinmux_reg[TRISTATE_REG_NUM + PIN_MUX_CTL_REG_NUM +
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static u32 pinmux_reg[TRISTATE_REG_NUM + PIN_MUX_CTL_REG_NUM +
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PULLUPDOWN_REG_NUM];
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PULLUPDOWN_REG_NUM +
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ARRAY_SIZE(tegra_soc_drive_pingroups)];
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static inline unsigned long pg_readl(unsigned long offset)
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static inline unsigned long pg_readl(unsigned long offset)
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{
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{
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@ -234,14 +245,17 @@ void tegra_pinmux_suspend(void)
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unsigned int i;
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unsigned int i;
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u32 *ctx = pinmux_reg;
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u32 *ctx = pinmux_reg;
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for (i = 0; i < TRISTATE_REG_NUM; i++)
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*ctx++ = pg_readl(TRISTATE_REG_A + i*4);
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for (i = 0; i < PIN_MUX_CTL_REG_NUM; i++)
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for (i = 0; i < PIN_MUX_CTL_REG_NUM; i++)
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*ctx++ = pg_readl(PIN_MUX_CTL_REG_A + i*4);
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*ctx++ = pg_readl(PIN_MUX_CTL_REG_A + i*4);
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for (i = 0; i < PULLUPDOWN_REG_NUM; i++)
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for (i = 0; i < PULLUPDOWN_REG_NUM; i++)
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*ctx++ = pg_readl(PULLUPDOWN_REG_A + i*4);
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*ctx++ = pg_readl(PULLUPDOWN_REG_A + i*4);
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for (i = 0; i < TRISTATE_REG_NUM; i++)
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*ctx++ = pg_readl(TRISTATE_REG_A + i*4);
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for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++)
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*ctx++ = pg_readl(tegra_soc_drive_pingroups[i].reg);
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}
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}
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void tegra_pinmux_resume(void)
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void tegra_pinmux_resume(void)
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@ -257,5 +271,8 @@ void tegra_pinmux_resume(void)
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for (i = 0; i < TRISTATE_REG_NUM; i++)
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for (i = 0; i < TRISTATE_REG_NUM; i++)
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pg_writel(*ctx++, TRISTATE_REG_A + i*4);
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pg_writel(*ctx++, TRISTATE_REG_A + i*4);
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for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++)
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pg_writel(*ctx++, tegra_soc_drive_pingroups[i].reg);
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}
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}
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#endif
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#endif
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