clocksource/drivers/arm_arch_timer: Convert init function to return error
The init functions do not return any error. They behave as the following: - panic, thus leading to a kernel crash while another timer may work and make the system boot up correctly or - print an error and let the caller unaware if the state of the system Change that by converting the init functions to return an error conforming to the CLOCKSOURCE_OF_RET prototype. Proper error handling (rollback, errno value) will be changed later case by case, thus this change just return back an error or success in the init function. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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17c8669d80
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3c0731db15
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@ -693,25 +693,26 @@ arch_timer_needs_probing(int type, const struct of_device_id *matches)
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return needs_probing;
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}
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static void __init arch_timer_common_init(void)
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static int __init arch_timer_common_init(void)
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{
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unsigned mask = ARCH_CP15_TIMER | ARCH_MEM_TIMER;
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/* Wait until both nodes are probed if we have two timers */
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if ((arch_timers_present & mask) != mask) {
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if (arch_timer_needs_probing(ARCH_MEM_TIMER, arch_timer_mem_of_match))
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return;
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return 0;
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if (arch_timer_needs_probing(ARCH_CP15_TIMER, arch_timer_of_match))
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return;
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return 0;
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}
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arch_timer_banner(arch_timers_present);
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arch_counter_register(arch_timers_present);
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arch_timer_arch_init();
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return arch_timer_arch_init();
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}
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static void __init arch_timer_init(void)
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static int __init arch_timer_init(void)
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{
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int ret;
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/*
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* If HYP mode is available, we know that the physical timer
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* has been configured to be accessible from PL1. Use it, so
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@ -739,23 +740,30 @@ static void __init arch_timer_init(void)
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if (!has_ppi) {
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pr_warn("arch_timer: No interrupt available, giving up\n");
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return;
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return -EINVAL;
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}
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}
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arch_timer_register();
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arch_timer_common_init();
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ret = arch_timer_register();
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if (ret)
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return ret;
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ret = arch_timer_common_init();
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if (ret)
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return ret;
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arch_timer_kvm_info.virtual_irq = arch_timer_ppi[VIRT_PPI];
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return 0;
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}
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static void __init arch_timer_of_init(struct device_node *np)
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static int __init arch_timer_of_init(struct device_node *np)
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{
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int i;
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if (arch_timers_present & ARCH_CP15_TIMER) {
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pr_warn("arch_timer: multiple nodes in dt, skipping\n");
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return;
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return 0;
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}
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arch_timers_present |= ARCH_CP15_TIMER;
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@ -774,23 +782,23 @@ static void __init arch_timer_of_init(struct device_node *np)
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of_property_read_bool(np, "arm,cpu-registers-not-fw-configured"))
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arch_timer_uses_ppi = PHYS_SECURE_PPI;
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arch_timer_init();
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return arch_timer_init();
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}
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CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
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CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
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CLOCKSOURCE_OF_DECLARE_RET(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
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CLOCKSOURCE_OF_DECLARE_RET(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
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static void __init arch_timer_mem_init(struct device_node *np)
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static int __init arch_timer_mem_init(struct device_node *np)
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{
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struct device_node *frame, *best_frame = NULL;
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void __iomem *cntctlbase, *base;
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unsigned int irq;
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unsigned int irq, ret = -EINVAL;
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u32 cnttidr;
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arch_timers_present |= ARCH_MEM_TIMER;
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cntctlbase = of_iomap(np, 0);
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if (!cntctlbase) {
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pr_err("arch_timer: Can't find CNTCTLBase\n");
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return;
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return -ENXIO;
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}
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cnttidr = readl_relaxed(cntctlbase + CNTTIDR);
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@ -830,6 +838,7 @@ static void __init arch_timer_mem_init(struct device_node *np)
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best_frame = of_node_get(frame);
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}
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ret= -ENXIO;
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base = arch_counter_base = of_iomap(best_frame, 0);
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if (!base) {
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pr_err("arch_timer: Can't map frame's registers\n");
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@ -841,6 +850,7 @@ static void __init arch_timer_mem_init(struct device_node *np)
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else
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irq = irq_of_parse_and_map(best_frame, 0);
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ret = -EINVAL;
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if (!irq) {
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pr_err("arch_timer: Frame missing %s irq",
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arch_timer_mem_use_virtual ? "virt" : "phys");
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@ -848,13 +858,17 @@ static void __init arch_timer_mem_init(struct device_node *np)
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}
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arch_timer_detect_rate(base, np);
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arch_timer_mem_register(base, irq);
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arch_timer_common_init();
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ret = arch_timer_mem_register(base, irq);
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if (ret)
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goto out;
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return arch_timer_common_init();
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out:
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iounmap(cntctlbase);
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of_node_put(best_frame);
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return ret;
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}
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CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
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CLOCKSOURCE_OF_DECLARE_RET(armv7_arch_timer_mem, "arm,armv7-timer-mem",
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arch_timer_mem_init);
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#ifdef CONFIG_ACPI
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