staging: brcm80211: restrict register access method for bcm47xx

The driver contained conditional code for resolving issue with
dma transaction reordering. This code was conditionalized using
__mips__ macro, but it actually is specific to bcm47xx chips.
This patch replaces it for the more speficic CONFIG_BCM47XX macro.

Tested on BCM63281.

Reviewed-by: Henry Ptasinski <henryp@broadcom.com>
Reviewed-by: Roland Vossen <rvossen@broadcom.com>
Tested-by: Jonas Gorski <jonas.gorski@gmail.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Arend van Spriel 2011-08-15 15:34:25 +02:00 committed by Greg Kroah-Hartman
parent a87602e075
commit 3bd8ef6799
2 changed files with 3 additions and 3 deletions

View File

@ -380,7 +380,7 @@ void write_phy_reg(struct brcms_phy *pi, u16 addr, u16 val)
regs = pi->regs;
#ifdef __mips__
#ifdef CONFIG_BCM47XX
W_REG_FLUSH(&regs->phyregaddr, addr);
W_REG(&regs->phyregdata, val);
if (addr == 0x72)

View File

@ -362,7 +362,7 @@ do { \
} \
} while (0)
#ifdef __mips__
#ifdef CONFIG_BCM47XX
/*
* bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder
* transactions. As a fix, a read after write is performed on certain places
@ -371,7 +371,7 @@ do { \
#define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); })
#else
#define W_REG_FLUSH(r, v) W_REG((r), (v))
#endif /* __mips__ */
#endif /* CONFIG_BCM47XX */
#define AND_REG(r, v) W_REG((r), R_REG(r) & (v))
#define OR_REG(r, v) W_REG((r), R_REG(r) | (v))