arm: mvebu: PCIe Device Tree informations for Armada 370 DB
The Marvell evaluation board (DB) for the Armada 370 SoC has 2 physical full-size PCIe slots, so we enable the corresponding PCIe interfaces in the Device Tree. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
parent
488d1a6ff9
commit
3b723ae8c6
|
@ -94,5 +94,22 @@
|
||||||
spi-max-frequency = <50000000>;
|
spi-max-frequency = <50000000>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
pcie-controller {
|
||||||
|
status = "okay";
|
||||||
|
/*
|
||||||
|
* The two PCIe units are accessible through
|
||||||
|
* both standard PCIe slots and mini-PCIe
|
||||||
|
* slots on the board.
|
||||||
|
*/
|
||||||
|
pcie@1,0 {
|
||||||
|
/* Port 0, Lane 0 */
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
pcie@2,0 {
|
||||||
|
/* Port 1, Lane 0 */
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
Loading…
Reference in New Issue