staging: fbtft: Add support for ili9163 controller
Driver for ili9163-based displays (for example: Nokia 5110) Signed-off-by: Kozhevnikov Anatoly <shilo.xyz@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Kozhevnikov Anatoly
Greg Kroah-Hartman
parent
cb422f3bbc
commit
3b143b5503
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@ -38,6 +38,12 @@ config FB_TFT_HX8353D
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help
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Generic Framebuffer support for HX8353D
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config FB_TFT_ILI9163
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tristate "FB driver for the ILI9163 LCD Controller"
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depends on FB_TFT
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help
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Generic Framebuffer support for ILI9163
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config FB_TFT_ILI9320
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tristate "FB driver for the ILI9320 LCD Controller"
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depends on FB_TFT
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@ -8,6 +8,7 @@ obj-$(CONFIG_FB_TFT_BD663474) += fb_bd663474.o
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obj-$(CONFIG_FB_TFT_HX8340BN) += fb_hx8340bn.o
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obj-$(CONFIG_FB_TFT_HX8347D) += fb_hx8347d.o
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obj-$(CONFIG_FB_TFT_HX8353D) += fb_hx8353d.o
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obj-$(CONFIG_FB_TFT_ILI9163) += fb_ili9163.o
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obj-$(CONFIG_FB_TFT_ILI9320) += fb_ili9320.o
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obj-$(CONFIG_FB_TFT_ILI9325) += fb_ili9325.o
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obj-$(CONFIG_FB_TFT_ILI9340) += fb_ili9340.o
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@ -0,0 +1,303 @@
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/*
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* FB driver for the ILI9163 LCD Controller
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*
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* Copyright (C) 2015 Kozhevnikov Anatoly
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*
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* Based on ili9325.c by Noralf Tronnes and
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* .S.U.M.O.T.O.Y. by Max MC Costa (https://github.com/sumotoy/TFT_ILI9163C).
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/gpio.h>
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#include <linux/delay.h>
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#include "fbtft.h"
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#define DRVNAME "fb_ili9163"
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#define WIDTH 128
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#define HEIGHT 128
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#define BPP 16
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#define FPS 30
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#ifdef GAMMA_ADJ
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#define GAMMA_LEN 15
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#define GAMMA_NUM 1
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#define DEFAULT_GAMMA "36 29 12 22 1C 15 42 B7 2F 13 12 0A 11 0B 06\n"
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#endif
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/* ILI9163C commands */
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#define CMD_NOP 0x00 /* Non operation*/
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#define CMD_SWRESET 0x01 /* Soft Reset */
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#define CMD_SLPIN 0x10 /* Sleep ON */
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#define CMD_SLPOUT 0x11 /* Sleep OFF */
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#define CMD_PTLON 0x12 /* Partial Mode ON */
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#define CMD_NORML 0x13 /* Normal Display ON */
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#define CMD_DINVOF 0x20 /* Display Inversion OFF */
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#define CMD_DINVON 0x21 /* Display Inversion ON */
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#define CMD_GAMMASET 0x26 /* Gamma Set (0x01[1],0x02[2],0x04[3],0x08[4]) */
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#define CMD_DISPOFF 0x28 /* Display OFF */
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#define CMD_DISPON 0x29 /* Display ON */
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#define CMD_IDLEON 0x39 /* Idle Mode ON */
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#define CMD_IDLEOF 0x38 /* Idle Mode OFF */
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#define CMD_CLMADRS 0x2A /* Column Address Set */
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#define CMD_PGEADRS 0x2B /* Page Address Set */
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#define CMD_RAMWR 0x2C /* Memory Write */
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#define CMD_RAMRD 0x2E /* Memory Read */
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#define CMD_CLRSPACE 0x2D /* Color Space : 4K/65K/262K */
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#define CMD_PARTAREA 0x30 /* Partial Area */
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#define CMD_VSCLLDEF 0x33 /* Vertical Scroll Definition */
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#define CMD_TEFXLON 0x34 /* Tearing Effect Line ON */
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#define CMD_TEFXLOF 0x35 /* Tearing Effect Line OFF */
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#define CMD_MADCTL 0x36 /* Memory Access Control */
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#define CMD_PIXFMT 0x3A /* Interface Pixel Format */
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#define CMD_FRMCTR1 0xB1 /* Frame Rate Control
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(In normal mode/Full colors) */
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#define CMD_FRMCTR2 0xB2 /* Frame Rate Control (In Idle mode/8-colors) */
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#define CMD_FRMCTR3 0xB3 /* Frame Rate Control
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(In Partial mode/full colors) */
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#define CMD_DINVCTR 0xB4 /* Display Inversion Control */
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#define CMD_RGBBLK 0xB5 /* RGB Interface Blanking Porch setting */
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#define CMD_DFUNCTR 0xB6 /* Display Function set 5 */
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#define CMD_SDRVDIR 0xB7 /* Source Driver Direction Control */
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#define CMD_GDRVDIR 0xB8 /* Gate Driver Direction Control */
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#define CMD_PWCTR1 0xC0 /* Power_Control1 */
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#define CMD_PWCTR2 0xC1 /* Power_Control2 */
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#define CMD_PWCTR3 0xC2 /* Power_Control3 */
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#define CMD_PWCTR4 0xC3 /* Power_Control4 */
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#define CMD_PWCTR5 0xC4 /* Power_Control5 */
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#define CMD_VCOMCTR1 0xC5 /* VCOM_Control 1 */
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#define CMD_VCOMCTR2 0xC6 /* VCOM_Control 2 */
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#define CMD_VCOMOFFS 0xC7 /* VCOM Offset Control */
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#define CMD_PGAMMAC 0xE0 /* Positive Gamma Correction Setting */
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#define CMD_NGAMMAC 0xE1 /* Negative Gamma Correction Setting */
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#define CMD_GAMRSEL 0xF2 /* GAM_R_SEL */
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/*
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This display:
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http://www.ebay.com/itm/Replace-Nokia-5110-LCD-1-44-Red-Serial-128X128-SPI-Color-TFT-LCD-Display-Module-/271422122271
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This particular display has a design error! The controller has 3 pins to
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configure to constrain the memory and resolution to a fixed dimension (in
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that case 128x128) but they leaved those pins configured for 128x160 so
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there was several pixel memory addressing problems.
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I solved by setup several parameters that dinamically fix the resolution as
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needit so below the parameters for this display. If you have a strain or a
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correct display (can happen with chinese) you can copy those parameters and
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create setup for different displays.
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*/
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#ifdef RED
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#define __OFFSET 32 /*see note 2 - this is the red version */
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#else
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#define __OFFSET 0 /*see note 2 - this is the black version */
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#endif
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static int init_display(struct fbtft_par *par)
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{
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fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
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par->fbtftops.reset(par);
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if (par->gpio.cs != -1)
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gpio_set_value(par->gpio.cs, 0); /* Activate chip */
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write_reg(par, CMD_SWRESET); /* software reset */
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mdelay(500);
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write_reg(par, CMD_SLPOUT); /* exit sleep */
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mdelay(5);
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write_reg(par, CMD_PIXFMT, 0x05); /* Set Color Format 16bit */
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write_reg(par, CMD_GAMMASET, 0x02); /* default gamma curve 3 */
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#ifdef GAMMA_ADJ
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write_reg(par, CMD_GAMRSEL, 0x01); /* Enable Gamma adj */
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#endif
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write_reg(par, CMD_NORML);
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write_reg(par, CMD_DFUNCTR, 0xff, 0x06);
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/* Frame Rate Control (In normal mode/Full colors) */
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write_reg(par, CMD_FRMCTR1, 0x08, 0x02);
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write_reg(par, CMD_DINVCTR, 0x07); /* display inversion */
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/* Set VRH1[4:0] & VC[2:0] for VCI1 & GVDD */
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write_reg(par, CMD_PWCTR1, 0x0A, 0x02);
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/* Set BT[2:0] for AVDD & VCL & VGH & VGL */
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write_reg(par, CMD_PWCTR2, 0x02);
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/* Set VMH[6:0] & VML[6:0] for VOMH & VCOML */
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write_reg(par, CMD_VCOMCTR1, 0x50, 0x63);
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write_reg(par, CMD_VCOMOFFS, 0);
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write_reg(par, CMD_CLMADRS, 0, 0, 0, WIDTH); /* Set Column Address */
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write_reg(par, CMD_PGEADRS, 0, 0, 0, HEIGHT); /* Set Page Address */
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write_reg(par, CMD_DISPON); /* display ON */
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write_reg(par, CMD_RAMWR); /* Memory Write */
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return 0;
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}
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static void set_addr_win(struct fbtft_par *par, int xs, int ys,
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int xe, int ye)
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{
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fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par,
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"%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye);
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switch (par->info->var.rotate) {
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case 0:
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write_reg(par, CMD_CLMADRS, xs >> 8, xs & 0xff, xe >> 8,
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xe & 0xff);
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write_reg(par, CMD_PGEADRS,
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(ys + __OFFSET) >> 8, (ys + __OFFSET) & 0xff,
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(ye + __OFFSET) >> 8, (ye + __OFFSET) & 0xff);
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break;
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case 90:
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write_reg(par, CMD_CLMADRS,
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(xs + __OFFSET) >> 8, (xs + __OFFSET) & 0xff,
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(xe + __OFFSET) >> 8, (xe + __OFFSET) & 0xff);
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write_reg(par, CMD_PGEADRS, ys >> 8, ys & 0xff, ye >> 8,
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ye & 0xff);
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break;
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case 180:
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case 270:
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write_reg(par, CMD_CLMADRS, xs >> 8, xs & 0xff, xe >> 8,
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xe & 0xff);
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write_reg(par, CMD_PGEADRS, ys >> 8, ys & 0xff, ye >> 8,
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ye & 0xff);
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break;
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default:
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par->info->var.rotate = 0; /* Fix incorrect setting */
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}
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write_reg(par, CMD_RAMWR); /* Write Data to GRAM mode */
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}
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/*
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7) MY: 1(bottom to top), 0(top to bottom) Row Address Order
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6) MX: 1(R to L), 0(L to R) Column Address Order
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5) MV: 1(Exchanged), 0(normal) Row/Column exchange
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4) ML: 1(bottom to top), 0(top to bottom) Vertical Refresh Order
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3) RGB: 1(BGR), 0(RGB) Color Space
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2) MH: 1(R to L), 0(L to R) Horizontal Refresh Order
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1)
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0)
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MY, MX, MV, ML,RGB, MH, D1, D0
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0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 //normal
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1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 //Y-Mirror
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0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 //X-Mirror
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1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 //X-Y-Mirror
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0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 //X-Y Exchange
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1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 //X-Y Exchange, Y-Mirror
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0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 //XY exchange
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1 | 1 | 1 | 0 | 1 | 0 | 0 | 0
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*/
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static int set_var(struct fbtft_par *par)
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{
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u8 mactrl_data = 0; /* Avoid compiler warning */
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fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
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switch (par->info->var.rotate) {
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case 0:
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mactrl_data = 0x08;
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break;
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case 180:
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mactrl_data = 0xC8;
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break;
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case 270:
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mactrl_data = 0xA8;
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break;
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case 90:
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mactrl_data = 0x68;
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break;
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}
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/* Colorspcae */
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if (par->bgr)
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mactrl_data |= (1 << 2);
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write_reg(par, CMD_MADCTL, mactrl_data);
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write_reg(par, CMD_RAMWR); /* Write Data to GRAM mode */
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return 0;
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}
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#ifdef GAMMA_ADJ
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#define CURVE(num, idx) curves[num*par->gamma.num_values + idx]
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static int gamma_adj(struct fbtft_par *par, unsigned long *curves)
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{
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unsigned long mask[] = {
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
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0x1f, 0x3f, 0x0f, 0x0f, 0x7f, 0x1f,
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0x3F, 0x3F, 0x3F, 0x3F, 0x3F};
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int i, j;
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fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
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for (i = 0; i < GAMMA_NUM; i++)
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for (j = 0; j < GAMMA_LEN; j++)
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CURVE(i, j) &= mask[i*par->gamma.num_values + j];
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write_reg(par, CMD_PGAMMAC,
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CURVE(0, 0),
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CURVE(0, 1),
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CURVE(0, 2),
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CURVE(0, 3),
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CURVE(0, 4),
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CURVE(0, 5),
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CURVE(0, 6),
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(CURVE(0, 7) << 4) | CURVE(0, 8),
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CURVE(0, 9),
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CURVE(0, 10),
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CURVE(0, 11),
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CURVE(0, 12),
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CURVE(0, 13),
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CURVE(0, 14),
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CURVE(0, 15)
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);
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write_reg(par, CMD_RAMWR); /* Write Data to GRAM mode */
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return 0;
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}
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#undef CURVE
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#endif
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static struct fbtft_display display = {
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.regwidth = 8,
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.width = WIDTH,
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.height = HEIGHT,
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.bpp = BPP,
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.fps = FPS,
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#ifdef GAMMA_ADJ
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.gamma_num = GAMMA_NUM,
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.gamma_len = GAMMA_LEN,
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.gamma = DEFAULT_GAMMA,
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#endif
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.fbtftops = {
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.init_display = init_display,
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.set_addr_win = set_addr_win,
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.set_var = set_var,
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#ifdef GAMMA_ADJ
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.set_gamma = gamma_adj,
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#endif
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},
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};
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FBTFT_REGISTER_DRIVER(DRVNAME, "ilitek,ili9163", &display);
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MODULE_ALIAS("spi:" DRVNAME);
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MODULE_ALIAS("platform:" DRVNAME);
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MODULE_ALIAS("spi:ili9163");
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MODULE_ALIAS("platform:ili9163");
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MODULE_DESCRIPTION("FB driver for the ILI9163 LCD Controller");
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MODULE_AUTHOR("Kozhevnikov Anatoly");
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MODULE_LICENSE("GPL");
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@ -702,6 +702,24 @@ static struct fbtft_device_display displays[] = {
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}
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}
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}, {
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.name = "nokia5110",
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.spi = &(struct spi_board_info) {
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.modalias = "fb_ili9163",
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.max_speed_hz = 12000000,
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.mode = SPI_MODE_0,
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.platform_data = &(struct fbtft_platform_data) {
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.display = {
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.buswidth = 8,
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.backlight = 1,
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},
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.bgr = true,
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.gpios = (const struct fbtft_gpio []) {
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{},
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},
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}
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}
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}, {
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.name = "piscreen",
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.spi = &(struct spi_board_info) {
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.modalias = "fb_ili9486",
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