powerpc fixes for 4.9 #6
Fixes marked for stable: - Set missing wakeup bit in LPCR on POWER9 (Benjamin Herrenschmidt) - Fix the early OPAL console wrappers (Oliver O'Halloran) - Fixup kernel read only mapping (Aneesh Kumar K.V) Fixes for code merged this cycle: - Fix missing CRCs, add more asm-prototypes.h declarations (Nicholas Piggin) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJYOTtHAAoJEFHr6jzI4aWAGDkP+wQB4UWU35wjU9QIVTwk5Xoo TngN0iDa659/qBlnfnWpP7LjfePrkJxmvF9C8xBACF21iQ5Yzh0AZ93jQw6wa20H smZqlXC29CvEbo5V5yqc/STeOeAPs5mDECLNR+tue5Rc9H+FXBTu8H+L/B+UUk56 IyR/hyns4HNo1bEj9hp/7MwHzMKWLkvKeRKuFeXU+CF8o+CNWBFjtlH2UYZhBtM8 QhIuPxWxVDGJa1JT6OJxm1wAJzTvNPW8Nm5BQvDc5eSTVW8KlV4hx47fAGQMFzFf tP87KbQLqpR4WqrJQn+/NwayjhaCXCojc0XpY4EjwQL2EZ9nyU2XwOquxzghJnuD zdKFI7NvuCI/VUMa3OT+1XyJE2DuUT1MJN/kICGi2y4T43TGwTFwVgimcsoQQ0YU oet9ISs5bxh3xdKfzlen6mM9r61HDFUgsYmIwID8EAucyLnVa8GLUT5E+x90FKDO /P3B4BB/5b87BdcmqVYyiP3QB1MrqiaV0ogngmoW3lPeiSYu1AgkNkmniDTsW93z t6cYi5gjqquABbpMpmRIHDr/Uhc8zTn/7f/hjRbQ3ujyDjwqQ7b28498JYx4nGkL FIfpJOjHuTzoCvYvGelY6F/FD+NNHvijTShR788aTYECXmVO7CKGRCJalVTMw/iw w2sx5fcurB470Pr9GR5j =75sc -----END PGP SIGNATURE----- Merge tag 'powerpc-4.9-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: "Fixes marked for stable: - Set missing wakeup bit in LPCR on POWER9 - Fix the early OPAL console wrappers - Fixup kernel read only mapping Fixes for code merged this cycle: - Fix missing CRCs, add more asm-prototypes.h declarations" * tag 'powerpc-4.9-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/mm: Fixup kernel read only mapping powerpc/boot: Fix the early OPAL console wrappers powerpc: Fix missing CRCs, add more asm-prototypes.h declarations powerpc: Set missing wakeup bit in LPCR on POWER9
This commit is contained in:
commit
39c1573748
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@ -232,8 +232,12 @@ void start(void)
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console_ops.close();
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kentry = (kernel_entry_t) vmlinux.addr;
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if (ft_addr)
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kentry(ft_addr, 0, NULL);
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if (ft_addr) {
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if(platform_ops.kentry)
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platform_ops.kentry(ft_addr, vmlinux.addr);
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else
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kentry(ft_addr, 0, NULL);
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}
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else
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kentry((unsigned long)initrd.addr, initrd.size,
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loader_info.promptr);
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@ -12,6 +12,19 @@
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.text
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.globl opal_kentry
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opal_kentry:
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/* r3 is the fdt ptr */
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mtctr r4
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li r4, 0
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li r5, 0
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li r6, 0
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li r7, 0
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ld r11,opal@got(r2)
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ld r8,0(r11)
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ld r9,8(r11)
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bctr
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#define OPAL_CALL(name, token) \
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.globl name; \
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name: \
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@ -23,14 +23,25 @@ struct opal {
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static u32 opal_con_id;
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/* see opal-wrappers.S */
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int64_t opal_console_write(int64_t term_number, u64 *length, const u8 *buffer);
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int64_t opal_console_read(int64_t term_number, uint64_t *length, u8 *buffer);
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int64_t opal_console_write_buffer_space(uint64_t term_number, uint64_t *length);
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int64_t opal_console_flush(uint64_t term_number);
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int64_t opal_poll_events(uint64_t *outstanding_event_mask);
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void opal_kentry(unsigned long fdt_addr, void *vmlinux_addr);
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static int opal_con_open(void)
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{
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/*
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* When OPAL loads the boot kernel it stashes the OPAL base and entry
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* address in r8 and r9 so the kernel can use the OPAL console
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* before unflattening the devicetree. While executing the wrapper will
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* probably trash r8 and r9 so this kentry hook restores them before
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* entering the decompressed kernel.
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*/
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platform_ops.kentry = opal_kentry;
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return 0;
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}
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@ -30,6 +30,7 @@ struct platform_ops {
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void * (*realloc)(void *ptr, unsigned long size);
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void (*exit)(void);
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void * (*vmlinux_alloc)(unsigned long size);
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void (*kentry)(unsigned long fdt_addr, void *vmlinux_addr);
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};
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extern struct platform_ops platform_ops;
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@ -14,6 +14,10 @@
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#include <linux/threads.h>
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#include <linux/kprobes.h>
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#include <asm/cacheflush.h>
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#include <asm/checksum.h>
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#include <asm/uaccess.h>
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#include <asm/epapr_hcalls.h>
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#include <uapi/asm/ucontext.h>
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@ -109,4 +113,12 @@ void early_setup_secondary(void);
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/* time */
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void accumulate_stolen_time(void);
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/* misc runtime */
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extern u64 __bswapdi2(u64);
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extern s64 __lshrdi3(s64, int);
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extern s64 __ashldi3(s64, int);
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extern s64 __ashrdi3(s64, int);
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extern int __cmpdi2(s64, s64);
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extern int __ucmpdi2(u64, u64);
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#endif /* _ASM_POWERPC_ASM_PROTOTYPES_H */
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@ -28,6 +28,12 @@
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* Individual features below.
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*/
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/*
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* Kernel read only support.
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* We added the ppp value 0b110 in ISA 2.04.
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*/
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#define MMU_FTR_KERNEL_RO ASM_CONST(0x00004000)
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/*
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* We need to clear top 16bits of va (from the remaining 64 bits )in
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* tlbie* instructions
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@ -103,10 +109,10 @@
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#define MMU_FTRS_POWER4 MMU_FTRS_DEFAULT_HPTE_ARCH_V2
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#define MMU_FTRS_PPC970 MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA
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#define MMU_FTRS_POWER5 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
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#define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
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#define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
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#define MMU_FTRS_POWER8 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
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#define MMU_FTRS_POWER9 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
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#define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO
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#define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO
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#define MMU_FTRS_POWER8 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO
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#define MMU_FTRS_POWER9 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO
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#define MMU_FTRS_CELL MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
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MMU_FTR_CI_LARGE_PAGE
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#define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
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@ -355,6 +355,7 @@
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#define LPCR_PECE0 ASM_CONST(0x0000000000004000) /* ext. exceptions can cause exit */
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#define LPCR_PECE1 ASM_CONST(0x0000000000002000) /* decrementer can cause exit */
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#define LPCR_PECE2 ASM_CONST(0x0000000000001000) /* machine check etc can cause exit */
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#define LPCR_PECE_HVEE ASM_CONST(0x0000400000000000) /* P9 Wakeup on HV interrupts */
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#define LPCR_MER ASM_CONST(0x0000000000000800) /* Mediated External Exception */
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#define LPCR_MER_SH 11
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#define LPCR_TC ASM_CONST(0x0000000000000200) /* Translation control */
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@ -98,8 +98,8 @@ _GLOBAL(__setup_cpu_power9)
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li r0,0
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mtspr SPRN_LPID,r0
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mfspr r3,SPRN_LPCR
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ori r3, r3, LPCR_PECEDH
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ori r3, r3, LPCR_HVICE
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LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE)
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or r3, r3, r4
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bl __init_LPCR
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bl __init_HFSCR
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bl __init_tlb_power9
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li r0,0
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mtspr SPRN_LPID,r0
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mfspr r3,SPRN_LPCR
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ori r3, r3, LPCR_PECEDH
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ori r3, r3, LPCR_HVICE
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LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE)
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or r3, r3, r4
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bl __init_LPCR
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bl __init_HFSCR
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bl __init_tlb_power9
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@ -193,8 +193,12 @@ unsigned long htab_convert_pte_flags(unsigned long pteflags)
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/*
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* Kernel read only mapped with ppp bits 0b110
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*/
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if (!(pteflags & _PAGE_WRITE))
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rflags |= (HPTE_R_PP0 | 0x2);
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if (!(pteflags & _PAGE_WRITE)) {
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if (mmu_has_feature(MMU_FTR_KERNEL_RO))
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rflags |= (HPTE_R_PP0 | 0x2);
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else
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rflags |= 0x3;
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}
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} else {
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if (pteflags & _PAGE_RWX)
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rflags |= 0x2;
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