pwm: Changes for v3.14-rc1
The patches for this release cycle include various enhancements (device tree support, better compile coverage, ...) for existing drivers. There is a new driver for Atmel SoCs. Various drivers as well as the sysfs support received minor fixes and cleanups. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABAgAGBQJS5m3bAAoJEN0jrNd/PrOhukQP/RdjGTUc8McrOt6pU20xKedI Sg2HfA77ODWb1T8iigO31qOfCzEhtpl15AZ9kpj6sgLP17PQAlMBQWxQO9iHwRIv GSGCW8RoWq1yvMImBn6LswR6a+aczsbI46z9kMvBGAsl58AETjR82dxH/nuJ6CVw cTUIaysmnOhDCidPBSQ2JG/TrmAqhM1wmaixv/39LtIt3pFC5XKoj5rQqPlLKVrZ r87ZvwKdoX9z87L1gDOxybGOhcKJOKU8Qc8MlQjYzIUzwd91V7fsGF+98RB7e1k2 +I/U0YYRFVfLIc2xxHtQZe80khhWTAOEkzvVOS7jgoXI41AlIlT6rOQnRCuMRniv YfPTMAQDln+npDEZ4xgdB6qUHIUtduNm2sfL6hWox8xG3Z8Wk5b2IlyBx+kwhSwY MiM6UZjuENi+XjO/Ea+oJtD6CJ+U48g++mrQhB+BY1IzmEmIeMH6Qut5I0grotjm qgjw+hEoFL9lJ190OXM9Fxu8aoDcGCIWS/UtXTG8q+V/jBmMeBvqj2jscnrMsZXF 3CTpIquKIHe83A8CLdD0AXauE4TJ/8Eh0zY+jEJzBNDgIFkqZJPIVrmwPgMCFz5O 2Vux3WDxIqXDYJ1RjKeNGUFEfnRPa1PUqc2un9512xJkthXQD4EYE9/P+/MOVGXX UJoi2MMv4Cmkbs+bMTns =Rq3R -----END PGP SIGNATURE----- Merge tag 'pwm/for-3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm changes from Thierry Reding: "The patches for this release cycle include various enhancements (device tree support, better compile coverage, ...) for existing drivers. There is a new driver for Atmel SoCs. Various drivers as well as the sysfs support received minor fixes and cleanups" * tag 'pwm/for-3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: tiecap: Remove duplicate put_sync call pwm: tiehrpwm: use dev_err() instead of pr_err() pwm: pxa: remove unnecessary space before tabs pwm: ep93xx: split module author names pwm: use seq_puts() instead of seq_printf() pwm: atmel-pwm: Do not unprepare clock after successful registration of: Add Atmel PWM controller device tree binding pwm: atmel-pwm: Add Atmel PWM controller driver backlight: pwm_bl: Remove error message upon devm_kzalloc() failure pwm: pca9685: depends on I2C rather than REGMAP_I2C pwm: renesas-tpu: Enable driver compilation with COMPILE_TEST pwm: jz4740: Use devm_clk_get() pwm: jz4740: Pass device to clk_get() pwm: sysfs: Convert to use ATTRIBUTE_GROUPS macro pwm: pxa: Add device tree support
This commit is contained in:
Linus Torvalds
commit
398b60a8de
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@ -0,0 +1,33 @@
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Atmel PWM controller
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Required properties:
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- compatible: should be one of:
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- "atmel,at91sam9rl-pwm"
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- "atmel,sama5d3-pwm"
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- reg: physical base address and length of the controller's registers
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- #pwm-cells: Should be 3. See pwm.txt in this directory for a
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description of the cells format.
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Example:
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pwm0: pwm@f8034000 {
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compatible = "atmel,at91sam9rl-pwm";
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reg = <0xf8034000 0x400>;
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#pwm-cells = <3>;
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};
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pwmleds {
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compatible = "pwm-leds";
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d1 {
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label = "d1";
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pwms = <&pwm0 3 5000 0>
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max-brightness = <255>;
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};
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d2 {
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label = "d2";
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pwms = <&pwm0 1 5000 1>
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max-brightness = <255>;
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};
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};
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@ -0,0 +1,30 @@
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Marvell PWM controller
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Required properties:
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- compatible: should be one or more of:
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- "marvell,pxa250-pwm"
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- "marvell,pxa270-pwm"
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- "marvell,pxa168-pwm"
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- "marvell,pxa910-pwm"
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- reg: Physical base address and length of the registers used by the PWM channel
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Note that one device instance must be created for each PWM that is used, so the
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length covers only the register window for one PWM output, not that of the
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entire PWM controller. Currently length is 0x10 for all supported devices.
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- #pwm-cells: Should be 1. This cell is used to specify the period in
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nanoseconds.
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Example PWM device node:
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pwm0: pwm@40b00000 {
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compatible = "marvell,pxa250-pwm";
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reg = <0x40b00000 0x10>;
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#pwm-cells = <1>;
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};
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Example PWM client node:
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backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm0 5000000>;
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...
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}
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@ -41,6 +41,15 @@ config PWM_AB8500
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To compile this driver as a module, choose M here: the module
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will be called pwm-ab8500.
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config PWM_ATMEL
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tristate "Atmel PWM support"
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depends on ARCH_AT91
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help
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Generic PWM framework driver for Atmel SoC.
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To compile this driver as a module, choose M here: the module
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will be called pwm-atmel.
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config PWM_ATMEL_TCB
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tristate "Atmel TC Block PWM support"
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depends on ATMEL_TCLIB && OF
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@ -122,7 +131,8 @@ config PWM_MXS
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config PWM_PCA9685
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tristate "NXP PCA9685 PWM driver"
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depends on OF && REGMAP_I2C
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depends on OF && I2C
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select REGMAP_I2C
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help
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Generic PWM framework driver for NXP PCA9685 LED controller.
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@ -149,7 +159,7 @@ config PWM_PXA
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config PWM_RENESAS_TPU
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tristate "Renesas TPU PWM support"
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depends on ARCH_SHMOBILE
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depends on ARCH_SHMOBILE || COMPILE_TEST
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help
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This driver exposes the Timer Pulse Unit (TPU) PWM controller found
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in Renesas chips through the PWM API.
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@ -1,6 +1,7 @@
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obj-$(CONFIG_PWM) += core.o
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obj-$(CONFIG_PWM_SYSFS) += sysfs.o
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obj-$(CONFIG_PWM_AB8500) += pwm-ab8500.o
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obj-$(CONFIG_PWM_ATMEL) += pwm-atmel.o
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obj-$(CONFIG_PWM_ATMEL_TCB) += pwm-atmel-tcb.o
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obj-$(CONFIG_PWM_BFIN) += pwm-bfin.o
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obj-$(CONFIG_PWM_EP93XX) += pwm-ep93xx.o
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@ -808,12 +808,12 @@ static void pwm_dbg_show(struct pwm_chip *chip, struct seq_file *s)
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seq_printf(s, " pwm-%-3d (%-20.20s):", i, pwm->label);
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if (test_bit(PWMF_REQUESTED, &pwm->flags))
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seq_printf(s, " requested");
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seq_puts(s, " requested");
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if (test_bit(PWMF_ENABLED, &pwm->flags))
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seq_printf(s, " enabled");
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seq_puts(s, " enabled");
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seq_printf(s, "\n");
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seq_puts(s, "\n");
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}
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}
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@ -0,0 +1,395 @@
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/*
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* Driver for Atmel Pulse Width Modulation Controller
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*
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* Copyright (C) 2013 Atmel Corporation
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* Bo Shen <voice.shen@atmel.com>
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*
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* Licensed under GPLv2.
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/slab.h>
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/* The following is global registers for PWM controller */
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#define PWM_ENA 0x04
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#define PWM_DIS 0x08
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#define PWM_SR 0x0C
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/* Bit field in SR */
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#define PWM_SR_ALL_CH_ON 0x0F
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/* The following register is PWM channel related registers */
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#define PWM_CH_REG_OFFSET 0x200
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#define PWM_CH_REG_SIZE 0x20
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#define PWM_CMR 0x0
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/* Bit field in CMR */
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#define PWM_CMR_CPOL (1 << 9)
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#define PWM_CMR_UPD_CDTY (1 << 10)
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/* The following registers for PWM v1 */
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#define PWMV1_CDTY 0x04
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#define PWMV1_CPRD 0x08
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#define PWMV1_CUPD 0x10
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/* The following registers for PWM v2 */
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#define PWMV2_CDTY 0x04
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#define PWMV2_CDTYUPD 0x08
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#define PWMV2_CPRD 0x0C
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#define PWMV2_CPRDUPD 0x10
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/*
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* Max value for duty and period
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*
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* Although the duty and period register is 32 bit,
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* however only the LSB 16 bits are significant.
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*/
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#define PWM_MAX_DTY 0xFFFF
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#define PWM_MAX_PRD 0xFFFF
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#define PRD_MAX_PRES 10
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struct atmel_pwm_chip {
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struct pwm_chip chip;
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struct clk *clk;
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void __iomem *base;
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void (*config)(struct pwm_chip *chip, struct pwm_device *pwm,
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unsigned long dty, unsigned long prd);
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};
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static inline struct atmel_pwm_chip *to_atmel_pwm_chip(struct pwm_chip *chip)
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{
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return container_of(chip, struct atmel_pwm_chip, chip);
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}
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static inline u32 atmel_pwm_readl(struct atmel_pwm_chip *chip,
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unsigned long offset)
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{
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return readl_relaxed(chip->base + offset);
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}
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static inline void atmel_pwm_writel(struct atmel_pwm_chip *chip,
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unsigned long offset, unsigned long val)
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{
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writel_relaxed(val, chip->base + offset);
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}
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static inline u32 atmel_pwm_ch_readl(struct atmel_pwm_chip *chip,
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unsigned int ch, unsigned long offset)
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{
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unsigned long base = PWM_CH_REG_OFFSET + ch * PWM_CH_REG_SIZE;
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return readl_relaxed(chip->base + base + offset);
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}
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static inline void atmel_pwm_ch_writel(struct atmel_pwm_chip *chip,
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unsigned int ch, unsigned long offset,
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unsigned long val)
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{
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unsigned long base = PWM_CH_REG_OFFSET + ch * PWM_CH_REG_SIZE;
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writel_relaxed(val, chip->base + base + offset);
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}
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static int atmel_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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int duty_ns, int period_ns)
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{
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struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip);
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unsigned long clk_rate, prd, dty;
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unsigned long long div;
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unsigned int pres = 0;
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int ret;
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if (test_bit(PWMF_ENABLED, &pwm->flags) && (period_ns != pwm->period)) {
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dev_err(chip->dev, "cannot change PWM period while enabled\n");
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return -EBUSY;
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}
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clk_rate = clk_get_rate(atmel_pwm->clk);
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div = clk_rate;
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/* Calculate the period cycles */
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while (div > PWM_MAX_PRD) {
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div = clk_rate / (1 << pres);
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div = div * period_ns;
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/* 1/Hz = 100000000 ns */
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do_div(div, 1000000000);
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if (pres++ > PRD_MAX_PRES) {
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dev_err(chip->dev, "pres exceeds the maximum value\n");
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return -EINVAL;
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}
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}
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/* Calculate the duty cycles */
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prd = div;
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div *= duty_ns;
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do_div(div, period_ns);
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dty = div;
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ret = clk_enable(atmel_pwm->clk);
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if (ret) {
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dev_err(chip->dev, "failed to enable PWM clock\n");
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return ret;
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}
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atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, pres);
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atmel_pwm->config(chip, pwm, dty, prd);
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clk_disable(atmel_pwm->clk);
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return ret;
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}
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static void atmel_pwm_config_v1(struct pwm_chip *chip, struct pwm_device *pwm,
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unsigned long dty, unsigned long prd)
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{
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struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip);
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unsigned int val;
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if (test_bit(PWMF_ENABLED, &pwm->flags)) {
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/*
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* If the PWM channel is enabled, using the update register,
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* it needs to set bit 10 of CMR to 0
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*/
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atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CUPD, dty);
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val = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, PWM_CMR);
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val &= ~PWM_CMR_UPD_CDTY;
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atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, val);
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} else {
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/*
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* If the PWM channel is disabled, write value to duty and
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* period registers directly.
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*/
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atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CDTY, dty);
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atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CPRD, prd);
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}
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}
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static void atmel_pwm_config_v2(struct pwm_chip *chip, struct pwm_device *pwm,
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unsigned long dty, unsigned long prd)
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{
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struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip);
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if (test_bit(PWMF_ENABLED, &pwm->flags)) {
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/*
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* If the PWM channel is enabled, using the duty update register
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* to update the value.
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*/
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atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CDTYUPD, dty);
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} else {
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/*
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* If the PWM channel is disabled, write value to duty and
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* period registers directly.
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*/
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atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CDTY, dty);
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atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CPRD, prd);
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}
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}
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|
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static int atmel_pwm_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm,
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enum pwm_polarity polarity)
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{
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struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip);
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u32 val;
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int ret;
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val = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, PWM_CMR);
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if (polarity == PWM_POLARITY_NORMAL)
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val &= ~PWM_CMR_CPOL;
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else
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val |= PWM_CMR_CPOL;
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|
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ret = clk_enable(atmel_pwm->clk);
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if (ret) {
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dev_err(chip->dev, "failed to enable PWM clock\n");
|
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return ret;
|
||||
}
|
||||
|
||||
atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, val);
|
||||
|
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clk_disable(atmel_pwm->clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int atmel_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
|
||||
{
|
||||
struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip);
|
||||
int ret;
|
||||
|
||||
ret = clk_enable(atmel_pwm->clk);
|
||||
if (ret) {
|
||||
dev_err(chip->dev, "failed to enable PWM clock\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
atmel_pwm_writel(atmel_pwm, PWM_ENA, 1 << pwm->hwpwm);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void atmel_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
|
||||
{
|
||||
struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip);
|
||||
|
||||
atmel_pwm_writel(atmel_pwm, PWM_DIS, 1 << pwm->hwpwm);
|
||||
|
||||
clk_disable(atmel_pwm->clk);
|
||||
}
|
||||
|
||||
static const struct pwm_ops atmel_pwm_ops = {
|
||||
.config = atmel_pwm_config,
|
||||
.set_polarity = atmel_pwm_set_polarity,
|
||||
.enable = atmel_pwm_enable,
|
||||
.disable = atmel_pwm_disable,
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
struct atmel_pwm_data {
|
||||
void (*config)(struct pwm_chip *chip, struct pwm_device *pwm,
|
||||
unsigned long dty, unsigned long prd);
|
||||
};
|
||||
|
||||
static const struct atmel_pwm_data atmel_pwm_data_v1 = {
|
||||
.config = atmel_pwm_config_v1,
|
||||
};
|
||||
|
||||
static const struct atmel_pwm_data atmel_pwm_data_v2 = {
|
||||
.config = atmel_pwm_config_v2,
|
||||
};
|
||||
|
||||
static const struct platform_device_id atmel_pwm_devtypes[] = {
|
||||
{
|
||||
.name = "at91sam9rl-pwm",
|
||||
.driver_data = (kernel_ulong_t)&atmel_pwm_data_v1,
|
||||
}, {
|
||||
.name = "sama5d3-pwm",
|
||||
.driver_data = (kernel_ulong_t)&atmel_pwm_data_v2,
|
||||
}, {
|
||||
/* sentinel */
|
||||
},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(platform, atmel_pwm_devtypes);
|
||||
|
||||
static const struct of_device_id atmel_pwm_dt_ids[] = {
|
||||
{
|
||||
.compatible = "atmel,at91sam9rl-pwm",
|
||||
.data = &atmel_pwm_data_v1,
|
||||
}, {
|
||||
.compatible = "atmel,sama5d3-pwm",
|
||||
.data = &atmel_pwm_data_v2,
|
||||
}, {
|
||||
/* sentinel */
|
||||
},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, atmel_pwm_dt_ids);
|
||||
|
||||
static inline const struct atmel_pwm_data *
|
||||
atmel_pwm_get_driver_data(struct platform_device *pdev)
|
||||
{
|
||||
if (pdev->dev.of_node) {
|
||||
const struct of_device_id *match;
|
||||
|
||||
match = of_match_device(atmel_pwm_dt_ids, &pdev->dev);
|
||||
if (!match)
|
||||
return NULL;
|
||||
|
||||
return match->data;
|
||||
} else {
|
||||
const struct platform_device_id *id;
|
||||
|
||||
id = platform_get_device_id(pdev);
|
||||
|
||||
return (struct atmel_pwm_data *)id->driver_data;
|
||||
}
|
||||
}
|
||||
|
||||
static int atmel_pwm_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct atmel_pwm_data *data;
|
||||
struct atmel_pwm_chip *atmel_pwm;
|
||||
struct resource *res;
|
||||
int ret;
|
||||
|
||||
data = atmel_pwm_get_driver_data(pdev);
|
||||
if (!data)
|
||||
return -ENODEV;
|
||||
|
||||
atmel_pwm = devm_kzalloc(&pdev->dev, sizeof(*atmel_pwm), GFP_KERNEL);
|
||||
if (!atmel_pwm)
|
||||
return -ENOMEM;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
atmel_pwm->base = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(atmel_pwm->base))
|
||||
return PTR_ERR(atmel_pwm->base);
|
||||
|
||||
atmel_pwm->clk = devm_clk_get(&pdev->dev, NULL);
|
||||
if (IS_ERR(atmel_pwm->clk))
|
||||
return PTR_ERR(atmel_pwm->clk);
|
||||
|
||||
ret = clk_prepare(atmel_pwm->clk);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "failed to prepare PWM clock\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
atmel_pwm->chip.dev = &pdev->dev;
|
||||
atmel_pwm->chip.ops = &atmel_pwm_ops;
|
||||
|
||||
if (pdev->dev.of_node) {
|
||||
atmel_pwm->chip.of_xlate = of_pwm_xlate_with_flags;
|
||||
atmel_pwm->chip.of_pwm_n_cells = 3;
|
||||
}
|
||||
|
||||
atmel_pwm->chip.base = -1;
|
||||
atmel_pwm->chip.npwm = 4;
|
||||
atmel_pwm->config = data->config;
|
||||
|
||||
ret = pwmchip_add(&atmel_pwm->chip);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "failed to add PWM chip %d\n", ret);
|
||||
goto unprepare_clk;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, atmel_pwm);
|
||||
|
||||
return ret;
|
||||
|
||||
unprepare_clk:
|
||||
clk_unprepare(atmel_pwm->clk);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int atmel_pwm_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct atmel_pwm_chip *atmel_pwm = platform_get_drvdata(pdev);
|
||||
|
||||
clk_unprepare(atmel_pwm->clk);
|
||||
|
||||
return pwmchip_remove(&atmel_pwm->chip);
|
||||
}
|
||||
|
||||
static struct platform_driver atmel_pwm_driver = {
|
||||
.driver = {
|
||||
.name = "atmel-pwm",
|
||||
.of_match_table = of_match_ptr(atmel_pwm_dt_ids),
|
||||
},
|
||||
.id_table = atmel_pwm_devtypes,
|
||||
.probe = atmel_pwm_probe,
|
||||
.remove = atmel_pwm_remove,
|
||||
};
|
||||
module_platform_driver(atmel_pwm_driver);
|
||||
|
||||
MODULE_ALIAS("platform:atmel-pwm");
|
||||
MODULE_AUTHOR("Bo Shen <voice.shen@atmel.com>");
|
||||
MODULE_DESCRIPTION("Atmel PWM driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -224,7 +224,7 @@ static struct platform_driver ep93xx_pwm_driver = {
|
|||
module_platform_driver(ep93xx_pwm_driver);
|
||||
|
||||
MODULE_DESCRIPTION("Cirrus Logic EP93xx PWM driver");
|
||||
MODULE_AUTHOR("Matthieu Crapet <mcrapet@gmail.com>, "
|
||||
"H Hartley Sweeten <hsweeten@visionengravers.com>");
|
||||
MODULE_AUTHOR("Matthieu Crapet <mcrapet@gmail.com>");
|
||||
MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>");
|
||||
MODULE_ALIAS("platform:ep93xx-pwm");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
|
|||
|
|
@ -165,13 +165,12 @@ static const struct pwm_ops jz4740_pwm_ops = {
|
|||
static int jz4740_pwm_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct jz4740_pwm_chip *jz4740;
|
||||
int ret;
|
||||
|
||||
jz4740 = devm_kzalloc(&pdev->dev, sizeof(*jz4740), GFP_KERNEL);
|
||||
if (!jz4740)
|
||||
return -ENOMEM;
|
||||
|
||||
jz4740->clk = clk_get(NULL, "ext");
|
||||
jz4740->clk = devm_clk_get(&pdev->dev, "ext");
|
||||
if (IS_ERR(jz4740->clk))
|
||||
return PTR_ERR(jz4740->clk);
|
||||
|
||||
|
|
@ -180,29 +179,16 @@ static int jz4740_pwm_probe(struct platform_device *pdev)
|
|||
jz4740->chip.npwm = NUM_PWM;
|
||||
jz4740->chip.base = -1;
|
||||
|
||||
ret = pwmchip_add(&jz4740->chip);
|
||||
if (ret < 0) {
|
||||
clk_put(jz4740->clk);
|
||||
return ret;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, jz4740);
|
||||
|
||||
return 0;
|
||||
return pwmchip_add(&jz4740->chip);
|
||||
}
|
||||
|
||||
static int jz4740_pwm_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct jz4740_pwm_chip *jz4740 = platform_get_drvdata(pdev);
|
||||
int ret;
|
||||
|
||||
ret = pwmchip_remove(&jz4740->chip);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
clk_put(jz4740->clk);
|
||||
|
||||
return 0;
|
||||
return pwmchip_remove(&jz4740->chip);
|
||||
}
|
||||
|
||||
static struct platform_driver jz4740_pwm_driver = {
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
* published by the Free Software Foundation.
|
||||
*
|
||||
* 2008-02-13 initial version
|
||||
* eric miao <eric.miao@marvell.com>
|
||||
* eric miao <eric.miao@marvell.com>
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
|
|
@ -19,6 +19,7 @@
|
|||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/pwm.h>
|
||||
#include <linux/of_device.h>
|
||||
|
||||
#include <asm/div64.h>
|
||||
|
||||
|
|
@ -124,6 +125,46 @@ static struct pwm_ops pxa_pwm_ops = {
|
|||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
/*
|
||||
* Device tree users must create one device instance for each pwm channel.
|
||||
* Hence we dispense with the HAS_SECONDARY_PWM and "tell" the original driver
|
||||
* code that this is a single channel pxa25x-pwm. Currently all devices are
|
||||
* supported identically.
|
||||
*/
|
||||
static struct of_device_id pwm_of_match[] = {
|
||||
{ .compatible = "marvell,pxa250-pwm", .data = &pwm_id_table[0]},
|
||||
{ .compatible = "marvell,pxa270-pwm", .data = &pwm_id_table[0]},
|
||||
{ .compatible = "marvell,pxa168-pwm", .data = &pwm_id_table[0]},
|
||||
{ .compatible = "marvell,pxa910-pwm", .data = &pwm_id_table[0]},
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, pwm_of_match);
|
||||
#else
|
||||
#define pwm_of_match NULL
|
||||
#endif
|
||||
|
||||
static const struct platform_device_id *pxa_pwm_get_id_dt(struct device *dev)
|
||||
{
|
||||
const struct of_device_id *id = of_match_device(pwm_of_match, dev);
|
||||
|
||||
return id ? id->data : NULL;
|
||||
}
|
||||
|
||||
static struct pwm_device *
|
||||
pxa_pwm_of_xlate(struct pwm_chip *pc, const struct of_phandle_args *args)
|
||||
{
|
||||
struct pwm_device *pwm;
|
||||
|
||||
pwm = pwm_request_from_chip(pc, 0, NULL);
|
||||
if (IS_ERR(pwm))
|
||||
return pwm;
|
||||
|
||||
pwm_set_period(pwm, args->args[0]);
|
||||
|
||||
return pwm;
|
||||
}
|
||||
|
||||
static int pwm_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct platform_device_id *id = platform_get_device_id(pdev);
|
||||
|
|
@ -131,6 +172,12 @@ static int pwm_probe(struct platform_device *pdev)
|
|||
struct resource *r;
|
||||
int ret = 0;
|
||||
|
||||
if (IS_ENABLED(CONFIG_OF) && id == NULL)
|
||||
id = pxa_pwm_get_id_dt(&pdev->dev);
|
||||
|
||||
if (id == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
|
||||
if (pwm == NULL) {
|
||||
dev_err(&pdev->dev, "failed to allocate memory\n");
|
||||
|
|
@ -146,6 +193,11 @@ static int pwm_probe(struct platform_device *pdev)
|
|||
pwm->chip.base = -1;
|
||||
pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1;
|
||||
|
||||
if (IS_ENABLED(CONFIG_OF)) {
|
||||
pwm->chip.of_xlate = pxa_pwm_of_xlate;
|
||||
pwm->chip.of_pwm_n_cells = 1;
|
||||
}
|
||||
|
||||
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
pwm->mmio_base = devm_ioremap_resource(&pdev->dev, r);
|
||||
if (IS_ERR(pwm->mmio_base))
|
||||
|
|
@ -176,6 +228,7 @@ static struct platform_driver pwm_driver = {
|
|||
.driver = {
|
||||
.name = "pxa25x-pwm",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = pwm_of_match,
|
||||
},
|
||||
.probe = pwm_probe,
|
||||
.remove = pwm_remove,
|
||||
|
|
|
|||
|
|
@ -279,7 +279,6 @@ static int ecap_pwm_remove(struct platform_device *pdev)
|
|||
pwmss_submodule_state_change(pdev->dev.parent, PWMSS_ECAPCLK_STOP_REQ);
|
||||
pm_runtime_put_sync(&pdev->dev);
|
||||
|
||||
pm_runtime_put_sync(&pdev->dev);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
return pwmchip_remove(&pc->chip);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -360,8 +360,8 @@ static int ehrpwm_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
|
|||
/* Enable TBCLK before enabling PWM device */
|
||||
ret = clk_enable(pc->tbclk);
|
||||
if (ret) {
|
||||
pr_err("Failed to enable TBCLK for %s\n",
|
||||
dev_name(pc->chip.dev));
|
||||
dev_err(chip->dev, "Failed to enable TBCLK for %s\n",
|
||||
dev_name(pc->chip.dev));
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -169,15 +169,7 @@ static struct attribute *pwm_attrs[] = {
|
|||
&dev_attr_polarity.attr,
|
||||
NULL
|
||||
};
|
||||
|
||||
static const struct attribute_group pwm_attr_group = {
|
||||
.attrs = pwm_attrs,
|
||||
};
|
||||
|
||||
static const struct attribute_group *pwm_attr_groups[] = {
|
||||
&pwm_attr_group,
|
||||
NULL,
|
||||
};
|
||||
ATTRIBUTE_GROUPS(pwm);
|
||||
|
||||
static void pwm_export_release(struct device *child)
|
||||
{
|
||||
|
|
@ -205,7 +197,7 @@ static int pwm_export_child(struct device *parent, struct pwm_device *pwm)
|
|||
export->child.release = pwm_export_release;
|
||||
export->child.parent = parent;
|
||||
export->child.devt = MKDEV(0, 0);
|
||||
export->child.groups = pwm_attr_groups;
|
||||
export->child.groups = pwm_groups;
|
||||
dev_set_name(&export->child, "pwm%u", pwm->hwpwm);
|
||||
|
||||
ret = device_register(&export->child);
|
||||
|
|
|
|||
|
|
@ -241,7 +241,6 @@ static int pwm_backlight_probe(struct platform_device *pdev)
|
|||
|
||||
pb = devm_kzalloc(&pdev->dev, sizeof(*pb), GFP_KERNEL);
|
||||
if (!pb) {
|
||||
dev_err(&pdev->dev, "no memory for state\n");
|
||||
ret = -ENOMEM;
|
||||
goto err_alloc;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue