Documentation: ACPI: enumeration: add PCI hierarchy representation
For "fixed" PCI devices, such as chips directly soldered on the main board (ethernet, Wi-Fi, serial ports, etc.), it is possible to find an ACPI enumeration. This allows to add useful properties to these devices. Just for an example: the property "gpio-line-names" can be added to the pins of a GPIO expander on the PCI bus. In order to find the ACPI name of a PCI device, it's necessary to disassemble the BIOS ACPI tables (in particular the DSDT) and also to analyze the PCI bus topology of the board. This patch, with a practical example, show how to do this. Signed-off-by: Flavio Suligoi <f.suligoi@asem.it> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
Flavio Suligoi
Rafael J. Wysocki
parent
a8b6cfdf97
commit
390029c27e
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@ -461,3 +461,157 @@ Otherwise, the _DSD itself is regarded as invalid and therefore the "compatible"
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property returned by it is meaningless.
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Refer to :doc:`DSD-properties-rules` for more information.
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PCI hierarchy representation
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============================
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Sometimes could be useful to enumerate a PCI device, knowing its position on the
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PCI bus.
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For example, some systems use PCI devices soldered directly on the mother board,
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in a fixed position (ethernet, Wi-Fi, serial ports, etc.). In this conditions it
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is possible to refer to these PCI devices knowing their position on the PCI bus
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topology.
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To identify a PCI device, a complete hierarchical description is required, from
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the chipset root port to the final device, through all the intermediate
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bridges/switches of the board.
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For example, let us assume to have a system with a PCIe serial port, an
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Exar XR17V3521, soldered on the main board. This UART chip also includes
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16 GPIOs and we want to add the property ``gpio-line-names`` [1] to these pins.
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In this case, the ``lspci`` output for this component is::
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07:00.0 Serial controller: Exar Corp. XR17V3521 Dual PCIe UART (rev 03)
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The complete ``lspci`` output (manually reduced in length) is::
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00:00.0 Host bridge: Intel Corp... Host Bridge (rev 0d)
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...
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00:13.0 PCI bridge: Intel Corp... PCI Express Port A #1 (rev fd)
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00:13.1 PCI bridge: Intel Corp... PCI Express Port A #2 (rev fd)
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00:13.2 PCI bridge: Intel Corp... PCI Express Port A #3 (rev fd)
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00:14.0 PCI bridge: Intel Corp... PCI Express Port B #1 (rev fd)
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00:14.1 PCI bridge: Intel Corp... PCI Express Port B #2 (rev fd)
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...
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05:00.0 PCI bridge: Pericom Semiconductor Device 2404 (rev 05)
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06:01.0 PCI bridge: Pericom Semiconductor Device 2404 (rev 05)
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06:02.0 PCI bridge: Pericom Semiconductor Device 2404 (rev 05)
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06:03.0 PCI bridge: Pericom Semiconductor Device 2404 (rev 05)
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07:00.0 Serial controller: Exar Corp. XR17V3521 Dual PCIe UART (rev 03) <-- Exar
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...
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The bus topology is::
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-[0000:00]-+-00.0
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...
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+-13.0-[01]----00.0
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+-13.1-[02]----00.0
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+-13.2-[03]--
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+-14.0-[04]----00.0
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+-14.1-[05-09]----00.0-[06-09]--+-01.0-[07]----00.0 <-- Exar
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| +-02.0-[08]----00.0
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| \-03.0-[09]--
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...
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\-1f.1
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To describe this Exar device on the PCI bus, we must start from the ACPI name
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of the chipset bridge (also called "root port") with address::
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Bus: 0 - Device: 14 - Function: 1
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To find this information is necessary disassemble the BIOS ACPI tables, in
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particular the DSDT (see also [2])::
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mkdir ~/tables/
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cd ~/tables/
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acpidump > acpidump
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acpixtract -a acpidump
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iasl -e ssdt?.* -d dsdt.dat
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Now, in the dsdt.dsl, we have to search the device whose address is related to
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0x14 (device) and 0x01 (function). In this case we can find the following
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device::
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Scope (_SB.PCI0)
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{
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... other definitions follow ...
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Device (RP02)
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{
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Method (_ADR, 0, NotSerialized) // _ADR: Address
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{
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If ((RPA2 != Zero))
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{
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Return (RPA2) /* \RPA2 */
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}
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Else
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{
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Return (0x00140001)
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}
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}
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... other definitions follow ...
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and the _ADR method [3] returns exactly the device/function couple that
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we are looking for. With this information and analyzing the above ``lspci``
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output (both the devices list and the devices tree), we can write the following
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ACPI description for the Exar PCIe UART, also adding the list of its GPIO line
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names::
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Scope (_SB.PCI0.RP02)
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{
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Device (BRG1) //Bridge
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{
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Name (_ADR, 0x0000)
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Device (BRG2) //Bridge
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{
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Name (_ADR, 0x00010000)
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Device (EXAR)
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{
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Name (_ADR, 0x0000)
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Name (_DSD, Package ()
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{
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ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
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Package ()
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{
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Package ()
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{
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"gpio-line-names",
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Package ()
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{
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"mode_232",
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"mode_422",
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"mode_485",
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"misc_1",
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"misc_2",
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"misc_3",
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"",
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"",
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"aux_1",
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"aux_2",
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"aux_3",
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}
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}
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}
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})
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}
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}
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}
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}
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The location "_SB.PCI0.RP02" is obtained by the above investigation in the
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dsdt.dsl table, whereas the device names "BRG1", "BRG2" and "EXAR" are
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created analyzing the position of the Exar UART in the PCI bus topology.
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References
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==========
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[1] Documentation/firmware-guide/acpi/gpio-properties.rst
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[2] Documentation/admin-guide/acpi/initrd_table_override.rst
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[3] ACPI Specifications, Version 6.3 - Paragraph 6.1.1 _ADR Address)
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https://uefi.org/sites/default/files/resources/ACPI_6_3_May16.pdf,
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referenced 2020-11-18
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