dt-bindings: Add headers for Tegra234 PWM
Add dt-bindings header files for PWM of Tegra234 Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -38,6 +38,22 @@
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#define TEGRA234_CLK_I2C9 55U
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/** @brief PLLP clk output */
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#define TEGRA234_CLK_PLLP_OUT0 102U
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/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM1 */
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#define TEGRA234_CLK_PWM1 105U
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/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM2 */
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#define TEGRA234_CLK_PWM2 106U
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/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM3 */
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#define TEGRA234_CLK_PWM3 107U
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/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM4 */
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#define TEGRA234_CLK_PWM4 108U
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/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM5 */
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#define TEGRA234_CLK_PWM5 109U
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/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM6 */
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#define TEGRA234_CLK_PWM6 110U
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/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM7 */
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#define TEGRA234_CLK_PWM7 111U
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/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PWM8 */
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#define TEGRA234_CLK_PWM8 112U
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/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 */
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#define TEGRA234_CLK_SDMMC4 123U
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/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_UARTA */
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#define TEGRA234_RESET_I2C7 33U
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#define TEGRA234_RESET_I2C8 34U
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#define TEGRA234_RESET_I2C9 35U
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#define TEGRA234_RESET_PWM1 68U
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#define TEGRA234_RESET_PWM2 69U
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#define TEGRA234_RESET_PWM3 70U
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#define TEGRA234_RESET_PWM4 71U
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#define TEGRA234_RESET_PWM5 72U
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#define TEGRA234_RESET_PWM6 73U
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#define TEGRA234_RESET_PWM7 74U
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#define TEGRA234_RESET_PWM8 75U
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#define TEGRA234_RESET_SDMMC4 85U
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#define TEGRA234_RESET_UARTA 100U
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