hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

irqchip: bcm7120-l2: Make sure all register accesses use base+offset 

A couple of accesses to IRQEN (base+0x00) just used "base" directly, so
they would break if IRQEN ever became nonzero.  Make sure that all
reads/writes specify the register offset constant.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/1415342669-30640-9-git-send-email-cernekee@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Kevin Cernekee 2014-11-06 22:44:23 -08:00 committed by Jason Cooper
parent 60b2a29e1a
commit 38e3a6e819
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/irqchip/irq-bcm7120-l2.c
View File

@ -66,10 +66,10 @@ static void bcm7120_l2_intc_suspend(struct irq_data *d)
irq_gc_lock(gc);
/* Save the current mask and the interrupt forward mask */
b->saved_mask = __raw_readl(b->base) | b->irq_fwd_mask;
b->saved_mask = __raw_readl(b->base + IRQEN) | b->irq_fwd_mask;
if (b->can_wake) {
reg = b->saved_mask | gc->wake_active;
__raw_writel(reg, b->base);
__raw_writel(reg, b->base + IRQEN);
}
irq_gc_unlock(gc);
}
@ -81,7 +81,7 @@ static void bcm7120_l2_intc_resume(struct irq_data *d)
/* Restore the saved mask */
irq_gc_lock(gc);
__raw_writel(b->saved_mask, b->base);
__raw_writel(b->saved_mask, b->base + IRQEN);
irq_gc_unlock(gc);
}