[PATCH] genirq: msi: refactor the msi_ops
The current msi_ops are short sighted in a number of ways, this patch attempts to fix the glaring deficiences. - Report in msi_ops if a 64bit address is needed in the msi message, so we can fail 32bit only msi structures. - Send and receive a full struct msi_msg in both setup and target. This is a little cleaner and allows for architectures that need to modify the data to retarget the msi interrupt to a different cpu. - In target pass in the full cpu mask instead of just the first cpu in case we can make use of the full cpu mask. - Operate in terms of irqs and not vectors, currently there is still a 1-1 relationship but on architectures other than ia64 I expect this will change. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rajesh Shah <rajesh.shah@intel.com> Cc: Andi Kleen <ak@muc.de> Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Eric W. Biederman
Linus Torvalds
parent
0366f8f713
commit
38bc036130
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@ -26,7 +26,7 @@ struct sn_msi_info {
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static struct sn_msi_info *sn_msi_info;
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static void
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sn_msi_teardown(unsigned int vector)
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sn_msi_teardown(unsigned int irq)
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{
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nasid_t nasid;
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int widget;
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@ -36,7 +36,7 @@ sn_msi_teardown(unsigned int vector)
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struct pcibus_bussoft *bussoft;
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struct sn_pcibus_provider *provider;
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sn_irq_info = sn_msi_info[vector].sn_irq_info;
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sn_irq_info = sn_msi_info[irq].sn_irq_info;
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if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
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return;
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@ -45,9 +45,9 @@ sn_msi_teardown(unsigned int vector)
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provider = SN_PCIDEV_BUSPROVIDER(pdev);
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(*provider->dma_unmap)(pdev,
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sn_msi_info[vector].pci_addr,
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sn_msi_info[irq].pci_addr,
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PCI_DMA_FROMDEVICE);
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sn_msi_info[vector].pci_addr = 0;
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sn_msi_info[irq].pci_addr = 0;
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bussoft = SN_PCIDEV_BUSSOFT(pdev);
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nasid = NASID_GET(bussoft->bs_base);
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@ -56,14 +56,13 @@ sn_msi_teardown(unsigned int vector)
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SWIN_WIDGETNUM(bussoft->bs_base);
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sn_intr_free(nasid, widget, sn_irq_info);
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sn_msi_info[vector].sn_irq_info = NULL;
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sn_msi_info[irq].sn_irq_info = NULL;
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return;
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}
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int
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sn_msi_setup(struct pci_dev *pdev, unsigned int vector,
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u32 *addr_hi, u32 *addr_lo, u32 *data)
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sn_msi_setup(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
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{
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int widget;
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int status;
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@ -93,7 +92,7 @@ sn_msi_setup(struct pci_dev *pdev, unsigned int vector,
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if (! sn_irq_info)
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return -ENOMEM;
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status = sn_intr_alloc(nasid, widget, sn_irq_info, vector, -1, -1);
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status = sn_intr_alloc(nasid, widget, sn_irq_info, irq, -1, -1);
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if (status) {
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kfree(sn_irq_info);
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return -ENOMEM;
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@ -119,28 +118,27 @@ sn_msi_setup(struct pci_dev *pdev, unsigned int vector,
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return -ENOMEM;
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}
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sn_msi_info[vector].sn_irq_info = sn_irq_info;
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sn_msi_info[vector].pci_addr = bus_addr;
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sn_msi_info[irq].sn_irq_info = sn_irq_info;
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sn_msi_info[irq].pci_addr = bus_addr;
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*addr_hi = (u32)(bus_addr >> 32);
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*addr_lo = (u32)(bus_addr & 0x00000000ffffffff);
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msg->address_hi = (u32)(bus_addr >> 32);
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msg->address_lo = (u32)(bus_addr & 0x00000000ffffffff);
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/*
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* In the SN platform, bit 16 is a "send vector" bit which
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* must be present in order to move the vector through the system.
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*/
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*data = 0x100 + (unsigned int)vector;
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msg->data = 0x100 + irq;
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#ifdef CONFIG_SMP
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set_irq_affinity_info((vector & 0xff), sn_irq_info->irq_cpuid, 0);
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set_irq_affinity_info(irq, sn_irq_info->irq_cpuid, 0);
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#endif
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return 0;
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}
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static void
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sn_msi_target(unsigned int vector, unsigned int cpu,
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u32 *addr_hi, u32 *addr_lo)
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sn_msi_target(unsigned int irq, cpumask_t cpu_mask, struct msi_msg *msg)
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{
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int slice;
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nasid_t nasid;
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@ -150,8 +148,10 @@ sn_msi_target(unsigned int vector, unsigned int cpu,
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struct sn_irq_info *sn_irq_info;
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struct sn_irq_info *new_irq_info;
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struct sn_pcibus_provider *provider;
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unsigned int cpu;
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sn_irq_info = sn_msi_info[vector].sn_irq_info;
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cpu = first_cpu(cpu_mask);
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sn_irq_info = sn_msi_info[irq].sn_irq_info;
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if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
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return;
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@ -163,15 +163,15 @@ sn_msi_target(unsigned int vector, unsigned int cpu,
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pdev = sn_pdev->pdi_linux_pcidev;
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provider = SN_PCIDEV_BUSPROVIDER(pdev);
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bus_addr = (u64)(*addr_hi) << 32 | (u64)(*addr_lo);
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bus_addr = (u64)(msg->address_hi) << 32 | (u64)(msg->address_lo);
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(*provider->dma_unmap)(pdev, bus_addr, PCI_DMA_FROMDEVICE);
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sn_msi_info[vector].pci_addr = 0;
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sn_msi_info[irq].pci_addr = 0;
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nasid = cpuid_to_nasid(cpu);
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slice = cpuid_to_slice(cpu);
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new_irq_info = sn_retarget_vector(sn_irq_info, nasid, slice);
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sn_msi_info[vector].sn_irq_info = new_irq_info;
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sn_msi_info[irq].sn_irq_info = new_irq_info;
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if (new_irq_info == NULL)
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return;
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@ -184,12 +184,13 @@ sn_msi_target(unsigned int vector, unsigned int cpu,
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sizeof(new_irq_info->irq_xtalkaddr),
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SN_DMA_MSI|SN_DMA_ADDR_XIO);
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sn_msi_info[vector].pci_addr = bus_addr;
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*addr_hi = (u32)(bus_addr >> 32);
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*addr_lo = (u32)(bus_addr & 0x00000000ffffffff);
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sn_msi_info[irq].pci_addr = bus_addr;
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msg->address_hi = (u32)(bus_addr >> 32);
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msg->address_lo = (u32)(bus_addr & 0x00000000ffffffff);
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}
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struct msi_ops sn_msi_ops = {
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.needs_64bit_address = 1,
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.setup = sn_msi_setup,
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.teardown = sn_msi_teardown,
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#ifdef CONFIG_SMP
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@ -201,7 +202,7 @@ int
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sn_msi_init(void)
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{
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sn_msi_info =
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kzalloc(sizeof(struct sn_msi_info) * NR_VECTORS, GFP_KERNEL);
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kzalloc(sizeof(struct sn_msi_info) * NR_IRQS, GFP_KERNEL);
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if (! sn_msi_info)
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return -ENOMEM;
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@ -46,37 +46,36 @@
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static void
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msi_target_apic(unsigned int vector,
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unsigned int dest_cpu,
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u32 *address_hi, /* in/out */
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u32 *address_lo) /* in/out */
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msi_target_apic(unsigned int irq, cpumask_t cpu_mask, struct msi_msg *msg)
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{
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u32 addr = *address_lo;
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u32 addr = msg->address_lo;
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addr &= MSI_ADDR_DESTID_MASK;
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addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(dest_cpu));
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addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(first_cpu(cpu_mask)));
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*address_lo = addr;
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msg->address_lo = addr;
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}
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static int
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msi_setup_apic(struct pci_dev *pdev, /* unused in generic */
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unsigned int vector,
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u32 *address_hi,
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u32 *address_lo,
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u32 *data)
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unsigned int irq,
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struct msi_msg *msg)
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{
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unsigned long dest_phys_id;
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unsigned int vector;
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dest_phys_id = cpu_physical_id(first_cpu(cpu_online_map));
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vector = irq;
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*address_hi = 0;
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*address_lo = MSI_ADDR_HEADER |
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msg->address_hi = 0;
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msg->address_lo =
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MSI_ADDR_HEADER |
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MSI_ADDR_DESTMODE_PHYS |
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MSI_ADDR_REDIRECTION_CPU |
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MSI_ADDR_DESTID_CPU(dest_phys_id);
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*data = MSI_DATA_TRIGGER_EDGE |
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msg->data =
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MSI_DATA_TRIGGER_EDGE |
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MSI_DATA_LEVEL_ASSERT |
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MSI_DATA_DELIVERY_FIXED |
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MSI_DATA_VECTOR(vector);
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@ -85,7 +84,7 @@ msi_setup_apic(struct pci_dev *pdev, /* unused in generic */
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}
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static void
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msi_teardown_apic(unsigned int vector)
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msi_teardown_apic(unsigned int irq)
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{
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return; /* no-op */
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}
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@ -95,6 +94,7 @@ msi_teardown_apic(unsigned int vector)
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*/
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struct msi_ops msi_apic_ops = {
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.needs_64bit_address = 0,
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.setup = msi_setup_apic,
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.teardown = msi_teardown_apic,
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.target = msi_target_apic,
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@ -165,19 +165,17 @@ static void write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
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}
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#ifdef CONFIG_SMP
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static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
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static void set_msi_affinity(unsigned int irq, cpumask_t cpu_mask)
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{
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struct msi_desc *entry;
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struct msi_msg msg;
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unsigned int irq = vector;
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unsigned int dest_cpu = first_cpu(cpu_mask);
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entry = (struct msi_desc *)msi_desc[vector];
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entry = msi_desc[irq];
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if (!entry || !entry->dev)
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return;
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read_msi_msg(entry, &msg);
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msi_ops->target(vector, dest_cpu, &msg.address_hi, &msg.address_lo);
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msi_ops->target(irq, cpu_mask, &msg);
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write_msi_msg(entry, &msg);
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set_native_irq_info(irq, cpu_mask);
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}
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@ -701,14 +699,14 @@ static int msi_register_init(struct pci_dev *dev, struct msi_desc *entry)
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{
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int status;
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struct msi_msg msg;
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int pos, vector = dev->irq;
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int pos;
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u16 control;
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pos = entry->msi_attrib.pos;
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pci_read_config_word(dev, msi_control_reg(pos), &control);
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/* Configure MSI capability structure */
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status = msi_ops->setup(dev, vector, &msg.address_hi, &msg.address_lo, &msg.data);
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status = msi_ops->setup(dev, dev->irq, &msg);
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if (status < 0)
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return status;
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@ -863,10 +861,7 @@ static int msix_capability_init(struct pci_dev *dev,
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/* Replace with MSI-X handler */
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irq_handler_init(PCI_CAP_ID_MSIX, vector, 1);
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/* Configure MSI-X capability structure */
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status = msi_ops->setup(dev, vector,
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&msg.address_hi,
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&msg.address_lo,
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&msg.data);
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status = msi_ops->setup(dev, vector, &msg);
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if (status < 0)
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break;
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@ -928,6 +923,7 @@ int pci_msi_supported(struct pci_dev * dev)
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int pci_enable_msi(struct pci_dev* dev)
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{
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int pos, temp, status;
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u16 control;
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if (pci_msi_supported(dev) < 0)
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return -EINVAL;
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@ -942,6 +938,10 @@ int pci_enable_msi(struct pci_dev* dev)
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if (!pos)
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return -EINVAL;
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pci_read_config_word(dev, msi_control_reg(pos), &control);
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if (!is_64bit_address(control) && msi_ops->needs_64bit_address)
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return -EINVAL;
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WARN_ON(!msi_lookup_vector(dev, PCI_CAP_ID_MSI));
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/* Check whether driver already requested for MSI-X vectors */
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@ -6,68 +6,6 @@
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#ifndef MSI_H
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#define MSI_H
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/*
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* MSI operation vector. Used by the msi core code (drivers/pci/msi.c)
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* to abstract platform-specific tasks relating to MSI address generation
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* and resource management.
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*/
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struct msi_ops {
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/**
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* setup - generate an MSI bus address and data for a given vector
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* @pdev: PCI device context (in)
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* @vector: vector allocated by the msi core (in)
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* @addr_hi: upper 32 bits of PCI bus MSI address (out)
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* @addr_lo: lower 32 bits of PCI bus MSI address (out)
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* @data: MSI data payload (out)
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*
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* Description: The setup op is used to generate a PCI bus addres and
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* data which the msi core will program into the card MSI capability
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* registers. The setup routine is responsible for picking an initial
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* cpu to target the MSI at. The setup routine is responsible for
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* examining pdev to determine the MSI capabilities of the card and
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* generating a suitable address/data. The setup routine is
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* responsible for allocating and tracking any system resources it
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* needs to route the MSI to the cpu it picks, and for associating
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* those resources with the passed in vector.
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*
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* Returns 0 if the MSI address/data was successfully setup.
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**/
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int (*setup) (struct pci_dev *pdev, unsigned int vector,
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u32 *addr_hi, u32 *addr_lo, u32 *data);
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/**
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* teardown - release resources allocated by setup
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* @vector: vector context for resources (in)
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*
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* Description: The teardown op is used to release any resources
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* that were allocated in the setup routine associated with the passed
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* in vector.
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**/
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void (*teardown) (unsigned int vector);
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/**
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* target - retarget an MSI at a different cpu
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* @vector: vector context for resources (in)
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* @cpu: new cpu to direct vector at (in)
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* @addr_hi: new value of PCI bus upper 32 bits (in/out)
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* @addr_lo: new value of PCI bus lower 32 bits (in/out)
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*
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* Description: The target op is used to redirect an MSI vector
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* at a different cpu. addr_hi/addr_lo coming in are the existing
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* values that the MSI core has programmed into the card. The
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* target code is responsible for freeing any resources (if any)
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* associated with the old address, and generating a new PCI bus
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* addr_hi/addr_lo that will redirect the vector at the indicated cpu.
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**/
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void (*target) (unsigned int vector, unsigned int cpu,
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u32 *addr_hi, u32 *addr_lo);
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};
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extern int msi_register(struct msi_ops *ops);
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#include <asm/msi.h>
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/*
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@ -617,6 +617,68 @@ extern int pci_enable_msix(struct pci_dev* dev,
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struct msix_entry *entries, int nvec);
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extern void pci_disable_msix(struct pci_dev *dev);
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extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
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/*
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* MSI operation vector. Used by the msi core code (drivers/pci/msi.c)
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* to abstract platform-specific tasks relating to MSI address generation
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* and resource management.
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*/
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struct msi_ops {
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int needs_64bit_address;
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/**
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* setup - generate an MSI bus address and data for a given vector
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* @pdev: PCI device context (in)
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* @irq: irq allocated by the msi core (in)
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* @msg: PCI bus address and data for msi message (out)
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*
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* Description: The setup op is used to generate a PCI bus addres and
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* data which the msi core will program into the card MSI capability
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* registers. The setup routine is responsible for picking an initial
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* cpu to target the MSI at. The setup routine is responsible for
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* examining pdev to determine the MSI capabilities of the card and
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* generating a suitable address/data. The setup routine is
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* responsible for allocating and tracking any system resources it
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* needs to route the MSI to the cpu it picks, and for associating
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* those resources with the passed in vector.
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*
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* Returns 0 if the MSI address/data was successfully setup.
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**/
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int (*setup) (struct pci_dev *pdev, unsigned int irq,
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struct msi_msg *msg);
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/**
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* teardown - release resources allocated by setup
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* @vector: vector context for resources (in)
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*
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* Description: The teardown op is used to release any resources
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* that were allocated in the setup routine associated with the passed
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* in vector.
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**/
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void (*teardown) (unsigned int irq);
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/**
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* target - retarget an MSI at a different cpu
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* @vector: vector context for resources (in)
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* @cpu: new cpu to direct vector at (in)
|
||||
* @addr_hi: new value of PCI bus upper 32 bits (in/out)
|
||||
* @addr_lo: new value of PCI bus lower 32 bits (in/out)
|
||||
*
|
||||
* Description: The target op is used to redirect an MSI vector
|
||||
* at a different cpu. addr_hi/addr_lo coming in are the existing
|
||||
* values that the MSI core has programmed into the card. The
|
||||
* target code is responsible for freeing any resources (if any)
|
||||
* associated with the old address, and generating a new PCI bus
|
||||
* addr_hi/addr_lo that will redirect the vector at the indicated cpu.
|
||||
**/
|
||||
|
||||
void (*target) (unsigned int irq, cpumask_t cpumask,
|
||||
struct msi_msg *msg);
|
||||
};
|
||||
|
||||
extern int msi_register(struct msi_ops *ops);
|
||||
|
||||
#endif
|
||||
|
||||
extern void pci_block_user_cfg_access(struct pci_dev *dev);
|
||||
|
|
|
|||
Loading…
Reference in New Issue