ARM: dts: r8a7743: Remove unit-address and reg from integrated cache
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: 34e8d993a6
("ARM: dts: r8a7743: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
parent
cdaf6417b7
commit
37f0c804e5
|
@ -32,9 +32,8 @@
|
|||
next-level-cache = <&L2_CA15>;
|
||||
};
|
||||
|
||||
L2_CA15: cache-controller@0 {
|
||||
L2_CA15: cache-controller-0 {
|
||||
compatible = "cache";
|
||||
reg = <0>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
power-domains = <&sysc R8A7743_PD_CA15_SCU>;
|
||||
|
|
Loading…
Reference in New Issue