ASoC: SOF: Intel: hda: use common ops across platforms
The dsp_ops are mostly common between platforms. Introduce a common structure and an init function to set platform-specific values. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20220414184817.362215-10-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
856601e5a7
commit
37e809d5f8
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@ -342,6 +342,7 @@ static void sof_probe_work(struct work_struct *work)
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int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data)
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{
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struct snd_sof_dev *sdev;
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int ret;
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sdev = devm_kzalloc(dev, sizeof(*sdev), GFP_KERNEL);
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if (!sdev)
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@ -358,7 +359,9 @@ int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data)
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dev_set_drvdata(dev, sdev);
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/* init ops, if necessary */
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sof_ops_init(sdev);
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ret = sof_ops_init(sdev);
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if (ret < 0)
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return ret;
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/* check all mandatory ops */
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if (!sof_ops(sdev) || !sof_ops(sdev)->probe || !sof_ops(sdev)->run ||
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@ -6,7 +6,7 @@ snd-sof-acpi-intel-bdw-objs := bdw.o
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snd-sof-intel-hda-common-objs := hda.o hda-loader.o hda-stream.o hda-trace.o \
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hda-dsp.o hda-ipc.o hda-ctrl.o hda-pcm.o \
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hda-dai.o hda-bus.o \
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apl.o cnl.o tgl.o icl.o
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apl.o cnl.o tgl.o icl.o hda-common-ops.o
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snd-sof-intel-hda-common-$(CONFIG_SND_SOC_SOF_HDA_PROBES) += hda-probes.o
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snd-sof-intel-hda-objs := hda-codec.o
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@ -26,108 +26,40 @@ static const struct snd_sof_debugfs_map apl_dsp_debugfs[] = {
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};
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/* apollolake ops */
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struct snd_sof_dsp_ops sof_apl_ops = {
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struct snd_sof_dsp_ops sof_apl_ops;
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EXPORT_SYMBOL_NS(sof_apl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
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int sof_apl_ops_init(struct snd_sof_dev *sdev)
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{
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/* common defaults */
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memcpy(&sof_apl_ops, &sof_hda_common_ops, sizeof(struct snd_sof_dsp_ops));
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/* probe/remove/shutdown */
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.probe = hda_dsp_probe,
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.remove = hda_dsp_remove,
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.shutdown = hda_dsp_shutdown,
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/* Register IO */
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.write = sof_io_write,
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.read = sof_io_read,
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.write64 = sof_io_write64,
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.read64 = sof_io_read64,
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/* Block IO */
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.block_read = sof_block_read,
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.block_write = sof_block_write,
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/* Mailbox IO */
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.mailbox_read = sof_mailbox_read,
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.mailbox_write = sof_mailbox_write,
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sof_apl_ops.shutdown = hda_dsp_shutdown;
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/* doorbell */
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.irq_thread = hda_dsp_ipc_irq_thread,
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sof_apl_ops.irq_thread = hda_dsp_ipc_irq_thread;
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/* ipc */
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.send_msg = hda_dsp_ipc_send_msg,
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.fw_ready = sof_fw_ready,
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.get_mailbox_offset = hda_dsp_ipc_get_mailbox_offset,
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.get_window_offset = hda_dsp_ipc_get_window_offset,
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.ipc_msg_data = hda_ipc_msg_data,
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.set_stream_data_offset = hda_set_stream_data_offset,
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/* machine driver */
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.machine_select = hda_machine_select,
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.machine_register = sof_machine_register,
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.machine_unregister = sof_machine_unregister,
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.set_mach_params = hda_set_mach_params,
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sof_apl_ops.send_msg = hda_dsp_ipc_send_msg;
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/* debug */
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.debug_map = apl_dsp_debugfs,
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.debug_map_count = ARRAY_SIZE(apl_dsp_debugfs),
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.dbg_dump = hda_dsp_dump,
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.ipc_dump = hda_ipc_dump,
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.debugfs_add_region_item = snd_sof_debugfs_add_region_item_iomem,
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/* stream callbacks */
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.pcm_open = hda_dsp_pcm_open,
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.pcm_close = hda_dsp_pcm_close,
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.pcm_hw_params = hda_dsp_pcm_hw_params,
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.pcm_hw_free = hda_dsp_stream_hw_free,
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.pcm_trigger = hda_dsp_pcm_trigger,
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.pcm_pointer = hda_dsp_pcm_pointer,
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.pcm_ack = hda_dsp_pcm_ack,
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/* firmware loading */
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.load_firmware = snd_sof_load_firmware_raw,
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sof_apl_ops.debug_map = apl_dsp_debugfs;
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sof_apl_ops.debug_map_count = ARRAY_SIZE(apl_dsp_debugfs);
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sof_apl_ops.ipc_dump = hda_ipc_dump;
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/* firmware run */
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.run = hda_dsp_cl_boot_firmware,
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sof_apl_ops.run = hda_dsp_cl_boot_firmware;
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/* pre/post fw run */
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.pre_fw_run = hda_dsp_pre_fw_run,
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.post_fw_run = hda_dsp_post_fw_run,
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/* parse platform specific extended manifest */
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.parse_platform_ext_manifest = hda_dsp_ext_man_get_cavs_config_data,
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sof_apl_ops.post_fw_run = hda_dsp_post_fw_run;
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/* dsp core get/put */
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.core_get = hda_dsp_core_get,
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sof_apl_ops.core_get = hda_dsp_core_get;
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/* trace callback */
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.trace_init = hda_dsp_trace_init,
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.trace_release = hda_dsp_trace_release,
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.trace_trigger = hda_dsp_trace_trigger,
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/* client ops */
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.register_ipc_clients = hda_register_clients,
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.unregister_ipc_clients = hda_unregister_clients,
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/* DAI drivers */
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.drv = skl_dai,
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.num_drv = SOF_SKL_NUM_DAIS,
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/* PM */
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.suspend = hda_dsp_suspend,
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.resume = hda_dsp_resume,
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.runtime_suspend = hda_dsp_runtime_suspend,
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.runtime_resume = hda_dsp_runtime_resume,
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.runtime_idle = hda_dsp_runtime_idle,
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.set_hw_params_upon_resume = hda_dsp_set_hw_params_upon_resume,
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.set_power_state = hda_dsp_set_power_state,
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/* ALSA HW info flags */
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.hw_info = SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_PAUSE |
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SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
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.dsp_arch_ops = &sof_xtensa_arch_ops,
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return 0;
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};
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EXPORT_SYMBOL_NS(sof_apl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
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EXPORT_SYMBOL_NS(sof_apl_ops_init, SND_SOC_SOF_INTEL_HDA_COMMON);
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const struct sof_intel_dsp_desc apl_chip_info = {
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/* Apollolake */
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@ -244,108 +244,40 @@ void cnl_ipc_dump(struct snd_sof_dev *sdev)
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}
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/* cannonlake ops */
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struct snd_sof_dsp_ops sof_cnl_ops = {
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struct snd_sof_dsp_ops sof_cnl_ops;
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EXPORT_SYMBOL_NS(sof_cnl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
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int sof_cnl_ops_init(struct snd_sof_dev *sdev)
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{
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/* common defaults */
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memcpy(&sof_cnl_ops, &sof_hda_common_ops, sizeof(struct snd_sof_dsp_ops));
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/* probe/remove/shutdown */
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.probe = hda_dsp_probe,
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.remove = hda_dsp_remove,
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.shutdown = hda_dsp_shutdown,
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/* Register IO */
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.write = sof_io_write,
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.read = sof_io_read,
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.write64 = sof_io_write64,
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.read64 = sof_io_read64,
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/* Block IO */
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.block_read = sof_block_read,
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.block_write = sof_block_write,
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/* Mailbox IO */
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.mailbox_read = sof_mailbox_read,
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.mailbox_write = sof_mailbox_write,
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sof_cnl_ops.shutdown = hda_dsp_shutdown;
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/* doorbell */
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.irq_thread = cnl_ipc_irq_thread,
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sof_cnl_ops.irq_thread = cnl_ipc_irq_thread;
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/* ipc */
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.send_msg = cnl_ipc_send_msg,
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.fw_ready = sof_fw_ready,
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.get_mailbox_offset = hda_dsp_ipc_get_mailbox_offset,
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.get_window_offset = hda_dsp_ipc_get_window_offset,
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.ipc_msg_data = hda_ipc_msg_data,
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.set_stream_data_offset = hda_set_stream_data_offset,
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/* machine driver */
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.machine_select = hda_machine_select,
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.machine_register = sof_machine_register,
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.machine_unregister = sof_machine_unregister,
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.set_mach_params = hda_set_mach_params,
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sof_cnl_ops.send_msg = cnl_ipc_send_msg;
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/* debug */
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.debug_map = cnl_dsp_debugfs,
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.debug_map_count = ARRAY_SIZE(cnl_dsp_debugfs),
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.dbg_dump = hda_dsp_dump,
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.ipc_dump = cnl_ipc_dump,
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.debugfs_add_region_item = snd_sof_debugfs_add_region_item_iomem,
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/* stream callbacks */
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.pcm_open = hda_dsp_pcm_open,
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.pcm_close = hda_dsp_pcm_close,
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.pcm_hw_params = hda_dsp_pcm_hw_params,
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.pcm_hw_free = hda_dsp_stream_hw_free,
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.pcm_trigger = hda_dsp_pcm_trigger,
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.pcm_pointer = hda_dsp_pcm_pointer,
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.pcm_ack = hda_dsp_pcm_ack,
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/* firmware loading */
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.load_firmware = snd_sof_load_firmware_raw,
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sof_cnl_ops.debug_map = cnl_dsp_debugfs;
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sof_cnl_ops.debug_map_count = ARRAY_SIZE(cnl_dsp_debugfs);
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sof_cnl_ops.ipc_dump = cnl_ipc_dump;
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/* pre/post fw run */
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.pre_fw_run = hda_dsp_pre_fw_run,
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.post_fw_run = hda_dsp_post_fw_run,
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/* parse platform specific extended manifest */
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.parse_platform_ext_manifest = hda_dsp_ext_man_get_cavs_config_data,
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/* dsp core get/put */
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.core_get = hda_dsp_core_get,
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sof_cnl_ops.post_fw_run = hda_dsp_post_fw_run;
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/* firmware run */
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.run = hda_dsp_cl_boot_firmware,
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sof_cnl_ops.run = hda_dsp_cl_boot_firmware;
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/* trace callback */
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.trace_init = hda_dsp_trace_init,
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.trace_release = hda_dsp_trace_release,
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.trace_trigger = hda_dsp_trace_trigger,
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/* dsp core get/put */
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sof_cnl_ops.core_get = hda_dsp_core_get;
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/* client ops */
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.register_ipc_clients = hda_register_clients,
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.unregister_ipc_clients = hda_unregister_clients,
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/* DAI drivers */
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.drv = skl_dai,
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.num_drv = SOF_SKL_NUM_DAIS,
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/* PM */
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.suspend = hda_dsp_suspend,
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.resume = hda_dsp_resume,
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.runtime_suspend = hda_dsp_runtime_suspend,
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.runtime_resume = hda_dsp_runtime_resume,
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.runtime_idle = hda_dsp_runtime_idle,
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.set_hw_params_upon_resume = hda_dsp_set_hw_params_upon_resume,
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.set_power_state = hda_dsp_set_power_state,
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/* ALSA HW info flags */
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.hw_info = SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_PAUSE |
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SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
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.dsp_arch_ops = &sof_xtensa_arch_ops,
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return 0;
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};
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EXPORT_SYMBOL_NS(sof_cnl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
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EXPORT_SYMBOL_NS(sof_cnl_ops_init, SND_SOC_SOF_INTEL_HDA_COMMON);
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const struct sof_intel_dsp_desc cnl_chip_info = {
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/* Cannonlake */
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@ -0,0 +1,107 @@
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2022 Intel Corporation. All rights reserved.
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//
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/*
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* common ops for SKL+ HDAudio platforms
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*/
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#include "../sof-priv.h"
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#include "hda.h"
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#include "../sof-audio.h"
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struct snd_sof_dsp_ops sof_hda_common_ops = {
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/* probe/remove/shutdown */
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.probe = hda_dsp_probe,
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.remove = hda_dsp_remove,
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/* Register IO */
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.write = sof_io_write,
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.read = sof_io_read,
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.write64 = sof_io_write64,
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.read64 = sof_io_read64,
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/* Block IO */
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.block_read = sof_block_read,
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.block_write = sof_block_write,
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/* Mailbox IO */
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.mailbox_read = sof_mailbox_read,
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.mailbox_write = sof_mailbox_write,
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/* ipc */
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.fw_ready = sof_fw_ready,
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.get_mailbox_offset = hda_dsp_ipc_get_mailbox_offset,
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.get_window_offset = hda_dsp_ipc_get_window_offset,
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.ipc_msg_data = hda_ipc_msg_data,
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.set_stream_data_offset = hda_set_stream_data_offset,
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/* machine driver */
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.machine_select = hda_machine_select,
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.machine_register = sof_machine_register,
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.machine_unregister = sof_machine_unregister,
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.set_mach_params = hda_set_mach_params,
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/* debug */
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.dbg_dump = hda_dsp_dump,
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.debugfs_add_region_item = snd_sof_debugfs_add_region_item_iomem,
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/* stream callbacks */
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.pcm_open = hda_dsp_pcm_open,
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.pcm_close = hda_dsp_pcm_close,
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.pcm_hw_params = hda_dsp_pcm_hw_params,
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.pcm_hw_free = hda_dsp_stream_hw_free,
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.pcm_trigger = hda_dsp_pcm_trigger,
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.pcm_pointer = hda_dsp_pcm_pointer,
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.pcm_ack = hda_dsp_pcm_ack,
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/* firmware loading */
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.load_firmware = snd_sof_load_firmware_raw,
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/* pre/post fw run */
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.pre_fw_run = hda_dsp_pre_fw_run,
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/* firmware run */
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.run = hda_dsp_cl_boot_firmware,
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/* parse platform specific extended manifest */
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.parse_platform_ext_manifest = hda_dsp_ext_man_get_cavs_config_data,
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/* dsp core get/put */
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/* trace callback */
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.trace_init = hda_dsp_trace_init,
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.trace_release = hda_dsp_trace_release,
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.trace_trigger = hda_dsp_trace_trigger,
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/* client ops */
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.register_ipc_clients = hda_register_clients,
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.unregister_ipc_clients = hda_unregister_clients,
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/* DAI drivers */
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.drv = skl_dai,
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.num_drv = SOF_SKL_NUM_DAIS,
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/* PM */
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.suspend = hda_dsp_suspend,
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.resume = hda_dsp_resume,
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.runtime_suspend = hda_dsp_runtime_suspend,
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.runtime_resume = hda_dsp_runtime_resume,
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.runtime_idle = hda_dsp_runtime_idle,
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.set_hw_params_upon_resume = hda_dsp_set_hw_params_upon_resume,
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.set_power_state = hda_dsp_set_power_state,
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/* ALSA HW info flags */
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.hw_info = SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_PAUSE |
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||||
SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
|
||||
|
||||
.dsp_arch_ops = &sof_xtensa_arch_ops,
|
||||
};
|
|
@ -687,14 +687,19 @@ extern struct snd_soc_dai_driver skl_dai[];
|
|||
/*
|
||||
* Platform Specific HW abstraction Ops.
|
||||
*/
|
||||
extern struct snd_sof_dsp_ops sof_hda_common_ops;
|
||||
|
||||
extern struct snd_sof_dsp_ops sof_apl_ops;
|
||||
int sof_apl_ops_init(struct snd_sof_dev *sdev);
|
||||
extern struct snd_sof_dsp_ops sof_cnl_ops;
|
||||
int sof_cnl_ops_init(struct snd_sof_dev *sdev);
|
||||
extern struct snd_sof_dsp_ops sof_tgl_ops;
|
||||
int sof_tgl_ops_init(struct snd_sof_dev *sdev);
|
||||
extern struct snd_sof_dsp_ops sof_icl_ops;
|
||||
int sof_icl_ops_init(struct snd_sof_dev *sdev);
|
||||
|
||||
extern const struct sof_intel_dsp_desc apl_chip_info;
|
||||
extern const struct sof_intel_dsp_desc cnl_chip_info;
|
||||
extern const struct sof_intel_dsp_desc skl_chip_info;
|
||||
extern const struct sof_intel_dsp_desc icl_chip_info;
|
||||
extern const struct sof_intel_dsp_desc tgl_chip_info;
|
||||
extern const struct sof_intel_dsp_desc tglh_chip_info;
|
||||
|
|
|
@ -88,109 +88,41 @@ static int icl_dsp_post_fw_run(struct snd_sof_dev *sdev)
|
|||
}
|
||||
|
||||
/* Icelake ops */
|
||||
struct snd_sof_dsp_ops sof_icl_ops = {
|
||||
struct snd_sof_dsp_ops sof_icl_ops;
|
||||
EXPORT_SYMBOL_NS(sof_icl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
|
||||
|
||||
int sof_icl_ops_init(struct snd_sof_dev *sdev)
|
||||
{
|
||||
/* common defaults */
|
||||
memcpy(&sof_icl_ops, &sof_hda_common_ops, sizeof(struct snd_sof_dsp_ops));
|
||||
|
||||
/* probe/remove/shutdown */
|
||||
.probe = hda_dsp_probe,
|
||||
.remove = hda_dsp_remove,
|
||||
.shutdown = hda_dsp_shutdown,
|
||||
|
||||
/* Register IO */
|
||||
.write = sof_io_write,
|
||||
.read = sof_io_read,
|
||||
.write64 = sof_io_write64,
|
||||
.read64 = sof_io_read64,
|
||||
|
||||
/* Block IO */
|
||||
.block_read = sof_block_read,
|
||||
.block_write = sof_block_write,
|
||||
|
||||
/* Mailbox IO */
|
||||
.mailbox_read = sof_mailbox_read,
|
||||
.mailbox_write = sof_mailbox_write,
|
||||
sof_icl_ops.shutdown = hda_dsp_shutdown;
|
||||
|
||||
/* doorbell */
|
||||
.irq_thread = cnl_ipc_irq_thread,
|
||||
sof_icl_ops.irq_thread = cnl_ipc_irq_thread;
|
||||
|
||||
/* ipc */
|
||||
.send_msg = cnl_ipc_send_msg,
|
||||
.fw_ready = sof_fw_ready,
|
||||
.get_mailbox_offset = hda_dsp_ipc_get_mailbox_offset,
|
||||
.get_window_offset = hda_dsp_ipc_get_window_offset,
|
||||
|
||||
.ipc_msg_data = hda_ipc_msg_data,
|
||||
.set_stream_data_offset = hda_set_stream_data_offset,
|
||||
|
||||
/* machine driver */
|
||||
.machine_select = hda_machine_select,
|
||||
.machine_register = sof_machine_register,
|
||||
.machine_unregister = sof_machine_unregister,
|
||||
.set_mach_params = hda_set_mach_params,
|
||||
sof_icl_ops.send_msg = cnl_ipc_send_msg;
|
||||
|
||||
/* debug */
|
||||
.debug_map = icl_dsp_debugfs,
|
||||
.debug_map_count = ARRAY_SIZE(icl_dsp_debugfs),
|
||||
.dbg_dump = hda_dsp_dump,
|
||||
.ipc_dump = cnl_ipc_dump,
|
||||
.debugfs_add_region_item = snd_sof_debugfs_add_region_item_iomem,
|
||||
|
||||
/* stream callbacks */
|
||||
.pcm_open = hda_dsp_pcm_open,
|
||||
.pcm_close = hda_dsp_pcm_close,
|
||||
.pcm_hw_params = hda_dsp_pcm_hw_params,
|
||||
.pcm_hw_free = hda_dsp_stream_hw_free,
|
||||
.pcm_trigger = hda_dsp_pcm_trigger,
|
||||
.pcm_pointer = hda_dsp_pcm_pointer,
|
||||
.pcm_ack = hda_dsp_pcm_ack,
|
||||
|
||||
/* firmware loading */
|
||||
.load_firmware = snd_sof_load_firmware_raw,
|
||||
sof_icl_ops.debug_map = icl_dsp_debugfs;
|
||||
sof_icl_ops.debug_map_count = ARRAY_SIZE(icl_dsp_debugfs);
|
||||
sof_icl_ops.ipc_dump = cnl_ipc_dump;
|
||||
|
||||
/* pre/post fw run */
|
||||
.pre_fw_run = hda_dsp_pre_fw_run,
|
||||
.post_fw_run = icl_dsp_post_fw_run,
|
||||
|
||||
/* parse platform specific extended manifest */
|
||||
.parse_platform_ext_manifest = hda_dsp_ext_man_get_cavs_config_data,
|
||||
|
||||
/* dsp core get/put */
|
||||
.core_get = hda_dsp_core_get,
|
||||
sof_icl_ops.post_fw_run = icl_dsp_post_fw_run;
|
||||
|
||||
/* firmware run */
|
||||
.run = hda_dsp_cl_boot_firmware_iccmax,
|
||||
.stall = icl_dsp_core_stall,
|
||||
sof_icl_ops.run = hda_dsp_cl_boot_firmware_iccmax;
|
||||
sof_icl_ops.stall = icl_dsp_core_stall;
|
||||
|
||||
/* trace callback */
|
||||
.trace_init = hda_dsp_trace_init,
|
||||
.trace_release = hda_dsp_trace_release,
|
||||
.trace_trigger = hda_dsp_trace_trigger,
|
||||
/* dsp core get/put */
|
||||
sof_icl_ops.core_get = hda_dsp_core_get;
|
||||
|
||||
/* client ops */
|
||||
.register_ipc_clients = hda_register_clients,
|
||||
.unregister_ipc_clients = hda_unregister_clients,
|
||||
|
||||
/* DAI drivers */
|
||||
.drv = skl_dai,
|
||||
.num_drv = SOF_SKL_NUM_DAIS,
|
||||
|
||||
/* PM */
|
||||
.suspend = hda_dsp_suspend,
|
||||
.resume = hda_dsp_resume,
|
||||
.runtime_suspend = hda_dsp_runtime_suspend,
|
||||
.runtime_resume = hda_dsp_runtime_resume,
|
||||
.runtime_idle = hda_dsp_runtime_idle,
|
||||
.set_hw_params_upon_resume = hda_dsp_set_hw_params_upon_resume,
|
||||
.set_power_state = hda_dsp_set_power_state,
|
||||
|
||||
/* ALSA HW info flags */
|
||||
.hw_info = SNDRV_PCM_INFO_MMAP |
|
||||
SNDRV_PCM_INFO_MMAP_VALID |
|
||||
SNDRV_PCM_INFO_INTERLEAVED |
|
||||
SNDRV_PCM_INFO_PAUSE |
|
||||
SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
|
||||
|
||||
.dsp_arch_ops = &sof_xtensa_arch_ops,
|
||||
return 0;
|
||||
};
|
||||
EXPORT_SYMBOL_NS(sof_icl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
|
||||
EXPORT_SYMBOL_NS(sof_icl_ops_init, SND_SOC_SOF_INTEL_HDA_COMMON);
|
||||
|
||||
const struct sof_intel_dsp_desc icl_chip_info = {
|
||||
/* Icelake */
|
||||
|
|
|
@ -43,6 +43,7 @@ static const struct sof_dev_desc bxt_desc = {
|
|||
},
|
||||
.nocodec_tplg_filename = "sof-apl-nocodec.tplg",
|
||||
.ops = &sof_apl_ops,
|
||||
.ops_init = sof_apl_ops_init,
|
||||
};
|
||||
|
||||
static const struct sof_dev_desc glk_desc = {
|
||||
|
@ -69,6 +70,7 @@ static const struct sof_dev_desc glk_desc = {
|
|||
},
|
||||
.nocodec_tplg_filename = "sof-glk-nocodec.tplg",
|
||||
.ops = &sof_apl_ops,
|
||||
.ops_init = sof_apl_ops_init,
|
||||
};
|
||||
|
||||
/* PCI IDs */
|
||||
|
|
|
@ -44,6 +44,7 @@ static const struct sof_dev_desc cnl_desc = {
|
|||
},
|
||||
.nocodec_tplg_filename = "sof-cnl-nocodec.tplg",
|
||||
.ops = &sof_cnl_ops,
|
||||
.ops_init = sof_cnl_ops_init,
|
||||
};
|
||||
|
||||
static const struct sof_dev_desc cfl_desc = {
|
||||
|
@ -71,6 +72,7 @@ static const struct sof_dev_desc cfl_desc = {
|
|||
},
|
||||
.nocodec_tplg_filename = "sof-cnl-nocodec.tplg",
|
||||
.ops = &sof_cnl_ops,
|
||||
.ops_init = sof_cnl_ops_init,
|
||||
};
|
||||
|
||||
static const struct sof_dev_desc cml_desc = {
|
||||
|
@ -98,6 +100,7 @@ static const struct sof_dev_desc cml_desc = {
|
|||
},
|
||||
.nocodec_tplg_filename = "sof-cnl-nocodec.tplg",
|
||||
.ops = &sof_cnl_ops,
|
||||
.ops_init = sof_cnl_ops_init,
|
||||
};
|
||||
|
||||
/* PCI IDs */
|
||||
|
|
|
@ -44,6 +44,7 @@ static const struct sof_dev_desc icl_desc = {
|
|||
},
|
||||
.nocodec_tplg_filename = "sof-icl-nocodec.tplg",
|
||||
.ops = &sof_icl_ops,
|
||||
.ops_init = sof_icl_ops_init,
|
||||
};
|
||||
|
||||
static const struct sof_dev_desc jsl_desc = {
|
||||
|
@ -70,6 +71,7 @@ static const struct sof_dev_desc jsl_desc = {
|
|||
},
|
||||
.nocodec_tplg_filename = "sof-jsl-nocodec.tplg",
|
||||
.ops = &sof_cnl_ops,
|
||||
.ops_init = sof_cnl_ops_init,
|
||||
};
|
||||
|
||||
/* PCI IDs */
|
||||
|
|
|
@ -44,6 +44,7 @@ static const struct sof_dev_desc tgl_desc = {
|
|||
},
|
||||
.nocodec_tplg_filename = "sof-tgl-nocodec.tplg",
|
||||
.ops = &sof_tgl_ops,
|
||||
.ops_init = sof_tgl_ops_init,
|
||||
};
|
||||
|
||||
static const struct sof_dev_desc tglh_desc = {
|
||||
|
@ -71,6 +72,7 @@ static const struct sof_dev_desc tglh_desc = {
|
|||
},
|
||||
.nocodec_tplg_filename = "sof-tgl-nocodec.tplg",
|
||||
.ops = &sof_tgl_ops,
|
||||
.ops_init = sof_tgl_ops_init,
|
||||
};
|
||||
|
||||
static const struct sof_dev_desc ehl_desc = {
|
||||
|
@ -97,6 +99,7 @@ static const struct sof_dev_desc ehl_desc = {
|
|||
},
|
||||
.nocodec_tplg_filename = "sof-ehl-nocodec.tplg",
|
||||
.ops = &sof_tgl_ops,
|
||||
.ops_init = sof_tgl_ops_init,
|
||||
};
|
||||
|
||||
static const struct sof_dev_desc adls_desc = {
|
||||
|
@ -124,6 +127,7 @@ static const struct sof_dev_desc adls_desc = {
|
|||
},
|
||||
.nocodec_tplg_filename = "sof-adl-nocodec.tplg",
|
||||
.ops = &sof_tgl_ops,
|
||||
.ops_init = sof_tgl_ops_init,
|
||||
};
|
||||
|
||||
static const struct sof_dev_desc adl_desc = {
|
||||
|
@ -151,6 +155,7 @@ static const struct sof_dev_desc adl_desc = {
|
|||
},
|
||||
.nocodec_tplg_filename = "sof-adl-nocodec.tplg",
|
||||
.ops = &sof_tgl_ops,
|
||||
.ops_init = sof_tgl_ops_init,
|
||||
};
|
||||
|
||||
/* PCI IDs */
|
||||
|
@ -195,4 +200,3 @@ module_pci_driver(snd_sof_pci_intel_tgl_driver);
|
|||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_HDA_COMMON);
|
||||
MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV);
|
||||
|
||||
|
|
|
@ -59,109 +59,41 @@ static int tgl_dsp_core_put(struct snd_sof_dev *sdev, int core)
|
|||
}
|
||||
|
||||
/* Tigerlake ops */
|
||||
struct snd_sof_dsp_ops sof_tgl_ops = {
|
||||
struct snd_sof_dsp_ops sof_tgl_ops;
|
||||
EXPORT_SYMBOL_NS(sof_tgl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
|
||||
|
||||
int sof_tgl_ops_init(struct snd_sof_dev *sdev)
|
||||
{
|
||||
/* common defaults */
|
||||
memcpy(&sof_tgl_ops, &sof_hda_common_ops, sizeof(struct snd_sof_dsp_ops));
|
||||
|
||||
/* probe/remove/shutdown */
|
||||
.probe = hda_dsp_probe,
|
||||
.remove = hda_dsp_remove,
|
||||
.shutdown = hda_dsp_shutdown,
|
||||
|
||||
/* Register IO */
|
||||
.write = sof_io_write,
|
||||
.read = sof_io_read,
|
||||
.write64 = sof_io_write64,
|
||||
.read64 = sof_io_read64,
|
||||
|
||||
/* Block IO */
|
||||
.block_read = sof_block_read,
|
||||
.block_write = sof_block_write,
|
||||
|
||||
/* Mailbox IO */
|
||||
.mailbox_read = sof_mailbox_read,
|
||||
.mailbox_write = sof_mailbox_write,
|
||||
sof_tgl_ops.shutdown = hda_dsp_shutdown;
|
||||
|
||||
/* doorbell */
|
||||
.irq_thread = cnl_ipc_irq_thread,
|
||||
sof_tgl_ops.irq_thread = cnl_ipc_irq_thread;
|
||||
|
||||
/* ipc */
|
||||
.send_msg = cnl_ipc_send_msg,
|
||||
.fw_ready = sof_fw_ready,
|
||||
.get_mailbox_offset = hda_dsp_ipc_get_mailbox_offset,
|
||||
.get_window_offset = hda_dsp_ipc_get_window_offset,
|
||||
|
||||
.ipc_msg_data = hda_ipc_msg_data,
|
||||
.set_stream_data_offset = hda_set_stream_data_offset,
|
||||
|
||||
/* machine driver */
|
||||
.machine_select = hda_machine_select,
|
||||
.machine_register = sof_machine_register,
|
||||
.machine_unregister = sof_machine_unregister,
|
||||
.set_mach_params = hda_set_mach_params,
|
||||
sof_tgl_ops.send_msg = cnl_ipc_send_msg;
|
||||
|
||||
/* debug */
|
||||
.debug_map = tgl_dsp_debugfs,
|
||||
.debug_map_count = ARRAY_SIZE(tgl_dsp_debugfs),
|
||||
.dbg_dump = hda_dsp_dump,
|
||||
.ipc_dump = cnl_ipc_dump,
|
||||
.debugfs_add_region_item = snd_sof_debugfs_add_region_item_iomem,
|
||||
|
||||
/* stream callbacks */
|
||||
.pcm_open = hda_dsp_pcm_open,
|
||||
.pcm_close = hda_dsp_pcm_close,
|
||||
.pcm_hw_params = hda_dsp_pcm_hw_params,
|
||||
.pcm_hw_free = hda_dsp_stream_hw_free,
|
||||
.pcm_trigger = hda_dsp_pcm_trigger,
|
||||
.pcm_pointer = hda_dsp_pcm_pointer,
|
||||
.pcm_ack = hda_dsp_pcm_ack,
|
||||
|
||||
/* firmware loading */
|
||||
.load_firmware = snd_sof_load_firmware_raw,
|
||||
sof_tgl_ops.debug_map = tgl_dsp_debugfs;
|
||||
sof_tgl_ops.debug_map_count = ARRAY_SIZE(tgl_dsp_debugfs);
|
||||
sof_tgl_ops.ipc_dump = cnl_ipc_dump;
|
||||
|
||||
/* pre/post fw run */
|
||||
.pre_fw_run = hda_dsp_pre_fw_run,
|
||||
.post_fw_run = hda_dsp_post_fw_run,
|
||||
|
||||
/* parse platform specific extended manifest */
|
||||
.parse_platform_ext_manifest = hda_dsp_ext_man_get_cavs_config_data,
|
||||
|
||||
/* dsp core get/put */
|
||||
.core_get = tgl_dsp_core_get,
|
||||
.core_put = tgl_dsp_core_put,
|
||||
sof_tgl_ops.post_fw_run = hda_dsp_post_fw_run;
|
||||
|
||||
/* firmware run */
|
||||
.run = hda_dsp_cl_boot_firmware_iccmax,
|
||||
sof_tgl_ops.run = hda_dsp_cl_boot_firmware_iccmax;
|
||||
|
||||
/* trace callback */
|
||||
.trace_init = hda_dsp_trace_init,
|
||||
.trace_release = hda_dsp_trace_release,
|
||||
.trace_trigger = hda_dsp_trace_trigger,
|
||||
/* dsp core get/put */
|
||||
sof_tgl_ops.core_get = tgl_dsp_core_get;
|
||||
sof_tgl_ops.core_put = tgl_dsp_core_put;
|
||||
|
||||
/* client ops */
|
||||
.register_ipc_clients = hda_register_clients,
|
||||
.unregister_ipc_clients = hda_unregister_clients,
|
||||
|
||||
/* DAI drivers */
|
||||
.drv = skl_dai,
|
||||
.num_drv = SOF_SKL_NUM_DAIS,
|
||||
|
||||
/* PM */
|
||||
.suspend = hda_dsp_suspend,
|
||||
.resume = hda_dsp_resume,
|
||||
.runtime_suspend = hda_dsp_runtime_suspend,
|
||||
.runtime_resume = hda_dsp_runtime_resume,
|
||||
.runtime_idle = hda_dsp_runtime_idle,
|
||||
.set_hw_params_upon_resume = hda_dsp_set_hw_params_upon_resume,
|
||||
.set_power_state = hda_dsp_set_power_state,
|
||||
|
||||
/* ALSA HW info flags */
|
||||
.hw_info = SNDRV_PCM_INFO_MMAP |
|
||||
SNDRV_PCM_INFO_MMAP_VALID |
|
||||
SNDRV_PCM_INFO_INTERLEAVED |
|
||||
SNDRV_PCM_INFO_PAUSE |
|
||||
SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
|
||||
|
||||
.dsp_arch_ops = &sof_xtensa_arch_ops,
|
||||
return 0;
|
||||
};
|
||||
EXPORT_SYMBOL_NS(sof_tgl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
|
||||
EXPORT_SYMBOL_NS(sof_tgl_ops_init, SND_SOC_SOF_INTEL_HDA_COMMON);
|
||||
|
||||
const struct sof_intel_dsp_desc tgl_chip_info = {
|
||||
/* Tigerlake , Alderlake */
|
||||
|
|
|
@ -21,10 +21,12 @@
|
|||
#define sof_ops(sdev) \
|
||||
((sdev)->pdata->desc->ops)
|
||||
|
||||
static inline void sof_ops_init(struct snd_sof_dev *sdev)
|
||||
static inline int sof_ops_init(struct snd_sof_dev *sdev)
|
||||
{
|
||||
if (sdev->pdata->desc->ops_init)
|
||||
sdev->pdata->desc->ops_init(sdev);
|
||||
return sdev->pdata->desc->ops_init(sdev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Mandatory operations are verified during probing */
|
||||
|
|
Loading…
Reference in New Issue