ARM: 7343/1: sa11x0: convert to sparse IRQ
Now that Neponset, UCB1x00 and SA1111 are all converted to use the IRQ allocation interfaces, we can enable sparse IRQ support for SA11x0 platforms.
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@ -760,6 +760,7 @@ config ARCH_SA1100
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select ARCH_REQUIRE_GPIOLIB
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select HAVE_IDE
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select NEED_MACH_MEMORY_H
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select SPARSE_IRQ
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help
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Support for StrongARM 11x0 based boards.
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@ -57,7 +57,6 @@ static void badge4_sa1111_disable(void *data, unsigned devid)
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}
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static struct sa1111_platform_data sa1111_info = {
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.irq_base = IRQ_BOARD_END,
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.disable_devs = SA1111_DEVID_PS2_MSE,
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.enable = badge4_sa1111_enable,
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.disable = badge4_sa1111_disable,
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@ -71,16 +71,19 @@
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/*
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* Figure out the MAX IRQ number.
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*
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* If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
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* If we have an LoCoMo, the max IRQ is IRQ_BOARD_START + 4
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* Otherwise, we have the standard IRQs only.
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* Neponset, SA1111 and UCB1x00 are sparse IRQ aware, so can dynamically
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* allocate their IRQs above NR_IRQS.
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*
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* LoCoMo has 4 additional IRQs, but is not sparse IRQ aware, and so has
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* to be included in the NR_IRQS calculation.
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*/
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#ifdef CONFIG_SA1111
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#define NR_IRQS (IRQ_BOARD_END + 55)
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#elif defined(CONFIG_SHARP_LOCOMO)
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#define NR_IRQS (IRQ_BOARD_START + 4)
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#ifdef CONFIG_SHARP_LOCOMO
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#define NR_IRQS_LOCOMO 4
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#else
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#define NR_IRQS (IRQ_BOARD_START)
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#define NR_IRQS_LOCOMO 0
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#endif
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#define SA1100_NR_IRQS NR_IRQS
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#ifndef NR_IRQS
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#define NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO)
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#endif
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#define SA1100_NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO)
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@ -195,7 +195,6 @@ static struct resource sa1111_resources[] = {
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};
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static struct sa1111_platform_data sa1111_info = {
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.irq_base = IRQ_BOARD_END,
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.disable_devs = SA1111_DEVID_PS2_MSE,
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};
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@ -229,7 +229,6 @@ static struct irq_chip nochip = {
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};
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static struct sa1111_platform_data sa1111_info = {
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.irq_base = IRQ_BOARD_END,
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.disable_devs = SA1111_DEVID_PS2_MSE,
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};
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