OpenRISC 6.1 Updates
I have relocated to London so not much work from me while I get settled. Still, OpenRISC picked up two patches in this window: - Fix for kernel page table walking from Jann Horn - MAINTAINER entry cleanup from Palmer Dabbelt -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmNK478ACgkQw7McLV5m J+QdSw/+NFTmfpo40EGa3IdrK9ZQCgQoPN7rGKEr+QpRcVZuER+oDax6+hbobmBp E+0Trdx8px/YJLWVC9imGxqMS8ev1twLy3VrCi+5p7B6mYUkMcDkf5Et1uI5WLky 3BBnw92Ycmc+bR2ROESRp4mvMHDdVhdIt60sHSFjcGTH2FnB6IiwUFX/GrcxYy9U kkLrQ7AW36SzVIZ/0CNYZwxvlHv5n9aFiii0SKQriCuWDT2EvUw3f4kaOEzTg7pA UKUU3CU8n4Rg9LeHiVb0KqLlGS+/ZntO9Ad2jgYvF4X42ijLnTgjSUOjmeC1D5R8 N0h1Y9WByL513MymfnptVrZSIhVOFhtsPgP2ys4CXMfHX+0iRKNOt3ZpSHFXpjDe SlVA2k+BBt8SPwAIMoQBClaGKdgT0vjTE/l389BujhIDgdG18HEIhB77SLnyXvNq VuXfeRlQuvEkSGH0sMdFr9rBM08Q3fS5S+i+2YJucChLndnZr+iE2KhYiG/tzia3 u64LmYDrPFNTIDjg8huLnHmUxlVcPK9vQSn3VRI1pKn47v4zD3rHa4mFryR6rhNw xQDFOmAeeOmBiHoatwObGHaItEChLWvBW63JdUh873N2lg5UwcqqKp8e10KT35kG CZA3g4OSTXM+PDWOJi1tDec08smIFqUv/U53tckcGV4b0myFNk0= =WKxB -----END PGP SIGNATURE----- Merge tag 'for-linus' of https://github.com/openrisc/linux Pull OpenRISC updates from Stafford Horne: "I have relocated to London so not much work from me while I get settled. Still, OpenRISC picked up two patches in this window: - Fix for kernel page table walking from Jann Horn - MAINTAINER entry cleanup from Palmer Dabbelt" * tag 'for-linus' of https://github.com/openrisc/linux: MAINTAINERS: git://github -> https://github.com for openrisc openrisc: Fix pagewalk usage in arch_dma_{clear, set}_uncached
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@ -15411,7 +15411,7 @@ M: Stafford Horne <shorne@gmail.com>
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L: openrisc@lists.librecores.org
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S: Maintained
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W: http://openrisc.io
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T: git git://github.com/openrisc/linux.git
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T: git https://github.com/openrisc/linux.git
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F: Documentation/devicetree/bindings/openrisc/
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F: Documentation/openrisc/
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F: arch/openrisc/
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@ -74,10 +74,10 @@ void *arch_dma_set_uncached(void *cpu_addr, size_t size)
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* We need to iterate through the pages, clearing the dcache for
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* them and setting the cache-inhibit bit.
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*/
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mmap_read_lock(&init_mm);
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error = walk_page_range(&init_mm, va, va + size, &set_nocache_walk_ops,
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NULL);
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mmap_read_unlock(&init_mm);
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mmap_write_lock(&init_mm);
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error = walk_page_range_novma(&init_mm, va, va + size,
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&set_nocache_walk_ops, NULL, NULL);
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mmap_write_unlock(&init_mm);
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if (error)
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return ERR_PTR(error);
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@ -88,11 +88,11 @@ void arch_dma_clear_uncached(void *cpu_addr, size_t size)
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{
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unsigned long va = (unsigned long)cpu_addr;
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mmap_read_lock(&init_mm);
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mmap_write_lock(&init_mm);
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/* walk_page_range shouldn't be able to fail here */
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WARN_ON(walk_page_range(&init_mm, va, va + size,
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&clear_nocache_walk_ops, NULL));
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mmap_read_unlock(&init_mm);
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WARN_ON(walk_page_range_novma(&init_mm, va, va + size,
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&clear_nocache_walk_ops, NULL, NULL));
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mmap_write_unlock(&init_mm);
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}
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void arch_sync_dma_for_device(phys_addr_t addr, size_t size,
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