[MIPS] Fix uniprocessor Sibyte builds.
Signed-off-by: Andrew Sharp <tigerand@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -259,6 +259,12 @@ static void sb1_flush_cache_data_page(unsigned long addr)
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on_each_cpu(sb1_flush_cache_data_page_ipi, (void *) addr, 1, 1);
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}
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#else
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static void local_sb1_flush_cache_data_page(unsigned long addr)
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{
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__sb1_writeback_inv_dcache_range(addr, addr + PAGE_SIZE);
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}
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void sb1_flush_cache_data_page(unsigned long)
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__attribute__((alias("local_sb1_flush_cache_data_page")));
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#endif
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