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staging: r8723au: Add source files for new driver - part 4 

The Realtek USB device RTL8723AU is found in Lenovo Yoga 13 tablets.
A driver for it has been available in a GitHub repo for several months.
This commit contains the fourth part of source files. The source
is arbitrarily split to avoid E-mail files that are too large.

Jes Sorensen at RedHat has made many improvements to the vendor code,
and he has been doing the testing. I do not have access to this device.

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Cc: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Larry Finger 2014-03-28 21:37:41 -05:00 committed by Greg Kroah-Hartman
parent b1925ad846
commit 364e30ebd2
75 changed files with 18670 additions and 0 deletions
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234
drivers/staging/rtl8723au/include/Hal8723APhyCfg.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*
******************************************************************************/
#ifndef __INC_HAL8723PHYCFG_H__
#define __INC_HAL8723PHYCFG_H__
/*--------------------------Define Parameters-------------------------------*/
#define LOOP_LIMIT 5
#define MAX_STALL_TIME 50 /* us */
#define AntennaDiversityValue 0x80
#define MAX_TXPWR_IDX_NMODE_92S 63
#define Reset_Cnt_Limit 3
#define MAX_AGGR_NUM 0x0909
/*--------------------------Define Parameters-------------------------------*/
/*------------------------------Define structure----------------------------*/
enum swchnlcmdid {
CmdID_End,
CmdID_SetTxPowerLevel,
CmdID_BBRegWrite10,
CmdID_WritePortUlong,
CmdID_WritePortUshort,
CmdID_WritePortUchar,
CmdID_RF_WriteReg,
};
/* 1. Switch channel related */
struct swchnlcmd {
enum swchnlcmdid CmdID;
u32 Para1;
u32 Para2;
u32 msDelay;
};
enum HW90_BLOCK {
HW90_BLOCK_MAC = 0,
HW90_BLOCK_PHY0 = 1,
HW90_BLOCK_PHY1 = 2,
HW90_BLOCK_RF = 3,
HW90_BLOCK_MAXIMUM = 4, /* Never use this */
};
enum RF_RADIO_PATH {
RF_PATH_A = 0, /* Radio Path A */
RF_PATH_B = 1, /* Radio Path B */
RF_PATH_C = 2, /* Radio Path C */
RF_PATH_D = 3, /* Radio Path D */
RF_PATH_MAX /* Max RF number 90 support */
};
#define RF_PATH_MAX 3
#define CHANNEL_MAX_NUMBER 14 /* 14 is the max channel number */
#define CHANNEL_GROUP_MAX 3 /* ch1~3, ch4~9, ch10~14 total three groups */
enum WIRELESS_MODE {
WIRELESS_MODE_UNKNOWN = 0x00,
WIRELESS_MODE_A = BIT2,
WIRELESS_MODE_B = BIT0,
WIRELESS_MODE_G = BIT1,
WIRELESS_MODE_AUTO = BIT5,
WIRELESS_MODE_N_24G = BIT3,
WIRELESS_MODE_N_5G = BIT4,
WIRELESS_MODE_AC = BIT6
};
enum baseband_config_type {
BaseBand_Config_PHY_REG = 0, /* Radio Path A */
BaseBand_Config_AGC_TAB = 1, /* Radio Path B */
};
enum ra_offset_area {
RA_OFFSET_LEGACY_OFDM1,
RA_OFFSET_LEGACY_OFDM2,
RA_OFFSET_HT_OFDM1,
RA_OFFSET_HT_OFDM2,
RA_OFFSET_HT_OFDM3,
RA_OFFSET_HT_OFDM4,
RA_OFFSET_HT_CCK,
};
/* BB/RF related */
enum rf_type_8190p {
RF_TYPE_MIN, /* 0 */
RF_8225 = 1, /* 1 11b/g RF for verification only */
RF_8256 = 2, /* 2 11b/g/n */
RF_8258 = 3, /* 3 11a/b/g/n RF */
RF_6052 = 4, /* 4 11b/g/n RF */
RF_PSEUDO_11N = 5, /* 5, It is a temporality RF. */
};
struct bb_reg_define {
u32 rfintfs; /* set software control: */
/* 0x870~0x877[8 bytes] */
u32 rfintfi; /* readback data: */
/* 0x8e0~0x8e7[8 bytes] */
u32 rfintfo; /* output data: */
/* 0x860~0x86f [16 bytes] */
u32 rfintfe; /* output enable: */
/* 0x860~0x86f [16 bytes] */
u32 rf3wireOffset; /* LSSI data: */
/* 0x840~0x84f [16 bytes] */
u32 rfLSSI_Select; /* BB Band Select: */
/* 0x878~0x87f [8 bytes] */
u32 rfTxGainStage; /* Tx gain stage: */
/* 0x80c~0x80f [4 bytes] */
u32 rfHSSIPara1; /* wire parameter control1 : */
/* 0x820~0x823, 0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes] */
u32 rfHSSIPara2; /* wire parameter control2 : */
/* 0x824~0x827, 0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] */
u32 rfSwitchControl; /* Tx Rx antenna control : */
/* 0x858~0x85f [16 bytes] */
u32 rfAGCControl1; /* AGC parameter control1 : */
/* 0xc50~0xc53, 0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes] */
u32 rfAGCControl2; /* AGC parameter control2 : */
/* 0xc54~0xc57, 0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes] */
u32 rfRxIQImbalance; /* OFDM Rx IQ imbalance matrix : */
/* 0xc14~0xc17, 0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes] */
u32 rfRxAFE; /* Rx IQ DC ofset and Rx digital filter, Rx DC notch filter : */
/* 0xc10~0xc13, 0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes] */
u32 rfTxIQImbalance; /* OFDM Tx IQ imbalance matrix */
/* 0xc80~0xc83, 0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes] */
u32 rfTxAFE; /* Tx IQ DC Offset and Tx DFIR type */
/* 0xc84~0xc87, 0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes] */
u32 rfLSSIReadBack; /* LSSI RF readback data SI mode */
/* 0x8a0~0x8af [16 bytes] */
u32 rfLSSIReadBackPi; /* LSSI RF readback data PI mode 0x8b8-8bc for Path A and B */
};
struct r_antenna_sel_ofdm {
u32 r_tx_antenna:4;
u32 r_ant_l:4;
u32 r_ant_non_ht:4;
u32 r_ant_ht1:4;
u32 r_ant_ht2:4;
u32 r_ant_ht_s1:4;
u32 r_ant_non_ht_s1:4;
u32 OFDM_TXSC:2;
u32 Reserved:2;
};
struct r_antenna_sel_cck {
u8 r_cckrx_enable_2:2;
u8 r_cckrx_enable:2;
u8 r_ccktx_enable:4;
};
/*------------------------------Define structure----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Macro Definition---------------------------*/
/*------------------------Export Macro Definition---------------------------*/
/*--------------------------Exported Function prototype---------------------*/
/* */
/* BB and RF register read/write */
/* */
u32 PHY_QueryBBReg(struct rtw_adapter *Adapter, u32 RegAddr,
u32 BitMask);
void PHY_SetBBReg(struct rtw_adapter *Adapter, u32 RegAddr,
u32 BitMask, u32 Data);
u32 PHY_QueryRFReg(struct rtw_adapter *Adapter,
enum RF_RADIO_PATH eRFPath, u32 RegAddr,
u32 BitMask);
void PHY_SetRFReg(struct rtw_adapter *Adapter,
enum RF_RADIO_PATH eRFPath, u32 RegAddr,
u32 BitMask, u32 Data);
/* */
/* BB TX Power R/W */
/* */
void PHY_SetTxPowerLevel8723A(struct rtw_adapter *Adapter, u8 channel);
/* */
/* Switch bandwidth for 8723A */
/* */
void PHY_SetBWMode23a8723A(struct rtw_adapter *pAdapter,
enum ht_channel_width ChnlWidth,
unsigned char Offset);
/* */
/* channel switch related funciton */
/* */
void PHY_SwChnl8723A(struct rtw_adapter *pAdapter, u8 channel);
/* Call after initialization */
void ChkFwCmdIoDone(struct rtw_adapter *Adapter);
/* */
/* Modify the value of the hw register when beacon interval be changed. */
/* */
void
rtl8192c_PHY_SetBeaconHwReg(struct rtw_adapter *Adapter, u16 BeaconInterval);
void PHY_SwitchEphyParameter(struct rtw_adapter *Adapter);
void PHY_EnableHostClkReq(struct rtw_adapter *Adapter);
bool
SetAntennaConfig92C(struct rtw_adapter *Adapter, u8 DefaultAnt);
/*--------------------------Exported Function prototype---------------------*/
#define PHY_SetMacReg PHY_SetBBReg
/* MAC/BB/RF HAL config */
int PHY_BBConfig8723A(struct rtw_adapter *Adapter);
int PHY_RFConfig8723A(struct rtw_adapter *Adapter);
s32 PHY_MACConfig8723A(struct rtw_adapter *padapter);
#endif

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drivers/staging/rtl8723au/include/Hal8723APhyReg.h Normal file
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150
drivers/staging/rtl8723au/include/Hal8723PwrSeq.h Normal file
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#ifndef __HAL8723PWRSEQ_H__
#define __HAL8723PWRSEQ_H__
/*
Check document WM-20110607-Paul-RTL8723A_Power_Architecture-R02.vsd
There are 6 HW Power States:
0: POFF--Power Off
1: PDN--Power Down
2: CARDEMU--Card Emulation
3: ACT--Active Mode
4: LPS--Low Power State
5: SUS--Suspend
The transision from different states are defined below
TRANS_CARDEMU_TO_ACT
TRANS_ACT_TO_CARDEMU
TRANS_CARDEMU_TO_SUS
TRANS_SUS_TO_CARDEMU
TRANS_CARDEMU_TO_PDN
TRANS_ACT_TO_LPS
TRANS_LPS_TO_ACT
TRANS_END
*/
#include "HalPwrSeqCmd.h"
#include "rtl8723a_spec.h"
#define RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS 15
#define RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS 15
#define RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS 15
#define RTL8723A_TRANS_SUS_TO_CARDEMU_STEPS 15
#define RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS 15
#define RTL8723A_TRANS_PDN_TO_CARDEMU_STEPS 15
#define RTL8723A_TRANS_ACT_TO_LPS_STEPS 15
#define RTL8723A_TRANS_LPS_TO_ACT_STEPS 15
#define RTL8723A_TRANS_END_STEPS 1
/* format
* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here
*/
#define RTL8723A_TRANS_CARDEMU_TO_ACT \
{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \
{0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \
{0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \
{0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital , 1:isolation*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]= 0*/ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]= 1*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]= 0*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \
{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 1},/*0x4C[23] = 0x4E[7] = 1, switch DPDT_SEL_P output from WL BB */\
#define RTL8723A_TRANS_ACT_TO_CARDEMU \
{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \
{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \
{0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital , 1:isolation*/ \
{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/ \
#define RTL8723A_TRANS_CARDEMU_TO_SUS \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \
{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/
#define RTL8723A_TRANS_SUS_TO_CARDEMU \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/
#define RTL8723A_TRANS_CARDEMU_TO_CARDDIS \
{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \
{0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/
#define RTL8723A_TRANS_CARDDIS_TO_CARDEMU \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\
{0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \
{0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/
#define RTL8723A_TRANS_CARDEMU_TO_PDN \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \
{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/
#define RTL8723A_TRANS_PDN_TO_CARDEMU \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/
#define RTL8723A_TRANS_ACT_TO_LPS \
{0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \
{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \
{0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \
{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \
{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \
{0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/
#define RTL8723A_TRANS_LPS_TO_ACT \
{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\
{0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\
{0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\
{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\
{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]= 0 TSF in 40M*/\
{0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\
{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\
{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/
#define RTL8723A_TRANS_END \
{0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0},
extern struct wlan_pwr_cfg rtl8723AU_power_on_flow[RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8723A_TRANS_END_STEPS];
extern struct wlan_pwr_cfg rtl8723AU_radio_off_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_END_STEPS];
extern struct wlan_pwr_cfg rtl8723AU_card_disable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS];
extern struct wlan_pwr_cfg rtl8723AU_card_enable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS];
extern struct wlan_pwr_cfg rtl8723AU_suspend_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723A_TRANS_END_STEPS];
extern struct wlan_pwr_cfg rtl8723AU_resume_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8723A_TRANS_END_STEPS];
extern struct wlan_pwr_cfg rtl8723AU_hwpdn_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8723A_TRANS_END_STEPS];
extern struct wlan_pwr_cfg rtl8723AU_enter_lps_flow[RTL8723A_TRANS_ACT_TO_LPS_STEPS+RTL8723A_TRANS_END_STEPS];
extern struct wlan_pwr_cfg rtl8723AU_leave_lps_flow[RTL8723A_TRANS_LPS_TO_ACT_STEPS+RTL8723A_TRANS_END_STEPS];
#endif

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drivers/staging/rtl8723au/include/Hal8723UHWImg_CE.h Normal file
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#ifndef __INC_HAL8723U_FW_IMG_H
#define __INC_HAL8723U_FW_IMG_H
/*Created on 2013/01/14, 15:51*/
/* FW v16 enable usb interrupt */
#define Rtl8723UImgArrayLength 22172
extern u8 Rtl8723UFwImgArray[Rtl8723UImgArrayLength];
#define Rtl8723UBTImgArrayLength 1
extern u8 Rtl8723UFwBTImgArray[Rtl8723UBTImgArrayLength];
#define Rtl8723UUMCBCutImgArrayWithBTLength 24118
#define Rtl8723UUMCBCutImgArrayWithoutBTLength 19200
extern u8 Rtl8723UFwUMCBCutImgArrayWithBT[Rtl8723UUMCBCutImgArrayWithBTLength];
extern u8 Rtl8723UFwUMCBCutImgArrayWithoutBT[Rtl8723UUMCBCutImgArrayWithoutBTLength];
#define Rtl8723SUMCBCutMPImgArrayLength 24174
extern const u8 Rtl8723SFwUMCBCutMPImgArray[Rtl8723SUMCBCutMPImgArrayLength];
#define Rtl8723EBTImgArrayLength 15276
extern u8 Rtl8723EFwBTImgArray[Rtl8723EBTImgArrayLength] ;
#define Rtl8723UPHY_REG_Array_PGLength 336
extern u32 Rtl8723UPHY_REG_Array_PG[Rtl8723UPHY_REG_Array_PGLength];
#define Rtl8723UMACPHY_Array_PGLength 1
extern u32 Rtl8723UMACPHY_Array_PG[Rtl8723UMACPHY_Array_PGLength];
#endif /* ifndef __INC_HAL8723U_FW_IMG_H */

64
drivers/staging/rtl8723au/include/HalDMOutSrc8723A.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*
******************************************************************************/
#ifndef __RTL8723A_ODM_H__
#define __RTL8723A_ODM_H__
/* */
#define RSSI_CCK 0
#define RSSI_OFDM 1
#define RSSI_DEFAULT 2
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM 9
#define HP_THERMAL_NUM 8
/* */
/* structure and define */
/* */
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/* define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} */
/* */
/* function prototype */
/* */
/* */
/* IQ calibrate */
/* */
void rtl8723a_phy_iq_calibrate(struct rtw_adapter *pAdapter, bool bReCovery);
/* */
/* LC calibrate */
/* */
void rtl8723a_phy_lc_calibrate(struct rtw_adapter *pAdapter);
/* */
/* AP calibrate */
/* */
void rtl8723a_phy_ap_calibrate(struct rtw_adapter *pAdapter, char delta);
void rtl8723a_odm_check_tx_power_tracking(struct rtw_adapter *Adapter);
#endif

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drivers/staging/rtl8723au/include/HalHWImg8723A_BB.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*
******************************************************************************/
#ifndef __INC_BB_8723A_HW_IMG_H
#define __INC_BB_8723A_HW_IMG_H
/******************************************************************************
* AGC_TAB_1T.TXT
******************************************************************************/
void ODM_ReadAndConfig_AGC_TAB_1T_8723A(struct dm_odm_t *pDM_Odm);
/******************************************************************************
* PHY_REG_1T.TXT
******************************************************************************/
void ODM_ReadAndConfig_PHY_REG_1T_8723A(struct dm_odm_t *pDM_Odm);
/******************************************************************************
* PHY_REG_MP.TXT
******************************************************************************/
void ODM_ReadAndConfig_PHY_REG_MP_8723A(struct dm_odm_t *pDM_Odm);
/******************************************************************************
* PHY_REG_PG.TXT
******************************************************************************/
void ODM_ReadAndConfig_PHY_REG_PG_8723A(struct dm_odm_t *pDM_Odm);
#endif /* end of HWIMG_SUPPORT */

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drivers/staging/rtl8723au/include/HalHWImg8723A_FW.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*
******************************************************************************/
#ifndef __INC_FW_8723A_HW_IMG_H
#define __INC_FW_8723A_HW_IMG_H
/******************************************************************************
* rtl8723fw_B.TXT
******************************************************************************/
void ODM_ReadFirmware_8723A_rtl8723fw_B(struct dm_odm_t *pDM_Odm,
u8 *pFirmware, u32 *pFirmwareSize);
#endif /* end of HWIMG_SUPPORT */

26
drivers/staging/rtl8723au/include/HalHWImg8723A_MAC.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*
******************************************************************************/
#ifndef __INC_MAC_8723A_HW_IMG_H
#define __INC_MAC_8723A_HW_IMG_H
/******************************************************************************
* MAC_REG.TXT
******************************************************************************/
void ODM_ReadAndConfig_MAC_REG_8723A(struct dm_odm_t *pDM_Odm);
#endif /* end of HWIMG_SUPPORT */

25
drivers/staging/rtl8723au/include/HalHWImg8723A_RF.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __INC_RF_8723A_HW_IMG_H
#define __INC_RF_8723A_HW_IMG_H
/******************************************************************************
* RadioA_1T.TXT
******************************************************************************/
void ODM_ReadAndConfig_RadioA_1T_8723A(struct dm_odm_t *pDM_Odm);
#endif /* end of HWIMG_SUPPORT */

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drivers/staging/rtl8723au/include/HalPwrSeqCmd.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*
******************************************************************************/
#ifndef __HALPWRSEQCMD_H__
#define __HALPWRSEQCMD_H__
#include <drv_types.h>
/*---------------------------------------------*/
/*---------------------------------------------*/
#define PWR_CMD_READ 0x00
/* offset: the read register offset */
/* msk: the mask of the read value */
/* value: N/A, left by 0 */
/* note: dirver shall implement this function by read & msk */
#define PWR_CMD_WRITE 0x01
/* offset: the read register offset */
/* msk: the mask of the write bits */
/* value: write value */
/* note: driver shall implement this cmd by read & msk after write */
#define PWR_CMD_POLLING 0x02
/* offset: the read register offset */
/* msk: the mask of the polled value */
/* value: the value to be polled, masked by the msd field. */
/* note: driver shall implement this cmd by */
/* do{ */
/* if( (Read(offset) & msk) == (value & msk) ) */
/* break; */
/* } while(not timeout); */
#define PWR_CMD_DELAY 0x03
/* offset: the value to delay */
/* msk: N/A */
/* value: the unit of delay, 0: us, 1: ms */
#define PWR_CMD_END 0x04
/* offset: N/A */
/* msk: N/A */
/* value: N/A */
/*---------------------------------------------*/
/* 3 The value of base: 4 bits */
/*---------------------------------------------*/
/* define the base address of each block */
#define PWR_BASEADDR_MAC 0x00
#define PWR_BASEADDR_USB 0x01
#define PWR_BASEADDR_PCIE 0x02
#define PWR_BASEADDR_SDIO 0x03
/*---------------------------------------------*/
/* 3 The value of interface_msk: 4 bits */
/*---------------------------------------------*/
#define PWR_INTF_SDIO_MSK BIT(0)
#define PWR_INTF_USB_MSK BIT(1)
#define PWR_INTF_PCI_MSK BIT(2)
#define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
/*---------------------------------------------*/
/* 3 The value of fab_msk: 4 bits */
/*---------------------------------------------*/
#define PWR_FAB_TSMC_MSK BIT(0)
#define PWR_FAB_UMC_MSK BIT(1)
#define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
/*---------------------------------------------*/
/* 3 The value of cut_msk: 8 bits */
/*---------------------------------------------*/
#define PWR_CUT_TESTCHIP_MSK BIT(0)
#define PWR_CUT_A_MSK BIT(1)
#define PWR_CUT_B_MSK BIT(2)
#define PWR_CUT_C_MSK BIT(3)
#define PWR_CUT_D_MSK BIT(4)
#define PWR_CUT_E_MSK BIT(5)
#define PWR_CUT_F_MSK BIT(6)
#define PWR_CUT_G_MSK BIT(7)
#define PWR_CUT_ALL_MSK 0xFF
enum pwrseq_delay_unit {
PWRSEQ_DELAY_US,
PWRSEQ_DELAY_MS,
};
struct wlan_pwr_cfg {
u16 offset;
u8 cut_msk;
u8 fab_msk:4;
u8 interface_msk:4;
u8 base:4;
u8 cmd:4;
u8 msk;
u8 value;
};
#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset
#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk
#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) __PWR_CMD.fab_msk
#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) __PWR_CMD.interface_msk
#define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base
#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd
#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value
/* */
/* Prototype of protected function. */
/* */
u8 HalPwrSeqCmdParsing23a(
struct rtw_adapter *padapter,
u8 CutVersion,
u8 FabVersion,
u8 InterfaceType,
struct wlan_pwr_cfg PwrCfgCmd[]);
#endif

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drivers/staging/rtl8723au/include/HalVerDef.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __HAL_VERSION_DEF_H__
#define __HAL_VERSION_DEF_H__
enum hal_ic_type {
CHIP_8192S = 0,
CHIP_8188C = 1,
CHIP_8192C = 2,
CHIP_8192D = 3,
CHIP_8723A = 4,
CHIP_8188E = 5,
CHIP_8881A = 6,
CHIP_8812A = 7,
CHIP_8821A = 8,
CHIP_8723B = 9,
CHIP_8192E = 10,
};
enum hal_chip_type {
TEST_CHIP = 0,
NORMAL_CHIP = 1,
FPGA = 2,
};
enum hal_cut_version {
A_CUT_VERSION = 0,
B_CUT_VERSION = 1,
C_CUT_VERSION = 2,
D_CUT_VERSION = 3,
E_CUT_VERSION = 4,
F_CUT_VERSION = 5,
G_CUT_VERSION = 6,
};
/* HAL_Manufacturer */
enum hal_vendor {
CHIP_VENDOR_TSMC = 0,
CHIP_VENDOR_UMC = 1,
};
enum hal_rf_type {
RF_TYPE_1T1R = 0,
RF_TYPE_1T2R = 1,
RF_TYPE_2T2R = 2,
RF_TYPE_2T3R = 3,
RF_TYPE_2T4R = 4,
RF_TYPE_3T3R = 5,
RF_TYPE_3T4R = 6,
RF_TYPE_4T4R = 7,
};
struct hal_version {
enum hal_ic_type ICType;
enum hal_chip_type ChipType;
enum hal_cut_version CUTVersion;
enum hal_vendor VendorType;
enum hal_rf_type RFType;
u8 ROMVer;
};
/* Get element */
#define GET_CVID_IC_TYPE(version) ((version).ICType)
#define GET_CVID_CHIP_TYPE(version) ((version).ChipType)
#define GET_CVID_RF_TYPE(version) ((version).RFType)
#define GET_CVID_MANUFACTUER(version) ((version).VendorType)
#define GET_CVID_CUT_VERSION(version) ((version).CUTVersion)
#define GET_CVID_ROM_VERSION(version) (((version).ROMVer) & ROM_VERSION_MASK)
/* Common Macro. -- */
#define IS_81XXC(version) \
(((GET_CVID_IC_TYPE(version) == CHIP_8192C) || \
(GET_CVID_IC_TYPE(version) == CHIP_8188C)) ? true : false)
#define IS_8723_SERIES(version) \
((GET_CVID_IC_TYPE(version) == CHIP_8723A) ? true : false)
#define IS_TEST_CHIP(version) \
((GET_CVID_CHIP_TYPE(version) == TEST_CHIP) ? true : false)
#define IS_NORMAL_CHIP(version) \
((GET_CVID_CHIP_TYPE(version) == NORMAL_CHIP) ? true : false)
#define IS_A_CUT(version) \
((GET_CVID_CUT_VERSION(version) == A_CUT_VERSION) ? true : false)
#define IS_B_CUT(version) \
((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? true : false)
#define IS_C_CUT(version) \
((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? true : false)
#define IS_D_CUT(version) \
((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? true : false)
#define IS_E_CUT(version) \
((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? true : false)
#define IS_CHIP_VENDOR_TSMC(version) \
((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_TSMC) ? true : false)
#define IS_CHIP_VENDOR_UMC(version) \
((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_UMC) ? true : false)
#define IS_1T1R(version) \
((GET_CVID_RF_TYPE(version) == RF_TYPE_1T1R) ? true : false)
#define IS_1T2R(version) \
((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R) ? true : false)
#define IS_2T2R(version) \
((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R) ? true : false)
/* Chip version Macro. -- */
#define IS_92C_SERIAL(version) \
((IS_81XXC(version) && IS_2T2R(version)) ? true : false)
#define IS_81xxC_VENDOR_UMC_A_CUT(version) \
(IS_81XXC(version)?(IS_CHIP_VENDOR_UMC(version) ? \
(IS_A_CUT(version) ? true : false) : false) : false)
#define IS_81xxC_VENDOR_UMC_B_CUT(version) \
(IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ? \
(IS_B_CUT(version) ? true : false) : false): false)
#define IS_81xxC_VENDOR_UMC_C_CUT(version) \
(IS_81XXC(version)?(IS_CHIP_VENDOR_UMC(version) ? \
(IS_C_CUT(version) ? true : false) : false) : false)
#define IS_8723A_A_CUT(version) \
((IS_8723_SERIES(version)) ? (IS_A_CUT(version) ? true : false) : false)
#define IS_8723A_B_CUT(version) \
((IS_8723_SERIES(version)) ? (IS_B_CUT(version) ? true : false) : false)
#endif

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drivers/staging/rtl8723au/include/cmd_osdep.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __CMD_OSDEP_H_
#define __CMD_OSDEP_H_
#include <osdep_service.h>
#include <drv_types.h>
int _rtw_init_evt_priv23a(struct evt_priv *pevtpriv);
void _rtw_free_evt_priv23a(struct evt_priv *pevtpriv);
void _rtw_free_cmd_priv23a(struct cmd_priv *pcmdpriv);
int _rtw_enqueue_cmd23a(struct rtw_queue *queue, struct cmd_obj *obj);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
/*-----------------------------------------------------------------------------
For type defines and data structure defines
------------------------------------------------------------------------------*/
#ifndef __DRV_TYPES_H__
#define __DRV_TYPES_H__
#include <osdep_service.h>
#include <wlan_bssdef.h>
enum _NIC_VERSION {
RTL8711_NIC,
RTL8712_NIC,
RTL8713_NIC,
RTL8716_NIC
};
#include <rtw_ht.h>
#include <rtw_cmd.h>
#include <wlan_bssdef.h>
#include <rtw_xmit.h>
#include <rtw_recv.h>
#include <hal_intf.h>
#include <hal_com.h>
#include <rtw_qos.h>
#include <rtw_security.h>
#include <rtw_pwrctrl.h>
#include <rtw_io.h>
#include <rtw_eeprom.h>
#include <sta_info.h>
#include <rtw_mlme.h>
#include <rtw_debug.h>
#include <rtw_rf.h>
#include <rtw_event.h>
#include <rtw_led.h>
#include <rtw_mlme_ext.h>
#include <rtw_p2p.h>
#include <rtw_ap.h>
#include "ioctl_cfg80211.h"
#define SPEC_DEV_ID_NONE BIT(0)
#define SPEC_DEV_ID_DISABLE_HT BIT(1)
#define SPEC_DEV_ID_ENABLE_PS BIT(2)
#define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3)
#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4)
#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5)
struct specific_device_id {
u32 flags;
u16 idVendor;
u16 idProduct;
};
struct registry_priv {
u8 chip_version;
u8 rfintfs;
struct cfg80211_ssid ssid;
u8 channel;/* ad-hoc support requirement */
u8 wireless_mode;/* A, B, G, auto */
u8 scan_mode;/* active, passive */
u8 preamble;/* long, short, auto */
u8 vrtl_carrier_sense;/* Enable, Disable, Auto */
u8 vcs_type;/* RTS/CTS, CTS-to-self */
u16 rts_thresh;
u16 frag_thresh;
u8 adhoc_tx_pwr;
u8 soft_ap;
u8 power_mgnt;
u8 ips_mode;
u8 smart_ps;
u8 long_retry_lmt;
u8 short_retry_lmt;
u16 busy_thresh;
u8 ack_policy;
u8 software_encrypt;
u8 software_decrypt;
u8 acm_method;
/* UAPSD */
u8 wmm_enable;
u8 uapsd_enable;
struct wlan_bssid_ex dev_network;
u8 ht_enable;
u8 cbw40_enable;
u8 ampdu_enable;/* for tx */
u8 rx_stbc;
u8 ampdu_amsdu;/* A-MPDU Supports A-MSDU is permitted */
u8 lowrate_two_xmit;
u8 rf_config;
u8 low_power;
u8 wifi_spec;/* !turbo_mode */
u8 channel_plan;
#ifdef CONFIG_8723AU_BT_COEXIST
u8 btcoex;
u8 bt_iso;
u8 bt_sco;
u8 bt_ampdu;
#endif
bool bAcceptAddbaReq;
u8 antdiv_cfg;
u8 antdiv_type;
u8 usbss_enable;/* 0:disable,1:enable */
u8 hwpdn_mode;/* 0:disable,1:enable,2:decide by EFUSE config */
u8 hwpwrp_detect;/* 0:disable,1:enable */
u8 hw_wps_pbc;/* 0:disable,1:enable */
u8 max_roaming_times; /* max number driver will try to roaming */
u8 enable80211d;
u8 ifname[16];
u8 if2name[16];
u8 notch_filter;
u8 regulatory_tid;
};
#define MAX_CONTINUAL_URB_ERR 4
#define GET_PRIMARY_ADAPTER(padapter) \
(((struct rtw_adapter *)padapter)->dvobj->if1)
enum _IFACE_ID {
IFACE_ID0, /* maping to PRIMARY_ADAPTER */
IFACE_ID1, /* maping to SECONDARY_ADAPTER */
IFACE_ID2,
IFACE_ID3,
IFACE_ID_MAX,
};
struct dvobj_priv {
struct rtw_adapter *if1; /* PRIMARY_ADAPTER */
struct rtw_adapter *if2; /* SECONDARY_ADAPTER */
/* for local/global synchronization */
struct mutex hw_init_mutex;
struct mutex h2c_fwcmd_mutex;
struct mutex setch_mutex;
struct mutex setbw_mutex;
unsigned char oper_channel; /* saved chan info when set chan bw */
unsigned char oper_bwmode;
unsigned char oper_ch_offset;/* PRIME_CHNL_OFFSET */
struct rtw_adapter *padapters[IFACE_ID_MAX];
u8 iface_nums; /* total number of ifaces used runtime */
/* For 92D, DMDP have 2 interface. */
u8 InterfaceNumber;
u8 NumInterfaces;
/* In /Out Pipe information */
int RtInPipe[2];
int RtOutPipe[3];
u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */
u8 irq_alloc;
/*-------- below is for USB INTERFACE --------*/
u8 nr_endpoint;
u8 ishighspeed;
u8 RtNumInPipes;
u8 RtNumOutPipes;
int ep_num[5]; /* endpoint number */
int RegUsbSS;
struct semaphore usb_suspend_sema;
struct mutex usb_vendor_req_mutex;
u8 *usb_alloc_vendor_req_buf;
u8 *usb_vendor_req_buf;
struct usb_interface *pusbintf;
struct usb_device *pusbdev;
atomic_t continual_urb_error;
/*-------- below is for PCIE INTERFACE --------*/
};
static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
{
/* todo: get interface type from dvobj and the return the dev accordingly */
return &dvobj->pusbintf->dev;
}
enum _IFACE_TYPE {
IFACE_PORT0, /* mapping to port0 for C/D series chips */
IFACE_PORT1, /* mapping to port1 for C/D series chip */
MAX_IFACE_PORT,
};
enum _ADAPTER_TYPE {
PRIMARY_ADAPTER,
SECONDARY_ADAPTER,
MAX_ADAPTER,
};
struct rtw_adapter {
int pid[3];/* process id from UI, 0:wps, 1:hostapd, 2:dhcpcd */
int bDongle;/* build-in module or external dongle */
u16 chip_type;
u16 HardwareType;
struct dvobj_priv *dvobj;
struct mlme_priv mlmepriv;
struct mlme_ext_priv mlmeextpriv;
struct cmd_priv cmdpriv;
struct evt_priv evtpriv;
/* struct io_queue *pio_queue; */
struct io_priv iopriv;
struct xmit_priv xmitpriv;
struct recv_priv recvpriv;
struct sta_priv stapriv;
struct security_priv securitypriv;
struct registry_priv registrypriv;
struct pwrctrl_priv pwrctrlpriv;
struct eeprom_priv eeprompriv;
struct led_priv ledpriv;
#ifdef CONFIG_8723AU_AP_MODE
struct hostapd_priv *phostapdpriv;
#endif
#ifdef CONFIG_8723AU_P2P
struct cfg80211_wifidirect_info cfg80211_wdinfo;
#endif /* CONFIG_8723AU_P2P */
u32 setband;
#ifdef CONFIG_8723AU_P2P
struct wifidirect_info wdinfo;
#endif /* CONFIG_8723AU_P2P */
#ifdef CONFIG_8723AU_P2P
struct wifi_display_info wfd_info;
#endif /* CONFIG_8723AU_P2P */
void *HalData;
u32 hal_data_sz;
struct hal_ops HalFunc;
s32 bDriverStopped;
s32 bSurpriseRemoved;
s32 bCardDisableWOHSM;
u32 IsrContent;
u32 ImrContent;
u8 EepromAddressSize;
u8 hw_init_completed;
u8 bDriverIsGoingToUnload;
u8 init_adpt_in_progress;
u8 bHaltInProgress;
void *cmdThread;
void *evtThread;
void *xmitThread;
void *recvThread;
void (*intf_start)(struct rtw_adapter *adapter);
void (*intf_stop)(struct rtw_adapter *adapter);
struct net_device *pnetdev;
/* used by rtw_rereg_nd_name related function */
struct rereg_nd_name_data {
struct net_device *old_pnetdev;
char old_ifname[IFNAMSIZ];
u8 old_ips_mode;
u8 old_bRegUseLed;
} rereg_nd_name_priv;
int bup;
struct net_device_stats stats;
struct iw_statistics iwstats;
struct proc_dir_entry *dir_dev;/* for proc directory */
struct wireless_dev *rtw_wdev;
int net_closed;
u8 bFWReady;
u8 bBTFWReady;
u8 bReadPortCancel;
u8 bWritePortCancel;
u8 bRxRSSIDisplay;
/* The driver will show the desired chan nor when this flag is 1. */
u8 bNotifyChannelChange;
#ifdef CONFIG_8723AU_P2P
/* driver will show current P2P status when the application reads it*/
u8 bShowGetP2PState;
#endif
struct rtw_adapter *pbuddy_adapter;
/* extend to support multi interface */
/* IFACE_ID0 is equals to PRIMARY_ADAPTER */
/* IFACE_ID1 is equals to SECONDARY_ADAPTER */
u8 iface_id;
#ifdef CONFIG_BR_EXT
_lock br_ext_lock;
/* unsigned int macclone_completed; */
struct nat25_network_db_entry *nethash[NAT25_HASH_SIZE];
int pppoe_connection_in_progress;
unsigned char pppoe_addr[MACADDRLEN];
unsigned char scdb_mac[MACADDRLEN];
unsigned char scdb_ip[4];
struct nat25_network_db_entry *scdb_entry;
unsigned char br_mac[MACADDRLEN];
unsigned char br_ip[4];
struct br_ext_info ethBrExtInfo;
#endif /* CONFIG_BR_EXT */
u8 fix_rate;
unsigned char in_cta_test;
};
#define adapter_to_dvobj(adapter) (adapter->dvobj)
int rtw_handle_dualmac23a(struct rtw_adapter *adapter, bool init);
static inline u8 *myid(struct eeprom_priv *peepriv)
{
return peepriv->mac_addr;
}
#endif /* __DRV_TYPES_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*
******************************************************************************/
/*! \file */
#ifndef __INC_ETHERNET_H
#define __INC_ETHERNET_H
#define LLC_HEADER_SIZE 6 /* LLC Header Length */
#endif /* #ifndef __INC_ETHERNET_H */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __HAL_COMMON_H__
#define __HAL_COMMON_H__
/* */
/* Rate Definition */
/* */
/* CCK */
#define RATR_1M 0x00000001
#define RATR_2M 0x00000002
#define RATR_55M 0x00000004
#define RATR_11M 0x00000008
/* OFDM */
#define RATR_6M 0x00000010
#define RATR_9M 0x00000020
#define RATR_12M 0x00000040
#define RATR_18M 0x00000080
#define RATR_24M 0x00000100
#define RATR_36M 0x00000200
#define RATR_48M 0x00000400
#define RATR_54M 0x00000800
/* MCS 1 Spatial Stream */
#define RATR_MCS0 0x00001000
#define RATR_MCS1 0x00002000
#define RATR_MCS2 0x00004000
#define RATR_MCS3 0x00008000
#define RATR_MCS4 0x00010000
#define RATR_MCS5 0x00020000
#define RATR_MCS6 0x00040000
#define RATR_MCS7 0x00080000
/* MCS 2 Spatial Stream */
#define RATR_MCS8 0x00100000
#define RATR_MCS9 0x00200000
#define RATR_MCS10 0x00400000
#define RATR_MCS11 0x00800000
#define RATR_MCS12 0x01000000
#define RATR_MCS13 0x02000000
#define RATR_MCS14 0x04000000
#define RATR_MCS15 0x08000000
/* CCK */
#define RATE_1M BIT(0)
#define RATE_2M BIT(1)
#define RATE_5_5M BIT(2)
#define RATE_11M BIT(3)
/* OFDM */
#define RATE_6M BIT(4)
#define RATE_9M BIT(5)
#define RATE_12M BIT(6)
#define RATE_18M BIT(7)
#define RATE_24M BIT(8)
#define RATE_36M BIT(9)
#define RATE_48M BIT(10)
#define RATE_54M BIT(11)
/* MCS 1 Spatial Stream */
#define RATE_MCS0 BIT(12)
#define RATE_MCS1 BIT(13)
#define RATE_MCS2 BIT(14)
#define RATE_MCS3 BIT(15)
#define RATE_MCS4 BIT(16)
#define RATE_MCS5 BIT(17)
#define RATE_MCS6 BIT(18)
#define RATE_MCS7 BIT(19)
/* MCS 2 Spatial Stream */
#define RATE_MCS8 BIT(20)
#define RATE_MCS9 BIT(21)
#define RATE_MCS10 BIT(22)
#define RATE_MCS11 BIT(23)
#define RATE_MCS12 BIT(24)
#define RATE_MCS13 BIT(25)
#define RATE_MCS14 BIT(26)
#define RATE_MCS15 BIT(27)
/* ALL CCK Rate */
#define RATE_ALL_CCK (RATR_1M | RATR_2M | RATR_55M | RATR_11M)
#define RATE_ALL_OFDM_AG \
(RATR_6M | RATR_9M | RATR_12M | RATR_18M | RATR_24M| \
RATR_36M|RATR_48M|RATR_54M)
#define RATE_ALL_OFDM_1SS \
(RATR_MCS0 | RATR_MCS1 | RATR_MCS2 | RATR_MCS3 | \
RATR_MCS4 | RATR_MCS5 | RATR_MCS6 | RATR_MCS7)
#define RATE_ALL_OFDM_2SS \
(RATR_MCS8 | RATR_MCS9 | RATR_MCS10 | RATR_MCS11| \
RATR_MCS12 | RATR_MCS13 | RATR_MCS14 | RATR_MCS15)
/*------------------------------ Tx Desc definition Macro ------------------------*/
/* pragma mark -- Tx Desc related definition. -- */
/* */
/* */
/* Rate */
/* */
/* CCK Rates, TxHT = 0 */
#define DESC_RATE1M 0x00
#define DESC_RATE2M 0x01
#define DESC_RATE5_5M 0x02
#define DESC_RATE11M 0x03
/* OFDM Rates, TxHT = 0 */
#define DESC_RATE6M 0x04
#define DESC_RATE9M 0x05
#define DESC_RATE12M 0x06
#define DESC_RATE18M 0x07
#define DESC_RATE24M 0x08
#define DESC_RATE36M 0x09
#define DESC_RATE48M 0x0a
#define DESC_RATE54M 0x0b
/* MCS Rates, TxHT = 1 */
#define DESC_RATEMCS0 0x0c
#define DESC_RATEMCS1 0x0d
#define DESC_RATEMCS2 0x0e
#define DESC_RATEMCS3 0x0f
#define DESC_RATEMCS4 0x10
#define DESC_RATEMCS5 0x11
#define DESC_RATEMCS6 0x12
#define DESC_RATEMCS7 0x13
#define DESC_RATEMCS8 0x14
#define DESC_RATEMCS9 0x15
#define DESC_RATEMCS10 0x16
#define DESC_RATEMCS11 0x17
#define DESC_RATEMCS12 0x18
#define DESC_RATEMCS13 0x19
#define DESC_RATEMCS14 0x1a
#define DESC_RATEMCS15 0x1b
#define DESC_RATEMCS15_SG 0x1c
#define DESC_RATEMCS32 0x20
#define REG_P2P_CTWIN 0x0572 /* 1 Byte long (in unit of TU) */
#define REG_NOA_DESC_SEL 0x05CF
#define REG_NOA_DESC_DURATION 0x05E0
#define REG_NOA_DESC_INTERVAL 0x05E4
#define REG_NOA_DESC_START 0x05E8
#define REG_NOA_DESC_COUNT 0x05EC
#include "HalVerDef.h"
void dump_chip_info23a(struct hal_version ChipVersion);
u8 /* return the final channel plan decision */
hal_com_get_channel_plan23a(
struct rtw_adapter *padapter,
u8 hw_channel_plan, /* channel plan from HW (efuse/eeprom) */
u8 sw_channel_plan, /* channel plan from SW (registry/module param) */
u8 def_channel_plan, /* channel plan used when the former two is invalid */
bool AutoLoadFail
);
u8 MRateToHwRate23a(u8 rate);
void HalSetBrateCfg23a(struct rtw_adapter *padapter, u8 *mBratesOS);
bool
Hal_MappingOutPipe23a(struct rtw_adapter *pAdapter, u8 NumOutPipe);
void hal_init_macaddr23a(struct rtw_adapter *adapter);
void c2h_evt_clear23a(struct rtw_adapter *adapter);
s32 c2h_evt_read23a(struct rtw_adapter *adapter, u8 *buf);
void rtl8723a_set_ampdu_min_space(struct rtw_adapter *padapter, u8 MinSpacingToSet);
void rtl8723a_set_ampdu_factor(struct rtw_adapter *padapter, u8 FactorToSet);
void rtl8723a_set_acm_ctrl(struct rtw_adapter *padapter, u8 ctrl);
void rtl8723a_set_media_status(struct rtw_adapter *padapter, u8 status);
void rtl8723a_set_media_status1(struct rtw_adapter *padapter, u8 status);
void rtl8723a_set_bcn_func(struct rtw_adapter *padapter, u8 val);
void rtl8723a_check_bssid(struct rtw_adapter *padapter, u8 val);
void rtl8723a_mlme_sitesurvey(struct rtw_adapter *padapter, u8 flag);
void rtl8723a_on_rcr_am(struct rtw_adapter *padapter);
void rtl8723a_off_rcr_am(struct rtw_adapter *padapter);
void rtl8723a_set_slot_time(struct rtw_adapter *padapter, u8 slottime);
void rtl8723a_ack_preamble(struct rtw_adapter *padapter, u8 bShortPreamble);
void rtl8723a_set_sec_cfg(struct rtw_adapter *padapter, u8 sec);
void rtl8723a_cam_empty_entry(struct rtw_adapter *padapter, u8 ucIndex);
void rtl8723a_cam_invalid_all(struct rtw_adapter *padapter);
void rtl8723a_cam_write(struct rtw_adapter *padapter, u32 val1, u32 val2);
void rtl8723a_fifo_cleanup(struct rtw_adapter *padapter);
void rtl8723a_set_apfm_on_mac(struct rtw_adapter *padapter, u8 val);
void rtl8723a_bcn_valid(struct rtw_adapter *padapter);
void rtl8723a_set_tx_pause(struct rtw_adapter *padapter, u8 pause);
void rtl8723a_set_beacon_interval(struct rtw_adapter *padapter, u16 interval);
void rtl8723a_set_resp_sifs(struct rtw_adapter *padapter,
u8 r2t1, u8 r2t2, u8 t2t1, u8 t2t2);
void rtl8723a_set_ac_param_vo(struct rtw_adapter *padapter, u32 vo);
void rtl8723a_set_ac_param_vi(struct rtw_adapter *padapter, u32 vi);
void rtl8723a_set_ac_param_be(struct rtw_adapter *padapter, u32 be);
void rtl8723a_set_ac_param_bk(struct rtw_adapter *padapter, u32 bk);
void rtl8723a_set_rxdma_agg_pg_th(struct rtw_adapter *padapter, u8 val);
void rtl8723a_set_nav_upper(struct rtw_adapter *padapter, u32 usNavUpper);
void rtl8723a_set_initial_gain(struct rtw_adapter *padapter, u32 rx_gain);
void rtl8723a_odm_support_ability_write(struct rtw_adapter *padapter, u32 val);
void rtl8723a_odm_support_ability_backup(struct rtw_adapter *padapter, u8 val);
void rtl8723a_odm_support_ability_set(struct rtw_adapter *padapter, u32 val);
void rtl8723a_odm_support_ability_clr(struct rtw_adapter *padapter, u32 val);
void rtl8723a_set_rpwm(struct rtw_adapter *padapter, u8 val);
#endif /* __HAL_COMMON_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __HAL_INTF_H__
#define __HAL_INTF_H__
#include <osdep_service.h>
#include <drv_types.h>
enum RTL871X_HCI_TYPE {
RTW_PCIE = BIT0,
RTW_USB = BIT1,
RTW_SDIO = BIT2,
RTW_GSPI = BIT3,
};
enum _CHIP_TYPE {
NULL_CHIP_TYPE,
RTL8712_8188S_8191S_8192S,
RTL8188C_8192C,
RTL8192D,
RTL8723A,
RTL8188E,
MAX_CHIP_TYPE
};
enum HW_VARIABLES {
HW_VAR_MEDIA_STATUS,
HW_VAR_MEDIA_STATUS1,
HW_VAR_SET_OPMODE,
HW_VAR_MAC_ADDR,
HW_VAR_BSSID,
HW_VAR_INIT_RTS_RATE,
HW_VAR_BASIC_RATE,
HW_VAR_TXPAUSE,
HW_VAR_BCN_FUNC,
HW_VAR_CORRECT_TSF,
HW_VAR_CHECK_BSSID,
HW_VAR_MLME_DISCONNECT,
HW_VAR_MLME_SITESURVEY,
HW_VAR_MLME_JOIN,
HW_VAR_ON_RCR_AM,
HW_VAR_OFF_RCR_AM,
HW_VAR_BEACON_INTERVAL,
HW_VAR_SLOT_TIME,
HW_VAR_RESP_SIFS,
HW_VAR_ACK_PREAMBLE,
HW_VAR_SEC_CFG,
HW_VAR_BCN_VALID,
HW_VAR_RF_TYPE,
HW_VAR_DM_FLAG,
HW_VAR_DM_FUNC_OP,
HW_VAR_DM_FUNC_SET,
HW_VAR_DM_FUNC_CLR,
HW_VAR_CAM_EMPTY_ENTRY,
HW_VAR_CAM_INVALID_ALL,
HW_VAR_CAM_WRITE,
HW_VAR_CAM_READ,
HW_VAR_AC_PARAM_VO,
HW_VAR_AC_PARAM_VI,
HW_VAR_AC_PARAM_BE,
HW_VAR_AC_PARAM_BK,
HW_VAR_ACM_CTRL,
HW_VAR_AMPDU_MIN_SPACE,
HW_VAR_AMPDU_FACTOR,
HW_VAR_RXDMA_AGG_PG_TH,
HW_VAR_SET_RPWM,
HW_VAR_H2C_FW_PWRMODE,
HW_VAR_H2C_FW_JOINBSSRPT,
HW_VAR_FWLPS_RF_ON,
HW_VAR_H2C_FW_P2P_PS_OFFLOAD,
HW_VAR_TDLS_WRCR,
HW_VAR_TDLS_INIT_CH_SEN,
HW_VAR_TDLS_RS_RCR,
HW_VAR_TDLS_DONE_CH_SEN,
HW_VAR_INITIAL_GAIN,
HW_VAR_TRIGGER_GPIO_0,
HW_VAR_BT_SET_COEXIST,
HW_VAR_BT_ISSUE_DELBA,
HW_VAR_CURRENT_ANTENNA,
HW_VAR_ANTENNA_DIVERSITY_LINK,
HW_VAR_ANTENNA_DIVERSITY_SELECT,
HW_VAR_SWITCH_EPHY_WoWLAN,
HW_VAR_EFUSE_BYTES,
HW_VAR_EFUSE_BT_BYTES,
HW_VAR_FIFO_CLEARN_UP,
HW_VAR_CHECK_TXBUF,
HW_VAR_APFM_ON_MAC, /* Auto FSM to Turn On, include clock, isolation, power control for MAC only */
/* The valid upper nav range for the HW updating, if the true value is larger than the upper range, the HW won't update it. */
/* Unit in microsecond. 0 means disable this function. */
HW_VAR_NAV_UPPER,
HW_VAR_RPT_TIMER_SETTING,
HW_VAR_TX_RPT_MAX_MACID,
HW_VAR_H2C_MEDIA_STATUS_RPT,
HW_VAR_CHK_HI_QUEUE_EMPTY,
HW_VAR_READ_LLT_TAB,
};
enum hal_def_variable {
HAL_DEF_UNDERCORATEDSMOOTHEDPWDB,
HAL_DEF_IS_SUPPORT_ANT_DIV,
HAL_DEF_CURRENT_ANTENNA,
HAL_DEF_DRVINFO_SZ,
HAL_DEF_MAX_RECVBUF_SZ,
HAL_DEF_RX_PACKET_OFFSET,
HAL_DEF_DBG_DUMP_RXPKT,/* for dbg */
HAL_DEF_DBG_DM_FUNC,/* for dbg */
HAL_DEF_RA_DECISION_RATE,
HAL_DEF_RA_SGI,
HAL_DEF_PT_PWR_STATUS,
HW_VAR_MAX_RX_AMPDU_FACTOR,
HW_DEF_RA_INFO_DUMP,
HAL_DEF_DBG_DUMP_TXPKT,
HW_DEF_FA_CNT_DUMP,
HW_DEF_ODM_DBG_FLAG,
};
enum hal_odm_variable {
HAL_ODM_STA_INFO,
HAL_ODM_P2P_STATE,
HAL_ODM_WIFI_DISPLAY_STATE,
};
enum hal_intf_ps_func {
HAL_USB_SELECT_SUSPEND,
HAL_MAX_ID,
};
struct hal_ops {
u32 (*hal_power_on)(struct rtw_adapter *padapter);
u32 (*hal_init)(struct rtw_adapter *padapter);
u32 (*hal_deinit)(struct rtw_adapter *padapter);
void (*free_hal_data)(struct rtw_adapter *padapter);
u32 (*inirp_init)(struct rtw_adapter *padapter);
u32 (*inirp_deinit)(struct rtw_adapter *padapter);
s32 (*init_xmit_priv)(struct rtw_adapter *padapter);
void (*free_xmit_priv)(struct rtw_adapter *padapter);
s32 (*init_recv_priv)(struct rtw_adapter *padapter);
void (*free_recv_priv)(struct rtw_adapter *padapter);
void (*InitSwLeds)(struct rtw_adapter *padapter);
void (*DeInitSwLeds)(struct rtw_adapter *padapter);
void (*dm_init)(struct rtw_adapter *padapter);
void (*dm_deinit)(struct rtw_adapter *padapter);
void (*read_chip_version)(struct rtw_adapter *padapter);
void (*init_default_value)(struct rtw_adapter *padapter);
void (*intf_chip_configure)(struct rtw_adapter *padapter);
void (*read_adapter_info)(struct rtw_adapter *padapter);
void (*enable_interrupt)(struct rtw_adapter *padapter);
void (*disable_interrupt)(struct rtw_adapter *padapter);
s32 (*interrupt_handler)(struct rtw_adapter *padapter);
void (*set_bwmode_handler)(struct rtw_adapter *padapter,
enum ht_channel_width Bandwidth, u8 Offset);
void (*set_channel_handler)(struct rtw_adapter *padapter, u8 channel);
void (*hal_dm_watchdog)(struct rtw_adapter *padapter);
void (*SetHwRegHandler)(struct rtw_adapter *padapter,
u8 variable, u8 *val);
void (*GetHwRegHandler)(struct rtw_adapter *padapter,
u8 variable, u8 *val);
u8 (*GetHalDefVarHandler)(struct rtw_adapter *padapter,
enum hal_def_variable eVariable,
void *pValue);
u8 (*SetHalDefVarHandler)(struct rtw_adapter *padapter,
enum hal_def_variable eVariable,
void *pValue);
void (*GetHalODMVarHandler)(struct rtw_adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void (*SetHalODMVarHandler)(struct rtw_adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void (*UpdateRAMaskHandler)(struct rtw_adapter *padapter,
u32 mac_id, u8 rssi_level);
void (*SetBeaconRelatedRegistersHandler)(struct rtw_adapter *padapter);
void (*Add_RateATid)(struct rtw_adapter *padapter, u32 bitmap,
u8 arg, u8 rssi_level);
void (*run_thread)(struct rtw_adapter *padapter);
void (*cancel_thread)(struct rtw_adapter *padapter);
u8 (*interface_ps_func)(struct rtw_adapter *padapter,
enum hal_intf_ps_func efunc_id, u8 *val);
s32 (*hal_xmit)(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe);
s32 (*mgnt_xmit)(struct rtw_adapter *padapter,
struct xmit_frame *pmgntframe);
s32 (*hal_xmitframe_enqueue)(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe);
u32 (*read_bbreg)(struct rtw_adapter *padapter, u32 RegAddr,
u32 BitMask);
void (*write_bbreg)(struct rtw_adapter *padapter, u32 RegAddr,
u32 BitMask, u32 Data);
u32 (*read_rfreg)(struct rtw_adapter *padapter, u32 eRFPath,
u32 RegAddr, u32 BitMask);
void (*write_rfreg)(struct rtw_adapter *padapter, u32 eRFPath,
u32 RegAddr, u32 BitMask, u32 Data);
void (*EfusePowerSwitch)(struct rtw_adapter *padapter, u8 bWrite,
u8 PwrState);
void (*ReadEFuse)(struct rtw_adapter *padapter, u8 efuseType,
u16 _offset, u16 _size_byte, u8 *pbuf);
void (*EFUSEGetEfuseDefinition)(struct rtw_adapter *padapter,
u8 efuseType, u8 type, void *pOut);
u16 (*EfuseGetCurrentSize)(struct rtw_adapter *padapter, u8 efuseType);
int (*Efuse_PgPacketRead23a)(struct rtw_adapter *padapter,
u8 offset, u8 *data);
int (*Efuse_PgPacketWrite23a)(struct rtw_adapter *padapter,
u8 offset, u8 word_en, u8 *data);
u8 (*Efuse_WordEnableDataWrite23a)(struct rtw_adapter *padapter,
u16 efuse_addr, u8 word_en,
u8 *data);
bool (*Efuse_PgPacketWrite23a_BT)(struct rtw_adapter *padapter,
u8 offset, u8 word_en, u8 *data);
void (*sreset_init_value23a)(struct rtw_adapter *padapter);
void (*sreset_reset_value23a)(struct rtw_adapter *padapter);
void (*silentreset)(struct rtw_adapter *padapter);
void (*sreset_xmit_status_check)(struct rtw_adapter *padapter);
void (*sreset_linked_status_check) (struct rtw_adapter *padapter);
u8 (*sreset_get_wifi_status23a)(struct rtw_adapter *padapter);
bool (*sreset_inprogress)(struct rtw_adapter *padapter);
void (*hal_notch_filter)(struct rtw_adapter *adapter, bool enable);
void (*hal_reset_security_engine)(struct rtw_adapter *adapter);
s32 (*c2h_handler)(struct rtw_adapter *padapter, struct c2h_evt_hdr *c2h_evt);
c2h_id_filter c2h_id_filter_ccx;
};
enum rt_eeprom_type {
EEPROM_93C46,
EEPROM_93C56,
EEPROM_BOOT_EFUSE,
};
#define RF_CHANGE_BY_INIT 0
#define RF_CHANGE_BY_IPS BIT28
#define RF_CHANGE_BY_PS BIT29
#define RF_CHANGE_BY_HW BIT30
#define RF_CHANGE_BY_SW BIT31
enum hardware_type {
HARDWARE_TYPE_RTL8180,
HARDWARE_TYPE_RTL8185,
HARDWARE_TYPE_RTL8187,
HARDWARE_TYPE_RTL8188,
HARDWARE_TYPE_RTL8190P,
HARDWARE_TYPE_RTL8192E,
HARDWARE_TYPE_RTL819xU,
HARDWARE_TYPE_RTL8192SE,
HARDWARE_TYPE_RTL8192SU,
HARDWARE_TYPE_RTL8192CE,
HARDWARE_TYPE_RTL8192CU,
HARDWARE_TYPE_RTL8192DE,
HARDWARE_TYPE_RTL8192DU,
HARDWARE_TYPE_RTL8723AE,
HARDWARE_TYPE_RTL8723AU,
HARDWARE_TYPE_RTL8723AS,
HARDWARE_TYPE_RTL8188EE,
HARDWARE_TYPE_RTL8188EU,
HARDWARE_TYPE_RTL8188ES,
HARDWARE_TYPE_MAX,
};
#define GET_EEPROM_EFUSE_PRIV(adapter) (&adapter->eeprompriv)
#define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse)
extern int rtw_ht_enable23A;
extern int rtw_cbw40_enable23A;
extern int rtw_ampdu_enable23A;/* for enable tx_ampdu */
void rtw_hal_def_value_init23a(struct rtw_adapter *padapter);
int pm_netdev_open23a(struct net_device *pnetdev, u8 bnormal);
int rtw_resume_process23a(struct rtw_adapter *padapter);
void rtw_hal_free_data23a(struct rtw_adapter *padapter);
void rtw_hal_dm_init23a(struct rtw_adapter *padapter);
void rtw_hal_dm_deinit23a(struct rtw_adapter *padapter);
void rtw_hal_sw_led_init23a(struct rtw_adapter *padapter);
void rtw_hal_sw_led_deinit23a(struct rtw_adapter *padapter);
u32 rtw_hal_power_on23a(struct rtw_adapter *padapter);
uint rtw_hal_init23a(struct rtw_adapter *padapter);
uint rtw_hal_deinit23a(struct rtw_adapter *padapter);
void rtw_hal_stop(struct rtw_adapter *padapter);
void rtw_hal_set_hwreg23a(struct rtw_adapter *padapter, u8 variable, u8 *val);
void rtw23a_hal_get_hwreg(struct rtw_adapter *padapter, u8 variable, u8 *val);
void rtw_hal_chip_configure23a(struct rtw_adapter *padapter);
void rtw_hal_read_chip_info23a(struct rtw_adapter *padapter);
void rtw_hal_read_chip_version23a(struct rtw_adapter *padapter);
u8 rtw_hal_set_def_var23a(struct rtw_adapter *padapter,
enum hal_def_variable eVariable,
void *pValue);
u8 rtw_hal_get_def_var23a(struct rtw_adapter *padapter,
enum hal_def_variable eVariable,
void *pValue);
void rtw_hal_set_odm_var23a(struct rtw_adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void rtw_hal_get_odm_var23a(struct rtw_adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void rtw_hal_enable_interrupt23a(struct rtw_adapter *padapter);
void rtw_hal_disable_interrupt23a(struct rtw_adapter *padapter);
u32 rtw_hal_inirp_init23a(struct rtw_adapter *padapter);
u32 rtw_hal_inirp_deinit23a(struct rtw_adapter *padapter);
u8 rtw_hal_intf_ps_func23a(struct rtw_adapter *padapter,
enum hal_intf_ps_func efunc_id, u8 *val);
s32 rtw_hal_xmit23aframe_enqueue(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe);
s32 rtw_hal_xmit23a(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe);
s32 rtw_hal_mgnt_xmit23a(struct rtw_adapter *padapter,
struct xmit_frame *pmgntframe);
s32 rtw_hal_init23a_xmit_priv(struct rtw_adapter *padapter);
void rtw_hal_free_xmit_priv23a(struct rtw_adapter *padapter);
s32 rtw_hal_init23a_recv_priv(struct rtw_adapter *padapter);
void rtw_hal_free_recv_priv23a(struct rtw_adapter *padapter);
void rtw_hal_update_ra_mask23a(struct sta_info *psta, u8 rssi_level);
void rtw_hal_add_ra_tid23a(struct rtw_adapter *padapter, u32 bitmap, u8 arg, u8 rssi_level);
void rtw_hal_clone_data(struct rtw_adapter *dst_padapter, struct rtw_adapter *src_padapter);
void rtw_hal_start_thread23a(struct rtw_adapter *padapter);
void rtw_hal_stop_thread23a(struct rtw_adapter *padapter);
void rtw_hal_bcn_related_reg_setting23a(struct rtw_adapter *padapter);
u32 rtw_hal_read_bbreg23a(struct rtw_adapter *padapter, u32 RegAddr, u32 BitMask);
void rtw_hal_write_bbreg23a(struct rtw_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data);
u32 rtw_hal_read_rfreg23a(struct rtw_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask);
void rtw_hal_write_rfreg23a(struct rtw_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
s32 rtw_hal_interrupt_handler23a(struct rtw_adapter *padapter);
void rtw_hal_set_bwmode23a(struct rtw_adapter *padapter,
enum ht_channel_width Bandwidth, u8 Offset);
void rtw_hal_set_chan23a(struct rtw_adapter *padapter, u8 channel);
void rtw_hal_dm_watchdog23a(struct rtw_adapter *padapter);
void rtw_hal_sreset_init23a(struct rtw_adapter *padapter);
void rtw_hal_sreset_reset23a(struct rtw_adapter *padapter);
void rtw_hal_sreset_reset23a_value23a(struct rtw_adapter *padapter);
void rtw_hal_sreset_xmit_status_check23a(struct rtw_adapter *padapter);
void rtw_hal_sreset_linked_status_check23a (struct rtw_adapter *padapter);
u8 rtw_hal_sreset_get_wifi_status23a(struct rtw_adapter *padapter);
bool rtw_hal_sreset_inprogress(struct rtw_adapter *padapter);
void rtw_hal_notch_filter23a(struct rtw_adapter *adapter, bool enable);
void rtw_hal_reset_security_engine23a(struct rtw_adapter *adapter);
s32 rtw_hal_c2h_handler23a(struct rtw_adapter *adapter, struct c2h_evt_hdr *c2h_evt);
c2h_id_filter rtw_hal_c2h_id_filter_ccx23a(struct rtw_adapter *adapter);
#endif /* __HAL_INTF_H__ */

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drivers/staging/rtl8723au/include/ieee80211.h Normal file
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@ -0,0 +1,603 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __IEEE80211_H
#define __IEEE80211_H
#include <osdep_service.h>
#include <drv_types.h>
#include "linux/ieee80211.h"
#include "wifi.h"
#include <linux/wireless.h>
#if (WIRELESS_EXT < 22)
#error "Obsolete pre 2007 wireless extensions are not supported"
#endif
#define MGMT_QUEUE_NUM 5
#ifdef CONFIG_8723AU_AP_MODE
/* STA flags */
#define WLAN_STA_AUTH BIT(0)
#define WLAN_STA_ASSOC BIT(1)
#define WLAN_STA_PS BIT(2)
#define WLAN_STA_TIM BIT(3)
#define WLAN_STA_PERM BIT(4)
#define WLAN_STA_AUTHORIZED BIT(5)
#define WLAN_STA_PENDING_POLL BIT(6) /* pending activity poll not ACKed */
#define WLAN_STA_SHORT_PREAMBLE BIT(7)
#define WLAN_STA_PREAUTH BIT(8)
#define WLAN_STA_WME BIT(9)
#define WLAN_STA_MFP BIT(10)
#define WLAN_STA_HT BIT(11)
#define WLAN_STA_WPS BIT(12)
#define WLAN_STA_MAYBE_WPS BIT(13)
#define WLAN_STA_NONERP BIT(31)
#endif
#define IEEE_CMD_SET_WPA_PARAM 1
#define IEEE_CMD_SET_WPA_IE 2
#define IEEE_CMD_SET_ENCRYPTION 3
#define IEEE_CRYPT_ALG_NAME_LEN 16
#define WPA_CIPHER_NONE BIT(0)
#define WPA_CIPHER_WEP40 BIT(1)
#define WPA_CIPHER_WEP104 BIT(2)
#define WPA_CIPHER_TKIP BIT(3)
#define WPA_CIPHER_CCMP BIT(4)
#define WPA_SELECTOR_LEN 4
extern u8 RTW_WPA_OUI23A_TYPE[] ;
extern u16 RTW_WPA_VERSION23A ;
extern u8 WPA_AUTH_KEY_MGMT_NONE23A[];
extern u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X23A[];
extern u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X23A[];
extern u8 WPA_CIPHER_SUITE_NONE23A[];
extern u8 WPA_CIPHER_SUITE_WEP4023A[];
extern u8 WPA_CIPHER_SUITE_TKIP23A[];
extern u8 WPA_CIPHER_SUITE_WRAP23A[];
extern u8 WPA_CIPHER_SUITE_CCMP23A[];
extern u8 WPA_CIPHER_SUITE_WEP10423A[];
#define RSN_HEADER_LEN 4
#define RSN_SELECTOR_LEN 4
extern u16 RSN_VERSION_BSD23A;
extern u8 RSN_AUTH_KEY_MGMT_UNSPEC_802_1X23A[];
extern u8 RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X23A[];
extern u8 RSN_CIPHER_SUITE_NONE23A[];
extern u8 RSN_CIPHER_SUITE_WEP4023A[];
extern u8 RSN_CIPHER_SUITE_TKIP23A[];
extern u8 RSN_CIPHER_SUITE_WRAP23A[];
extern u8 RSN_CIPHER_SUITE_CCMP23A[];
extern u8 RSN_CIPHER_SUITE_WEP10423A[];
enum ratr_table_mode {
RATR_INX_WIRELESS_NGB = 0, /* BGN 40 Mhz 2SS 1SS */
RATR_INX_WIRELESS_NG = 1, /* GN or N */
RATR_INX_WIRELESS_NB = 2, /* BGN 20 Mhz 2SS 1SS or BN */
RATR_INX_WIRELESS_N = 3,
RATR_INX_WIRELESS_GB = 4,
RATR_INX_WIRELESS_G = 5,
RATR_INX_WIRELESS_B = 6,
RATR_INX_WIRELESS_MC = 7,
RATR_INX_WIRELESS_AC_N = 8,
};
enum NETWORK_TYPE
{
WIRELESS_INVALID = 0,
/* Sub-Element */
WIRELESS_11B = BIT(0), /* tx: cck only , rx: cck only, hw: cck */
WIRELESS_11G = BIT(1), /* tx: ofdm only, rx: ofdm & cck, hw: cck & ofdm */
WIRELESS_11A = BIT(2), /* tx: ofdm only, rx: ofdm only, hw: ofdm only */
WIRELESS_11_24N = BIT(3), /* tx: MCS only, rx: MCS & cck, hw: MCS & cck */
WIRELESS_11_5N = BIT(4), /* tx: MCS only, rx: MCS & ofdm, hw: ofdm only */
/* WIRELESS_AUTO = BIT(5), */
WIRELESS_AC = BIT(6),
/* Combination */
WIRELESS_11BG = (WIRELESS_11B|WIRELESS_11G), /* tx: cck & ofdm, rx: cck & ofdm & MCS, hw: cck & ofdm */
WIRELESS_11G_24N = (WIRELESS_11G|WIRELESS_11_24N), /* tx: ofdm & MCS, rx: ofdm & cck & MCS, hw: cck & ofdm */
WIRELESS_11A_5N = (WIRELESS_11A|WIRELESS_11_5N), /* tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only */
WIRELESS_11BG_24N = (WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N), /* tx: ofdm & cck & MCS, rx: ofdm & cck & MCS, hw: ofdm & cck */
WIRELESS_11AGN = (WIRELESS_11A|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11_5N), /* tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only */
WIRELESS_11ABGN = (WIRELESS_11A|WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11_5N),
};
#define SUPPORTED_24G_NETTYPE_MSK (WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N)
#define SUPPORTED_5G_NETTYPE_MSK (WIRELESS_11A | WIRELESS_11_5N)
#define IsSupported24G(NetType) ((NetType) & SUPPORTED_24G_NETTYPE_MSK ? true : false)
#define IsSupported5G(NetType) ((NetType) & SUPPORTED_5G_NETTYPE_MSK ? true : false)
#define IsEnableHWCCK(NetType) IsSupported24G(NetType)
#define IsEnableHWOFDM(NetType) ((NetType) & (WIRELESS_11G|WIRELESS_11_24N|SUPPORTED_5G_NETTYPE_MSK) ? true : false)
#define IsSupportedRxCCK(NetType) IsEnableHWCCK(NetType)
#define IsSupportedRxOFDM(NetType) IsEnableHWOFDM(NetType)
#define IsSupportedRxMCS(NetType) IsEnableHWOFDM(NetType)
#define IsSupportedTxCCK(NetType) ((NetType) & (WIRELESS_11B) ? true : false)
#define IsSupportedTxOFDM(NetType) ((NetType) & (WIRELESS_11G|WIRELESS_11A) ? true : false)
#define IsSupportedTxMCS(NetType) ((NetType) & (WIRELESS_11_24N|WIRELESS_11_5N) ? true : false)
struct ieee_param {
u32 cmd;
u8 sta_addr[ETH_ALEN];
union {
struct {
u8 name;
u32 value;
} wpa_param;
struct {
u32 len;
u8 reserved[32];
u8 data[0];
} wpa_ie;
struct{
int command;
int reason_code;
} mlme;
struct {
u8 alg[IEEE_CRYPT_ALG_NAME_LEN];
u8 set_tx;
u32 err;
u8 idx;
u8 seq[8]; /* sequence counter (set: RX, get: TX) */
u16 key_len;
u8 key[0];
} crypt;
#ifdef CONFIG_8723AU_AP_MODE
struct {
u16 aid;
u16 capability;
int flags;
u8 tx_supp_rates[16];
struct ieee80211_ht_cap ht_cap;
} add_sta;
struct {
u8 reserved[2];/* for set max_num_sta */
u8 buf[0];
} bcn_ie;
#endif
} u;
};
#define MIN_FRAG_THRESHOLD 256U
#define MAX_FRAG_THRESHOLD 2346U
/* QoS,QOS */
#define NORMAL_ACK 0
#define NO_ACK 1
#define NON_EXPLICIT_ACK 2
#define BLOCK_ACK 3
/* IEEE 802.11 defines */
#define P80211_OUI_LEN 3
struct ieee80211_snap_hdr {
u8 dsap; /* always 0xAA */
u8 ssap; /* always 0xAA */
u8 ctrl; /* always 0x03 */
u8 oui[P80211_OUI_LEN]; /* organizational universal id */
} __attribute__ ((packed));
#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE)
#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE)
#define WLAN_QC_GET_TID(qc) ((qc) & 0x0f)
#define WLAN_GET_SEQ_FRAG(seq) ((seq) & RTW_IEEE80211_SCTL_FRAG)
#define WLAN_GET_SEQ_SEQ(seq) ((seq) & RTW_IEEE80211_SCTL_SEQ)
#define WLAN_REASON_JOIN_WRONG_CHANNEL 65534
#define WLAN_REASON_EXPIRATION_CHK 65535
#define IEEE80211_STATMASK_SIGNAL (1<<0)
#define IEEE80211_STATMASK_RSSI (1<<1)
#define IEEE80211_STATMASK_NOISE (1<<2)
#define IEEE80211_STATMASK_RATE (1<<3)
#define IEEE80211_STATMASK_WEMASK 0x7
#define IEEE80211_CCK_MODULATION (1<<0)
#define IEEE80211_OFDM_MODULATION (1<<1)
#define IEEE80211_24GHZ_BAND (1<<0)
#define IEEE80211_52GHZ_BAND (1<<1)
#define IEEE80211_CCK_RATE_LEN 4
#define IEEE80211_NUM_OFDM_RATESLEN 8
#define IEEE80211_CCK_RATE_1MB 0x02
#define IEEE80211_CCK_RATE_2MB 0x04
#define IEEE80211_CCK_RATE_5MB 0x0B
#define IEEE80211_CCK_RATE_11MB 0x16
#define IEEE80211_OFDM_RATE_LEN 8
#define IEEE80211_OFDM_RATE_6MB 0x0C
#define IEEE80211_OFDM_RATE_9MB 0x12
#define IEEE80211_OFDM_RATE_12MB 0x18
#define IEEE80211_OFDM_RATE_18MB 0x24
#define IEEE80211_OFDM_RATE_24MB 0x30
#define IEEE80211_OFDM_RATE_36MB 0x48
#define IEEE80211_OFDM_RATE_48MB 0x60
#define IEEE80211_OFDM_RATE_54MB 0x6C
#define IEEE80211_BASIC_RATE_MASK 0x80
#define IEEE80211_CCK_RATE_1MB_MASK (1<<0)
#define IEEE80211_CCK_RATE_2MB_MASK (1<<1)
#define IEEE80211_CCK_RATE_5MB_MASK (1<<2)
#define IEEE80211_CCK_RATE_11MB_MASK (1<<3)
#define IEEE80211_OFDM_RATE_6MB_MASK (1<<4)
#define IEEE80211_OFDM_RATE_9MB_MASK (1<<5)
#define IEEE80211_OFDM_RATE_12MB_MASK (1<<6)
#define IEEE80211_OFDM_RATE_18MB_MASK (1<<7)
#define IEEE80211_OFDM_RATE_24MB_MASK (1<<8)
#define IEEE80211_OFDM_RATE_36MB_MASK (1<<9)
#define IEEE80211_OFDM_RATE_48MB_MASK (1<<10)
#define IEEE80211_OFDM_RATE_54MB_MASK (1<<11)
#define IEEE80211_CCK_RATES_MASK 0x0000000F
#define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \
IEEE80211_CCK_RATE_2MB_MASK)
#define IEEE80211_CCK_DEFAULT_RATES_MASK (IEEE80211_CCK_BASIC_RATES_MASK | \
IEEE80211_CCK_RATE_5MB_MASK | \
IEEE80211_CCK_RATE_11MB_MASK)
#define IEEE80211_OFDM_RATES_MASK 0x00000FF0
#define IEEE80211_OFDM_BASIC_RATES_MASK (IEEE80211_OFDM_RATE_6MB_MASK | \
IEEE80211_OFDM_RATE_12MB_MASK | \
IEEE80211_OFDM_RATE_24MB_MASK)
#define IEEE80211_OFDM_DEFAULT_RATES_MASK (IEEE80211_OFDM_BASIC_RATES_MASK | \
IEEE80211_OFDM_RATE_9MB_MASK | \
IEEE80211_OFDM_RATE_18MB_MASK | \
IEEE80211_OFDM_RATE_36MB_MASK | \
IEEE80211_OFDM_RATE_48MB_MASK | \
IEEE80211_OFDM_RATE_54MB_MASK)
#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \
IEEE80211_CCK_DEFAULT_RATES_MASK)
#define IEEE80211_NUM_OFDM_RATES 8
#define IEEE80211_NUM_CCK_RATES 4
#define IEEE80211_OFDM_SHIFT_MASK_A 4
#define WEP_KEYS 4
#define WEP_KEY_LEN 13
/*
802.11 data frame from AP
,-------------------------------------------------------------------.
Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
|------|------|---------|---------|---------|------|---------|------|
Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
| | tion | (BSSID) | | | ence | data | |
`-------------------------------------------------------------------'
Total: 28-2340 bytes
*/
struct ieee80211_header_data {
u16 frame_ctl;
u16 duration_id;
u8 addr1[6];
u8 addr2[6];
u8 addr3[6];
u16 seq_ctrl;
};
struct ieee80211_info_element_hdr {
u8 id;
u8 len;
} __attribute__ ((packed));
struct ieee80211_info_element {
u8 id;
u8 len;
u8 data[0];
} __attribute__ ((packed));
struct ieee80211_txb {
u8 nr_frags;
u8 encrypted;
u16 reserved;
u16 frag_size;
u16 payload_size;
struct sk_buff *fragments[0];
};
/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs
* only use 8, and then use extended rates for the remaining supported
* rates. Other APs, however, stick all of their supported rates on the
* main rates information element... */
#define MAX_RATES_LENGTH ((u8)12)
#define MAX_RATES_EX_LENGTH ((u8)16)
#define MAX_CHANNEL_NUMBER 161
#define MAX_WPA_IE_LEN (256)
#define MAX_WPS_IE_LEN (512)
#define MAX_P2P_IE_LEN (256)
#define MAX_WFD_IE_LEN (128)
#define IW_ESSID_MAX_SIZE 32
/*
join_res:
-1: authentication fail
-2: association fail
> 0: TID
*/
#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
#define DEFAULT_FTS 2346
#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
#define CFG_IEEE80211_RESERVE_FCS (1<<0)
#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
#define MAXTID 16
#define IEEE_A (1<<0)
#define IEEE_B (1<<1)
#define IEEE_G (1<<2)
#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G)
/* Baron move to ieee80211.c */
int ieee80211_is_empty_essid23a(const char *essid, int essid_len);
enum _PUBLIC_ACTION{
ACT_PUBLIC_BSSCOEXIST = 0, /* 20/40 BSS Coexistence */
ACT_PUBLIC_DSE_ENABLE = 1,
ACT_PUBLIC_DSE_DEENABLE = 2,
ACT_PUBLIC_DSE_REG_LOCATION = 3,
ACT_PUBLIC_EXT_CHL_SWITCH = 4,
ACT_PUBLIC_DSE_MSR_REQ = 5,
ACT_PUBLIC_DSE_MSR_RPRT = 6,
ACT_PUBLIC_MP = 7, /* Measurement Pilot */
ACT_PUBLIC_DSE_PWR_CONSTRAINT = 8,
ACT_PUBLIC_VENDOR = 9, /* for WIFI_DIRECT */
ACT_PUBLIC_GAS_INITIAL_REQ = 10,
ACT_PUBLIC_GAS_INITIAL_RSP = 11,
ACT_PUBLIC_GAS_COMEBACK_REQ = 12,
ACT_PUBLIC_GAS_COMEBACK_RSP = 13,
ACT_PUBLIC_TDLS_DISCOVERY_RSP = 14,
ACT_PUBLIC_LOCATION_TRACK = 15,
ACT_PUBLIC_MAX
};
#define WME_OUI_TYPE 2
#define WME_OUI_SUBTYPE_INFORMATION_ELEMENT 0
#define WME_OUI_SUBTYPE_PARAMETER_ELEMENT 1
#define WME_OUI_SUBTYPE_TSPEC_ELEMENT 2
#define WME_VERSION 1
#define OUI_BROADCOM 0x00904c /* Broadcom (Epigram) */
#define VENDOR_HT_CAPAB_OUI_TYPE 0x33 /* 00-90-4c:0x33 */
/* Represent channel details, subset of ieee80211_channel */
struct rtw_ieee80211_channel {
/* enum ieee80211_band band; */
/* u16 center_freq; */
u16 hw_value;
u32 flags;
/* int max_antenna_gain; */
/* int max_power; */
/* int max_reg_power; */
/* bool beacon_found; */
/* u32 orig_flags; */
/* int orig_mag; */
/* int orig_mpwr; */
};
#define CHAN_FMT \
/*"band:%d, "*/ \
/*"center_freq:%u, "*/ \
"hw_value:%u, " \
"flags:0x%08x" \
/*"max_antenna_gain:%d\n"*/ \
/*"max_power:%d\n"*/ \
/*"max_reg_power:%d\n"*/ \
/*"beacon_found:%u\n"*/ \
/*"orig_flags:0x%08x\n"*/ \
/*"orig_mag:%d\n"*/ \
/*"orig_mpwr:%d\n"*/
#define CHAN_ARG(channel) \
/*(channel)->band*/ \
/*, (channel)->center_freq*/ \
(channel)->hw_value \
, (channel)->flags \
/*, (channel)->max_antenna_gain*/ \
/*, (channel)->max_power*/ \
/*, (channel)->max_reg_power*/ \
/*, (channel)->beacon_found*/ \
/*, (channel)->orig_flags*/ \
/*, (channel)->orig_mag*/ \
/*, (channel)->orig_mpwr*/ \
/* Parsed Information Elements */
struct rtw_ieee802_11_elems {
u8 *ssid;
u8 ssid_len;
u8 *supp_rates;
u8 supp_rates_len;
u8 *fh_params;
u8 fh_params_len;
u8 *ds_params;
u8 ds_params_len;
u8 *cf_params;
u8 cf_params_len;
u8 *tim;
u8 tim_len;
u8 *ibss_params;
u8 ibss_params_len;
u8 *challenge;
u8 challenge_len;
u8 *erp_info;
u8 erp_info_len;
u8 *ext_supp_rates;
u8 ext_supp_rates_len;
u8 *wpa_ie;
u8 wpa_ie_len;
u8 *rsn_ie;
u8 rsn_ie_len;
u8 *wme;
u8 wme_len;
u8 *wme_tspec;
u8 wme_tspec_len;
u8 *wps_ie;
u8 wps_ie_len;
u8 *power_cap;
u8 power_cap_len;
u8 *supp_channels;
u8 supp_channels_len;
u8 *mdie;
u8 mdie_len;
u8 *ftie;
u8 ftie_len;
u8 *timeout_int;
u8 timeout_int_len;
u8 *ht_capabilities;
u8 ht_capabilities_len;
u8 *ht_operation;
u8 ht_operation_len;
u8 *vendor_ht_cap;
u8 vendor_ht_cap_len;
};
enum parse_res {
ParseOK = 0,
ParseUnknown = 1,
ParseFailed = -1
};
enum parse_res rtw_ieee802_11_parse_elems23a(u8 *start, uint len,
struct rtw_ieee802_11_elems *elems,
int show_errors);
u8 *rtw_set_fixed_ie23a(unsigned char *pbuf, unsigned int len, unsigned char *source, unsigned int *frlen);
u8 *rtw_set_ie23a(u8 *pbuf, int index, uint len, u8 *source, uint *frlen);
enum secondary_ch_offset {
SCN = 0, /* no secondary channel */
SCA = 1, /* secondary channel above */
SCB = 3, /* secondary channel below */
};
u8 secondary_ch_offset_to_hal_ch_offset23a(u8 ch_offset);
u8 hal_ch_offset_to_secondary_ch_offset23a(u8 ch_offset);
u8 *rtw_set_ie23a_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode, u8 new_ch, u8 ch_switch_cnt);
u8 *rtw_set_ie23a_secondary_ch_offset(u8 *buf, u32 *buf_len, u8 secondary_ch_offset);
u8 *rtw_set_ie23a_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl, u8 flags, u16 reason, u16 precedence);
u8 *rtw_get_ie23a(u8*pbuf, int index, int *len, int limit);
u8 *rtw_get_ie23a_ex(u8 *in_ie, uint in_len, u8 eid, u8 *oui, u8 oui_len, u8 *ie, uint *ielen);
int rtw_ies_remove_ie23a(u8 *ies, uint *ies_len, uint offset, u8 eid, u8 *oui, u8 oui_len);
void rtw_set_supported_rate23a(u8* SupportedRates, uint mode) ;
unsigned char *rtw_get_wpa_ie23a(unsigned char *pie, int *wpa_ie_len, int limit);
unsigned char *rtw_get_wpa2_ie23a(unsigned char *pie, int *rsn_ie_len, int limit);
int rtw_get_wpa_cipher_suite23a(u8 *s);
int rtw_get_wpa2_cipher_suite23a(u8 *s);
int rtw_parse_wpa_ie23a(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x);
int rtw_parse_wpa2_ie23a(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x);
int rtw_get_sec_ie23a(u8 *in_ie,uint in_len,u8 *rsn_ie,u16 *rsn_len,u8 *wpa_ie,u16 *wpa_len);
u8 rtw_is_wps_ie23a(u8 *ie_ptr, uint *wps_ielen);
u8 *rtw_get_wps_ie23a(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen);
u8 *rtw_get_wps_attr23a(u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_attr, u32 *len_attr);
u8 *rtw_get_wps_attr_content23a(u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_content, uint *len_content);
/**
* for_each_ie - iterate over continuous IEs
* @ie:
* @buf:
* @buf_len:
*/
#define for_each_ie(ie, buf, buf_len) \
for (ie = (void*)buf; (((u8*)ie) - ((u8*)buf) + 1) < buf_len; ie = (void*)(((u8*)ie) + *(((u8*)ie)+1) + 2))
void dump_ies23a(u8 *buf, u32 buf_len);
void dump_wps_ie23a(u8 *ie, u32 ie_len);
#ifdef CONFIG_8723AU_P2P
void dump_p2p_ie23a(u8 *ie, u32 ie_len);
u8 *rtw_get_p2p_ie23a(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen);
u8 *rtw_get_p2p_attr23a(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_attr, u32 *len_attr);
u8 *rtw_get_p2p_attr23a_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_content, uint *len_content);
u32 rtw_set_p2p_attr_content23a(u8 *pbuf, u8 attr_id, u16 attr_len, u8 *pdata_attr);
void rtw_wlan_bssid_ex_remove_p2p_attr23a(struct wlan_bssid_ex *bss_ex, u8 attr_id);
#endif
#ifdef CONFIG_8723AU_P2P
int rtw_get_wfd_ie(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen);
int rtw_get_wfd_attr_content(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id ,u8 *attr_content, uint *attr_contentlen);
#endif /* CONFIG_8723AU_P2P */
uint rtw_get_rateset_len23a(u8 *rateset);
struct registry_priv;
int rtw_generate_ie23a(struct registry_priv *pregistrypriv);
int rtw_get_bit_value_from_ieee_value23a(u8 val);
uint rtw_is_cckrates_included23a(u8 *rate);
uint rtw_is_cckratesonly_included23a(u8 *rate);
int rtw_check_network_type23a(unsigned char *rate, int ratelen, int channel);
void rtw_get_bcn_info23a(struct wlan_network *pnetwork);
void rtw_macaddr_cfg23a(u8 *mac_addr);
u16 rtw_mcs_rate23a(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40, unsigned char * MCS_rate);
int rtw_action_frame_parse23a(const u8 *frame, u32 frame_len, u8* category, u8 *action);
const char *action_public_str23a(u8 action);
#endif /* IEEE80211_H */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __IOCTL_CFG80211_H__
#define __IOCTL_CFG80211_H__
struct rtw_wdev_invit_info {
u8 token;
u8 flags;
u8 status;
u8 req_op_ch;
u8 rsp_op_ch;
};
#define rtw_wdev_invit_info_init(invit_info) \
do { \
(invit_info)->token = 0; \
(invit_info)->flags = 0x00; \
(invit_info)->status = 0xff; \
(invit_info)->req_op_ch = 0; \
(invit_info)->rsp_op_ch = 0; \
} while (0)
struct rtw_wdev_priv {
struct wireless_dev *rtw_wdev;
struct rtw_adapter *padapter;
struct cfg80211_scan_request *scan_request;
spinlock_t scan_req_lock;
struct net_device *pmon_ndev;/* for monitor interface */
char ifname_mon[IFNAMSIZ + 1]; /* name for monitor interface */
u8 p2p_enabled;
u8 provdisc_req_issued;
struct rtw_wdev_invit_info invit_info;
bool block;
bool power_mgmt;
};
#define wdev_to_priv(w) ((struct rtw_wdev_priv *)(wdev_priv(w)))
#define wiphy_to_adapter(x) \
(struct rtw_adapter *)(((struct rtw_wdev_priv *) \
wiphy_priv(x))->padapter)
#define wiphy_to_wdev(x) \
(struct wireless_dev *)(((struct rtw_wdev_priv *) \
wiphy_priv(x))->rtw_wdev)
int rtw_wdev_alloc(struct rtw_adapter *padapter, struct device *dev);
void rtw_wdev_free(struct wireless_dev *wdev);
void rtw_wdev_unregister(struct wireless_dev *wdev);
void rtw_cfg80211_init_wiphy(struct rtw_adapter *padapter);
void rtw_cfg80211_surveydone_event_callback(struct rtw_adapter *padapter);
void rtw_cfg80211_indicate_connect(struct rtw_adapter *padapter);
void rtw_cfg80211_indicate_disconnect(struct rtw_adapter *padapter);
void rtw_cfg80211_indicate_scan_done(struct rtw_wdev_priv *pwdev_priv,
bool aborted);
#ifdef CONFIG_8723AU_AP_MODE
void rtw_cfg80211_indicate_sta_assoc(struct rtw_adapter *padapter,
u8 *pmgmt_frame, uint frame_len);
void rtw_cfg80211_indicate_sta_disassoc(struct rtw_adapter *padapter,
unsigned char *da, unsigned short reason);
#endif /* CONFIG_8723AU_AP_MODE */
void rtw_cfg80211_issue_p2p_provision_request23a(struct rtw_adapter *padapter,
const u8 *buf, size_t len);
void rtw_cfg80211_rx_p2p_action_public(struct rtw_adapter *padapter,
u8 *pmgmt_frame, uint frame_len);
void rtw_cfg80211_rx_action_p2p(struct rtw_adapter *padapter,
u8 *pmgmt_frame, uint frame_len);
void rtw_cfg80211_rx_action(struct rtw_adapter *adapter, u8 *frame,
uint frame_len, const char*msg);
int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len,
int type);
bool rtw_cfg80211_pwr_mgmt(struct rtw_adapter *adapter);
#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) \
cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len, 0, gfp)
#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) \
cfg80211_send_rx_assoc((adapter)->pnetdev, bss, buf, len)
#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) \
cfg80211_mgmt_tx_status((adapter)->rtw_wdev, cookie, buf, \
len, ack, gfp)
#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, \
channel_type, duration, gfp) \
cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, \
duration, gfp)
#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, \
chan_type, gfp) \
cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, \
cookie, chan, gfp)
#endif /* __IOCTL_CFG80211_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __MLME_OSDEP_H_
#define __MLME_OSDEP_H_
#include <osdep_service.h>
#include <drv_types.h>
void rtw_os_indicate_disconnect23a(struct rtw_adapter *adapter);
void rtw_os_indicate_connect23a(struct rtw_adapter *adapter);
void rtw_os_indicate_scan_done23a(struct rtw_adapter *padapter, bool aborted);
void rtw_report_sec_ie23a(struct rtw_adapter *adapter, u8 authmode, u8 *sec_ie);
void rtw_reset_securitypriv23a(struct rtw_adapter *adapter);
#endif /* _MLME_OSDEP_H_ */

342
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __CUSTOM_OID_H
#define __CUSTOM_OID_H
/* 0xFF818000 - 0xFF81802F RTL8180 Mass Production Kit */
/* 0xFF818500 - 0xFF81850F RTL8185 Setup Utility */
/* 0xFF818580 - 0xFF81858F RTL8185 Phy Status Utility */
/* For Production Kit with Agilent Equipments */
/* in order to make our custom oids hopefully somewhat unique */
/* we will use 0xFF (indicating implementation specific OID) */
/* 81(first byte of non zero Realtek unique identifier) */
/* 80 (second byte of non zero Realtek unique identifier) */
/* XX (the custom OID number - providing 255 possible custom oids) */
#define OID_RT_PRO_RESET_DUT 0xFF818000
#define OID_RT_PRO_SET_DATA_RATE 0xFF818001
#define OID_RT_PRO_START_TEST 0xFF818002
#define OID_RT_PRO_STOP_TEST 0xFF818003
#define OID_RT_PRO_SET_PREAMBLE 0xFF818004
#define OID_RT_PRO_SET_SCRAMBLER 0xFF818005
#define OID_RT_PRO_SET_FILTER_BB 0xFF818006
#define OID_RT_PRO_SET_MANUAL_DIVERSITY_BB 0xFF818007
#define OID_RT_PRO_SET_CHANNEL_DIRECT_CALL 0xFF818008
#define OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL 0xFF818009
#define OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL 0xFF81800A
#define OID_RT_PRO_SET_TX_ANTENNA_BB 0xFF81800D
#define OID_RT_PRO_SET_ANTENNA_BB 0xFF81800E
#define OID_RT_PRO_SET_CR_SCRAMBLER 0xFF81800F
#define OID_RT_PRO_SET_CR_NEW_FILTER 0xFF818010
#define OID_RT_PRO_SET_TX_POWER_CONTROL 0xFF818011
#define OID_RT_PRO_SET_CR_TX_CONFIG 0xFF818012
#define OID_RT_PRO_GET_TX_POWER_CONTROL 0xFF818013
#define OID_RT_PRO_GET_CR_SIGNAL_QUALITY 0xFF818014
#define OID_RT_PRO_SET_CR_SETPOINT 0xFF818015
#define OID_RT_PRO_SET_INTEGRATOR 0xFF818016
#define OID_RT_PRO_SET_SIGNAL_QUALITY 0xFF818017
#define OID_RT_PRO_GET_INTEGRATOR 0xFF818018
#define OID_RT_PRO_GET_SIGNAL_QUALITY 0xFF818019
#define OID_RT_PRO_QUERY_EEPROM_TYPE 0xFF81801A
#define OID_RT_PRO_WRITE_MAC_ADDRESS 0xFF81801B
#define OID_RT_PRO_READ_MAC_ADDRESS 0xFF81801C
#define OID_RT_PRO_WRITE_CIS_DATA 0xFF81801D
#define OID_RT_PRO_READ_CIS_DATA 0xFF81801E
#define OID_RT_PRO_WRITE_POWER_CONTROL 0xFF81801F
#define OID_RT_PRO_READ_POWER_CONTROL 0xFF818020
#define OID_RT_PRO_WRITE_EEPROM 0xFF818021
#define OID_RT_PRO_READ_EEPROM 0xFF818022
#define OID_RT_PRO_RESET_TX_PACKET_SENT 0xFF818023
#define OID_RT_PRO_QUERY_TX_PACKET_SENT 0xFF818024
#define OID_RT_PRO_RESET_RX_PACKET_RECEIVED 0xFF818025
#define OID_RT_PRO_QUERY_RX_PACKET_RECEIVED 0xFF818026
#define OID_RT_PRO_QUERY_RX_PACKET_CRC32_ERROR 0xFF818027
#define OID_RT_PRO_QUERY_CURRENT_ADDRESS 0xFF818028
#define OID_RT_PRO_QUERY_PERMANENT_ADDRESS 0xFF818029
#define OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS 0xFF81802A
#define OID_RT_PRO_RECEIVE_PACKET 0xFF81802C
/* added by Owen on 04/08/03 for Cameo's request */
#define OID_RT_PRO_WRITE_EEPROM_BYTE 0xFF81802D
#define OID_RT_PRO_READ_EEPROM_BYTE 0xFF81802E
#define OID_RT_PRO_SET_MODULATION 0xFF81802F
/* */
#define OID_RT_DRIVER_OPTION 0xFF818080
#define OID_RT_RF_OFF 0xFF818081
#define OID_RT_AUTH_STATUS 0xFF818082
/* */
#define OID_RT_PRO_SET_CONTINUOUS_TX 0xFF81800B
#define OID_RT_PRO_SET_SINGLE_CARRIER_TX 0xFF81800C
#define OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX 0xFF81802B
#define OID_RT_PRO_SET_SINGLE_TONE_TX 0xFF818043
/* */
/* by Owen for RTL8185 Phy Status Report Utility */
#define OID_RT_UTILITYfalse_ALARM_COUNTERS 0xFF818580
#define OID_RT_UTILITY_SELECT_DEBUG_MODE 0xFF818581
#define OID_RT_UTILITY_SELECT_SUBCARRIER_NUMBER 0xFF818582
#define OID_RT_UTILITY_GET_RSSI_STATUS 0xFF818583
#define OID_RT_UTILITY_GET_FRAME_DETECTION_STATUS 0xFF818584
#define OID_RT_UTILITY_GET_AGC_AND_FREQUENCY_OFFSET_ESTIMATION_STATUS 0xFF818585
#define OID_RT_UTILITY_GET_CHANNEL_ESTIMATION_STATUS 0xFF818586
/* by Owen on 03/09/19-03/09/22 for RTL8185 */
#define OID_RT_WIRELESS_MODE 0xFF818500
#define OID_RT_SUPPORTED_RATES 0xFF818501
#define OID_RT_DESIRED_RATES 0xFF818502
#define OID_RT_WIRELESS_MODE_STARTING_ADHOC 0xFF818503
/* */
#define OID_RT_GET_CONNECT_STATE 0xFF030001
#define OID_RT_RESCAN 0xFF030002
#define OID_RT_SET_KEY_LENGTH 0xFF030003
#define OID_RT_SET_DEFAULT_KEY_ID 0xFF030004
#define OID_RT_SET_CHANNEL 0xFF010182
#define OID_RT_SET_SNIFFER_MODE 0xFF010183
#define OID_RT_GET_SIGNAL_QUALITY 0xFF010184
#define OID_RT_GET_SMALL_PACKET_CRC 0xFF010185
#define OID_RT_GET_MIDDLE_PACKET_CRC 0xFF010186
#define OID_RT_GET_LARGE_PACKET_CRC 0xFF010187
#define OID_RT_GET_TX_RETRY 0xFF010188
#define OID_RT_GET_RX_RETRY 0xFF010189
#define OID_RT_PRO_SET_FW_DIG_STATE 0xFF01018A/* S */
#define OID_RT_PRO_SET_FW_RA_STATE 0xFF01018B/* S */
#define OID_RT_GET_RX_TOTAL_PACKET 0xFF010190
#define OID_RT_GET_TX_BEACON_OK 0xFF010191
#define OID_RT_GET_TX_BEACON_ERR 0xFF010192
#define OID_RT_GET_RX_ICV_ERR 0xFF010193
#define OID_RT_SET_ENCRYPTION_ALGORITHM 0xFF010194
#define OID_RT_SET_NO_AUTO_RESCAN 0xFF010195
#define OID_RT_GET_PREAMBLE_MODE 0xFF010196
#define OID_RT_GET_DRIVER_UP_DELTA_TIME 0xFF010197
#define OID_RT_GET_AP_IP 0xFF010198
#define OID_RT_GET_CHANNELPLAN 0xFF010199
#define OID_RT_SET_PREAMBLE_MODE 0xFF01019A
#define OID_RT_SET_BCN_INTVL 0xFF01019B
#define OID_RT_GET_RF_VENDER 0xFF01019C
#define OID_RT_DEDICATE_PROBE 0xFF01019D
#define OID_RT_PRO_RX_FILTER_PATTERN 0xFF01019E
#define OID_RT_GET_DCST_CURRENT_THRESHOLD 0xFF01019F
#define OID_RT_GET_CCA_ERR 0xFF0101A0
#define OID_RT_GET_CCA_UPGRADE_THRESHOLD 0xFF0101A1
#define OID_RT_GET_CCA_FALLBACK_THRESHOLD 0xFF0101A2
#define OID_RT_GET_CCA_UPGRADE_EVALUATE_TIMES 0xFF0101A3
#define OID_RT_GET_CCA_FALLBACK_EVALUATE_TIMES 0xFF0101A4
/* by Owen on 03/31/03 for Cameo's request */
#define OID_RT_SET_RATE_ADAPTIVE 0xFF0101A5
/* */
#define OID_RT_GET_DCST_EVALUATE_PERIOD 0xFF0101A5
#define OID_RT_GET_DCST_TIME_UNIT_INDEX 0xFF0101A6
#define OID_RT_GET_TOTAL_TX_BYTES 0xFF0101A7
#define OID_RT_GET_TOTAL_RX_BYTES 0xFF0101A8
#define OID_RT_CURRENT_TX_POWER_LEVEL 0xFF0101A9
#define OID_RT_GET_ENC_KEY_MISMATCH_COUNT 0xFF0101AA
#define OID_RT_GET_ENC_KEY_MATCH_COUNT 0xFF0101AB
#define OID_RT_GET_CHANNEL 0xFF0101AC
#define OID_RT_SET_CHANNELPLAN 0xFF0101AD
#define OID_RT_GET_HARDWARE_RADIO_OFF 0xFF0101AE
#define OID_RT_CHANNELPLAN_BY_COUNTRY 0xFF0101AF
#define OID_RT_SCAN_AVAILABLE_BSSID 0xFF0101B0
#define OID_RT_GET_HARDWARE_VERSION 0xFF0101B1
#define OID_RT_GET_IS_ROAMING 0xFF0101B2
#define OID_RT_GET_IS_PRIVACY 0xFF0101B3
#define OID_RT_GET_KEY_MISMATCH 0xFF0101B4
#define OID_RT_SET_RSSI_ROAM_TRAFFIC_TH 0xFF0101B5
#define OID_RT_SET_RSSI_ROAM_SIGNAL_TH 0xFF0101B6
#define OID_RT_RESET_LOG 0xFF0101B7
#define OID_RT_GET_LOG 0xFF0101B8
#define OID_RT_SET_INDICATE_HIDDEN_AP 0xFF0101B9
#define OID_RT_GET_HEADER_FAIL 0xFF0101BA
#define OID_RT_SUPPORTED_WIRELESS_MODE 0xFF0101BB
#define OID_RT_GET_CHANNEL_LIST 0xFF0101BC
#define OID_RT_GET_SCAN_IN_PROGRESS 0xFF0101BD
#define OID_RT_GET_TX_INFO 0xFF0101BE
#define OID_RT_RF_READ_WRITE_OFFSET 0xFF0101BF
#define OID_RT_RF_READ_WRITE 0xFF0101C0
/* For Netgear request. 2005.01.13, by rcnjko. */
#define OID_RT_FORCED_DATA_RATE 0xFF0101C1
#define OID_RT_WIRELESS_MODE_FOR_SCAN_LIST 0xFF0101C2
/* For Netgear request. 2005.02.17, by rcnjko. */
#define OID_RT_GET_BSS_WIRELESS_MODE 0xFF0101C3
/* For AZ project. 2005.06.27, by rcnjko. */
#define OID_RT_SCAN_WITH_MAGIC_PACKET 0xFF0101C4
/* Vincent 8185MP */
#define OID_RT_PRO_RX_FILTER 0xFF0111C0
/* Andy TEST */
/* define OID_RT_PRO_WRITE_REGISTRY 0xFF0111C1 */
/* define OID_RT_PRO_READ_REGISTRY 0xFF0111C2 */
#define OID_CE_USB_WRITE_REGISTRY 0xFF0111C1
#define OID_CE_USB_READ_REGISTRY 0xFF0111C2
#define OID_RT_PRO_SET_INITIAL_GAIN 0xFF0111C3
#define OID_RT_PRO_SET_BB_RF_STANDBY_MODE 0xFF0111C4
#define OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE 0xFF0111C5
#define OID_RT_PRO_SET_TX_CHARGE_PUMP 0xFF0111C6
#define OID_RT_PRO_SET_RX_CHARGE_PUMP 0xFF0111C7
#define OID_RT_PRO_RF_WRITE_REGISTRY 0xFF0111C8
#define OID_RT_PRO_RF_READ_REGISTRY 0xFF0111C9
#define OID_RT_PRO_QUERY_RF_TYPE 0xFF0111CA
/* AP OID */
#define OID_RT_AP_GET_ASSOCIATED_STATION_LIST 0xFF010300
#define OID_RT_AP_GET_CURRENT_TIME_STAMP 0xFF010301
#define OID_RT_AP_SWITCH_INTO_AP_MODE 0xFF010302
#define OID_RT_AP_SET_DTIM_PERIOD 0xFF010303
#define OID_RT_AP_SUPPORTED 0xFF010304 /* Determine if driver supports AP mode. 2004.08.27, by rcnjko. */
#define OID_RT_AP_SET_PASSPHRASE 0xFF010305 /* Set WPA-PSK passphrase into authenticator. 2005.07.08, byrcnjko. */
/* 8187MP. 2004.09.06, by rcnjko. */
#define OID_RT_PRO8187_WI_POLL 0xFF818780
#define OID_RT_PRO_WRITE_BB_REG 0xFF818781
#define OID_RT_PRO_READ_BB_REG 0xFF818782
#define OID_RT_PRO_WRITE_RF_REG 0xFF818783
#define OID_RT_PRO_READ_RF_REG 0xFF818784
/* Meeting House. added by Annie, 2005-07-20. */
#define OID_RT_MH_VENDER_ID 0xFFEDC100
/* 8711 MP OID added 20051230. */
#define OID_RT_PRO8711_JOIN_BSS 0xFF871100/* S */
#define OID_RT_PRO_READ_REGISTER 0xFF871101 /* Q */
#define OID_RT_PRO_WRITE_REGISTER 0xFF871102 /* S */
#define OID_RT_PRO_BURST_READ_REGISTER 0xFF871103 /* Q */
#define OID_RT_PRO_BURST_WRITE_REGISTER 0xFF871104 /* S */
#define OID_RT_PRO_WRITE_TXCMD 0xFF871105 /* S */
#define OID_RT_PRO_READ16_EEPROM 0xFF871106 /* Q */
#define OID_RT_PRO_WRITE16_EEPROM 0xFF871107 /* S */
#define OID_RT_PRO_H2C_SET_COMMAND 0xFF871108 /* S */
#define OID_RT_PRO_H2C_QUERY_RESULT 0xFF871109 /* Q */
#define OID_RT_PRO8711_WI_POLL 0xFF87110A /* Q */
#define OID_RT_PRO8711_PKT_LOSS 0xFF87110B /* Q */
#define OID_RT_RD_ATTRIB_MEM 0xFF87110C/* Q */
#define OID_RT_WR_ATTRIB_MEM 0xFF87110D/* S */
/* Method 2 for H2C/C2H */
#define OID_RT_PRO_H2C_CMD_MODE 0xFF871110 /* S */
#define OID_RT_PRO_H2C_CMD_RSP_MODE 0xFF871111 /* Q */
#define OID_RT_PRO_H2C_CMD_EVENT_MODE 0xFF871112 /* S */
#define OID_RT_PRO_WAIT_C2H_EVENT 0xFF871113 /* Q */
#define OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST 0xFF871114/* Q */
#define OID_RT_PRO_SCSI_ACCESS_TEST 0xFF871115 /* Q, S */
#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT 0xFF871116 /* S */
#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN 0xFF871117 /* Q,S */
#define OID_RT_RRO_RX_PKT_VIA_IOCTRL 0xFF871118 /* Q */
#define OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL 0xFF871119 /* Q */
#define OID_RT_RPO_SET_PWRMGT_TEST 0xFF87111A /* S */
#define OID_RT_PRO_QRY_PWRMGT_TEST 0XFF87111B /* Q */
#define OID_RT_RPO_ASYNC_RWIO_TEST 0xFF87111C /* S */
#define OID_RT_RPO_ASYNC_RWIO_POLL 0xFF87111D /* Q */
#define OID_RT_PRO_SET_RF_INTFS 0xFF87111E /* S */
#define OID_RT_POLL_RX_STATUS 0xFF87111F /* Q */
#define OID_RT_PRO_CFG_DEBUG_MESSAGE 0xFF871120 /* Q,S */
#define OID_RT_PRO_SET_DATA_RATE_EX 0xFF871121/* S */
#define OID_RT_PRO_SET_BASIC_RATE 0xFF871122/* S */
#define OID_RT_PRO_READ_TSSI 0xFF871123/* S */
#define OID_RT_PRO_SET_POWER_TRACKING 0xFF871124/* S */
#define OID_RT_PRO_QRY_PWRSTATE 0xFF871150 /* Q */
#define OID_RT_PRO_SET_PWRSTATE 0xFF871151 /* S */
/* Method 2 , using workitem */
#define OID_RT_SET_READ_REG 0xFF871181 /* S */
#define OID_RT_SET_WRITE_REG 0xFF871182 /* S */
#define OID_RT_SET_BURST_READ_REG 0xFF871183 /* S */
#define OID_RT_SET_BURST_WRITE_REG 0xFF871184 /* S */
#define OID_RT_SET_WRITE_TXCMD 0xFF871185 /* S */
#define OID_RT_SET_READ16_EEPROM 0xFF871186 /* S */
#define OID_RT_SET_WRITE16_EEPROM 0xFF871187 /* S */
#define OID_RT_QRY_POLL_WKITEM 0xFF871188 /* Q */
/* For SDIO INTERFACE only */
#define OID_RT_PRO_SYNCPAGERW_SRAM 0xFF8711A0 /* Q, S */
#define OID_RT_PRO_871X_DRV_EXT 0xFF8711A1
/* For USB INTERFACE only */
#define OID_RT_PRO_USB_VENDOR_REQ 0xFF8711B0 /* Q, S */
#define OID_RT_PRO_SCSI_AUTO_TEST 0xFF8711B1 /* S */
#define OID_RT_PRO_USB_MAC_AC_FIFO_WRITE 0xFF8711B2 /* S */
#define OID_RT_PRO_USB_MAC_RX_FIFO_READ 0xFF8711B3 /* Q */
#define OID_RT_PRO_USB_MAC_RX_FIFO_POLLING 0xFF8711B4 /* Q */
#define OID_RT_PRO_H2C_SET_RATE_TABLE 0xFF8711FB /* S */
#define OID_RT_PRO_H2C_GET_RATE_TABLE 0xFF8711FC /* S */
#define OID_RT_PRO_H2C_C2H_LBK_TEST 0xFF8711FE
#define OID_RT_PRO_ENCRYPTION_CTRL 0xFF871200 /* Q, S */
#define OID_RT_PRO_ADD_STA_INFO 0xFF871201 /* S */
#define OID_RT_PRO_DELE_STA_INFO 0xFF871202 /* S */
#define OID_RT_PRO_QUERY_DR_VARIABLE 0xFF871203 /* Q */
#define OID_RT_PRO_RX_PACKET_TYPE 0xFF871204 /* Q, S */
#define OID_RT_PRO_READ_EFUSE 0xFF871205 /* Q */
#define OID_RT_PRO_WRITE_EFUSE 0xFF871206 /* S */
#define OID_RT_PRO_RW_EFUSE_PGPKT 0xFF871207 /* Q, S */
#define OID_RT_GET_EFUSE_CURRENT_SIZE 0xFF871208 /* Q */
#define OID_RT_SET_BANDWIDTH 0xFF871209 /* S */
#define OID_RT_SET_CRYSTAL_CAP 0xFF87120A /* S */
#define OID_RT_SET_RX_PACKET_TYPE 0xFF87120B /* S */
#define OID_RT_GET_EFUSE_MAX_SIZE 0xFF87120C /* Q */
#define OID_RT_PRO_SET_TX_AGC_OFFSET 0xFF87120D /* S */
#define OID_RT_PRO_SET_PKT_TEST_MODE 0xFF87120E /* S */
#define OID_RT_PRO_FOR_EVM_TEST_SETTING 0xFF87120F /* S */
#define OID_RT_PRO_GET_THERMAL_METER 0xFF871210 /* Q */
#define OID_RT_RESET_PHY_RX_PACKET_COUNT 0xFF871211 /* S */
#define OID_RT_GET_PHY_RX_PACKET_RECEIVED 0xFF871212 /* Q */
#define OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR 0xFF871213 /* Q */
#define OID_RT_SET_POWER_DOWN 0xFF871214 /* S */
#define OID_RT_GET_POWER_MODE 0xFF871215 /* Q */
#define OID_RT_PRO_EFUSE 0xFF871216 /* Q, S */
#define OID_RT_PRO_EFUSE_MAP 0xFF871217 /* Q, S */
#endif /* ifndef __CUSTOM_OID_H */

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drivers/staging/rtl8723au/include/odm.h Normal file
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174
drivers/staging/rtl8723au/include/odm_HWConfig.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __HALHWOUTSRC_H__
#define __HALHWOUTSRC_H__
#include <Hal8723APhyCfg.h>
/* */
/* Definition */
/* */
/* */
/* */
/* CCK Rates, TxHT = 0 */
#define DESC92C_RATE1M 0x00
#define DESC92C_RATE2M 0x01
#define DESC92C_RATE5_5M 0x02
#define DESC92C_RATE11M 0x03
/* OFDM Rates, TxHT = 0 */
#define DESC92C_RATE6M 0x04
#define DESC92C_RATE9M 0x05
#define DESC92C_RATE12M 0x06
#define DESC92C_RATE18M 0x07
#define DESC92C_RATE24M 0x08
#define DESC92C_RATE36M 0x09
#define DESC92C_RATE48M 0x0a
#define DESC92C_RATE54M 0x0b
/* MCS Rates, TxHT = 1 */
#define DESC92C_RATEMCS0 0x0c
#define DESC92C_RATEMCS1 0x0d
#define DESC92C_RATEMCS2 0x0e
#define DESC92C_RATEMCS3 0x0f
#define DESC92C_RATEMCS4 0x10
#define DESC92C_RATEMCS5 0x11
#define DESC92C_RATEMCS6 0x12
#define DESC92C_RATEMCS7 0x13
#define DESC92C_RATEMCS8 0x14
#define DESC92C_RATEMCS9 0x15
#define DESC92C_RATEMCS10 0x16
#define DESC92C_RATEMCS11 0x17
#define DESC92C_RATEMCS12 0x18
#define DESC92C_RATEMCS13 0x19
#define DESC92C_RATEMCS14 0x1a
#define DESC92C_RATEMCS15 0x1b
#define DESC92C_RATEMCS15_SG 0x1c
#define DESC92C_RATEMCS32 0x20
/* */
/* structure and define */
/* */
struct phy_rx_agc_info {
#ifdef __LITTLE_ENDIAN
u8 gain:7,trsw:1;
#else
u8 trsw:1,gain:7;
#endif
};
struct phy_status_rpt {
struct phy_rx_agc_info path_agc[2];
u8 ch_corr[2];
u8 cck_sig_qual_ofdm_pwdb_all;
u8 cck_agc_rpt_ofdm_cfosho_a;
u8 cck_rpt_b_ofdm_cfosho_b;
u8 rsvd_1;/* ch_corr_msb; */
u8 noise_power_db_msb;
u8 path_cfotail[2];
u8 pcts_mask[2];
s8 stream_rxevm[2];
u8 path_rxsnr[2];
u8 noise_power_db_lsb;
u8 rsvd_2[3];
u8 stream_csi[2];
u8 stream_target_csi[2];
s8 sig_evm;
u8 rsvd_3;
#ifdef __LITTLE_ENDIAN
u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
u8 sgi_en:1;
u8 rxsc:2;
u8 idle_long:1;
u8 r_ant_train_en:1;
u8 ant_sel_b:1;
u8 ant_sel:1;
#else /* _BIG_ENDIAN_ */
u8 ant_sel:1;
u8 ant_sel_b:1;
u8 r_ant_train_en:1;
u8 idle_long:1;
u8 rxsc:2;
u8 sgi_en:1;
u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
#endif
};
struct phy_status_rpt_8195 {
struct phy_rx_agc_info path_agc[2];
u8 ch_num[2];
u8 cck_sig_qual_ofdm_pwdb_all;
u8 cck_agc_rpt_ofdm_cfosho_a;
u8 cck_bb_pwr_ofdm_cfosho_b;
u8 cck_rx_path; /* CCK_RX_PATH [3:0] (with regA07[3:0] definition) */
u8 rsvd_1;
u8 path_cfotail[2];
u8 pcts_mask[2];
s8 stream_rxevm[2];
u8 path_rxsnr[2];
u8 rsvd_2[2];
u8 stream_snr[2];
u8 stream_csi[2];
u8 rsvd_3[2];
s8 sig_evm;
u8 rsvd_4;
#ifdef __LITTLE_ENDIAN
u8 antidx_anta:3;
u8 antidx_antb:3;
u8 rsvd_5:2;
#else /* _BIG_ENDIAN_ */
u8 rsvd_5:2;
u8 antidx_antb:3;
u8 antidx_anta:3;
#endif
};
void odm_Init_RSSIForDM23a(struct dm_odm_t *pDM_Odm);
void
ODM_PhyStatusQuery23a(
struct dm_odm_t *pDM_Odm,
struct odm_phy_info *pPhyInfo,
u8 * pPhyStatus,
struct odm_packet_info *pPktinfo
);
void ODM_MacStatusQuery23a(struct dm_odm_t *pDM_Odm,
u8 *pMacStatus,
u8 MacID,
bool bPacketMatchBSSID,
bool bPacketToSelf,
bool bPacketBeacon
);
enum hal_status ODM_ConfigRFWithHeaderFile23a(struct dm_odm_t *pDM_Odm,
enum RF_RADIO_PATH Content,
enum RF_RADIO_PATH eRFPath
);
enum hal_status ODM_ConfigBBWithHeaderFile23a(struct dm_odm_t *pDM_Odm,
enum odm_bb_config_type ConfigType
);
enum hal_status ODM_ConfigMACWithHeaderFile23a(struct dm_odm_t *pDM_Odm);
#endif

34
drivers/staging/rtl8723au/include/odm_RegConfig8723A.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __INC_ODM_REGCONFIG_H_8723A
#define __INC_ODM_REGCONFIG_H_8723A
void odm_ConfigRFReg_8723A(struct dm_odm_t *pDM_Odm, u32 Addr, u32 Data,
enum RF_RADIO_PATH RF_PATH, u32 RegAddr);
void odm_ConfigRF_RadioA_8723A(struct dm_odm_t *pDM_Odm, u32 Addr, u32 Data);
void odm_ConfigRF_RadioB_8723A(struct dm_odm_t *pDM_Odm, u32 Addr, u32 Data);
void odm_ConfigMAC_8723A(struct dm_odm_t *pDM_Odm, u32 Addr, u8 Data);
void odm_ConfigBB_AGC_8723A(struct dm_odm_t *pDM_Odm, u32 Addr,
u32 Bitmask, u32 Data);
void odm_ConfigBB_PHY_REG_PG_8723A(struct dm_odm_t *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data);
void odm_ConfigBB_PHY_8723A(struct dm_odm_t *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data);
#endif /* end of SUPPORT */

49
drivers/staging/rtl8723au/include/odm_RegDefine11AC.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __ODM_REGDEFINE11AC_H__
#define __ODM_REGDEFINE11AC_H__
/* 2 RF REG LIST */
/* 2 BB REG LIST */
/* PAGE 8 */
/* PAGE 9 */
#define ODM_REG_OFDM_FA_RST_11AC 0x9A4
/* PAGE A */
#define ODM_REG_CCK_CCA_11AC 0xA0A
#define ODM_REG_CCK_FA_RST_11AC 0xA2C
#define ODM_REG_CCK_FA_11AC 0xA5C
/* PAGE C */
#define ODM_REG_IGI_A_11AC 0xC50
/* PAGE E */
#define ODM_REG_IGI_B_11AC 0xE50
/* PAGE F */
#define ODM_REG_OFDM_FA_11AC 0xF48
/* 2 MAC REG LIST */
/* DIG Related */
#define ODM_BIT_IGI_11AC 0xFFFFFFFF
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __ODM_REGDEFINE11N_H__
#define __ODM_REGDEFINE11N_H__
/* 2 RF REG LIST */
#define ODM_REG_RF_MODE_11N 0x00
#define ODM_REG_RF_0B_11N 0x0B
#define ODM_REG_CHNBW_11N 0x18
#define ODM_REG_T_METER_11N 0x24
#define ODM_REG_RF_25_11N 0x25
#define ODM_REG_RF_26_11N 0x26
#define ODM_REG_RF_27_11N 0x27
#define ODM_REG_RF_2B_11N 0x2B
#define ODM_REG_RF_2C_11N 0x2C
#define ODM_REG_RXRF_A3_11N 0x3C
#define ODM_REG_T_METER_92D_11N 0x42
#define ODM_REG_T_METER_88E_11N 0x42
/* 2 BB REG LIST */
/* PAGE 8 */
#define ODM_REG_BB_CTRL_11N 0x800
#define ODM_REG_RF_PIN_11N 0x804
#define ODM_REG_PSD_CTRL_11N 0x808
#define ODM_REG_TX_ANT_CTRL_11N 0x80C
#define ODM_REG_BB_PWR_SAV5_11N 0x818
#define ODM_REG_CCK_RPT_FORMAT_11N 0x824
#define ODM_REG_RX_DEFUALT_A_11N 0x858
#define ODM_REG_RX_DEFUALT_B_11N 0x85A
#define ODM_REG_BB_PWR_SAV3_11N 0x85C
#define ODM_REG_ANTSEL_CTRL_11N 0x860
#define ODM_REG_RX_ANT_CTRL_11N 0x864
#define ODM_REG_PIN_CTRL_11N 0x870
#define ODM_REG_BB_PWR_SAV1_11N 0x874
#define ODM_REG_ANTSEL_PATH_11N 0x878
#define ODM_REG_BB_3WIRE_11N 0x88C
#define ODM_REG_SC_CNT_11N 0x8C4
#define ODM_REG_PSD_DATA_11N 0x8B4
/* PAGE 9 */
#define ODM_REG_ANT_MAPPING1_11N 0x914
#define ODM_REG_ANT_MAPPING2_11N 0x918
/* PAGE A */
#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00
#define ODM_REG_CCK_CCA_11N 0xA0A
#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C
#define ODM_REG_CCK_ANTDIV_PARA3_11N 0xA10
#define ODM_REG_CCK_ANTDIV_PARA4_11N 0xA14
#define ODM_REG_CCK_FILTER_PARA1_11N 0xA22
#define ODM_REG_CCK_FILTER_PARA2_11N 0xA23
#define ODM_REG_CCK_FILTER_PARA3_11N 0xA24
#define ODM_REG_CCK_FILTER_PARA4_11N 0xA25
#define ODM_REG_CCK_FILTER_PARA5_11N 0xA26
#define ODM_REG_CCK_FILTER_PARA6_11N 0xA27
#define ODM_REG_CCK_FILTER_PARA7_11N 0xA28
#define ODM_REG_CCK_FILTER_PARA8_11N 0xA29
#define ODM_REG_CCK_FA_RST_11N 0xA2C
#define ODM_REG_CCK_FA_MSB_11N 0xA58
#define ODM_REG_CCK_FA_LSB_11N 0xA5C
#define ODM_REG_CCK_CCA_CNT_11N 0xA60
#define ODM_REG_BB_PWR_SAV4_11N 0xA74
/* PAGE B */
#define ODM_REG_LNA_SWITCH_11N 0xB2C
#define ODM_REG_PATH_SWITCH_11N 0xB30
#define ODM_REG_RSSI_CTRL_11N 0xB38
#define ODM_REG_CONFIG_ANTA_11N 0xB68
#define ODM_REG_RSSI_BT_11N 0xB9C
/* PAGE C */
#define ODM_REG_OFDM_FA_HOLDC_11N 0xC00
#define ODM_REG_RX_PATH_11N 0xC04
#define ODM_REG_TRMUX_11N 0xC08
#define ODM_REG_OFDM_FA_RSTC_11N 0xC0C
#define ODM_REG_RXIQI_MATRIX_11N 0xC14
#define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C
#define ODM_REG_IGI_A_11N 0xC50
#define ODM_REG_ANTDIV_PARA2_11N 0xC54
#define ODM_REG_IGI_B_11N 0xC58
#define ODM_REG_ANTDIV_PARA3_11N 0xC5C
#define ODM_REG_BB_PWR_SAV2_11N 0xC70
#define ODM_REG_RX_OFF_11N 0xC7C
#define ODM_REG_TXIQK_MATRIXA_11N 0xC80
#define ODM_REG_TXIQK_MATRIXB_11N 0xC88
#define ODM_REG_TXIQK_MATRIXA_LSB2_11N 0xC94
#define ODM_REG_TXIQK_MATRIXB_LSB2_11N 0xC9C
#define ODM_REG_RXIQK_MATRIX_LSB_11N 0xCA0
#define ODM_REG_ANTDIV_PARA1_11N 0xCA4
#define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0
/* PAGE D */
#define ODM_REG_OFDM_FA_RSTD_11N 0xD00
#define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0
#define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4
#define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8
/* PAGE E */
#define ODM_REG_TXAGC_A_6_18_11N 0xE00
#define ODM_REG_TXAGC_A_24_54_11N 0xE04
#define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08
#define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10
#define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14
#define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18
#define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C
#define ODM_REG_FPGA0_IQK_11N 0xE28
#define ODM_REG_TXIQK_TONE_A_11N 0xE30
#define ODM_REG_RXIQK_TONE_A_11N 0xE34
#define ODM_REG_TXIQK_PI_A_11N 0xE38
#define ODM_REG_RXIQK_PI_A_11N 0xE3C
#define ODM_REG_TXIQK_11N 0xE40
#define ODM_REG_RXIQK_11N 0xE44
#define ODM_REG_IQK_AGC_PTS_11N 0xE48
#define ODM_REG_IQK_AGC_RSP_11N 0xE4C
#define ODM_REG_BLUETOOTH_11N 0xE6C
#define ODM_REG_RX_WAIT_CCA_11N 0xE70
#define ODM_REG_TX_CCK_RFON_11N 0xE74
#define ODM_REG_TX_CCK_BBON_11N 0xE78
#define ODM_REG_OFDM_RFON_11N 0xE7C
#define ODM_REG_OFDM_BBON_11N 0xE80
#define ODM_REG_TX2RX_11N 0xE84
#define ODM_REG_TX2TX_11N 0xE88
#define ODM_REG_RX_CCK_11N 0xE8C
#define ODM_REG_RX_OFDM_11N 0xED0
#define ODM_REG_RX_WAIT_RIFS_11N 0xED4
#define ODM_REG_RX2RX_11N 0xED8
#define ODM_REG_STANDBY_11N 0xEDC
#define ODM_REG_SLEEP_11N 0xEE0
#define ODM_REG_PMPD_ANAEN_11N 0xEEC
/* 2 MAC REG LIST */
#define ODM_REG_BB_RST_11N 0x02
#define ODM_REG_ANTSEL_PIN_11N 0x4C
#define ODM_REG_EARLY_MODE_11N 0x4D0
#define ODM_REG_RSSI_MONITOR_11N 0x4FE
#define ODM_REG_EDCA_VO_11N 0x500
#define ODM_REG_EDCA_VI_11N 0x504
#define ODM_REG_EDCA_BE_11N 0x508
#define ODM_REG_EDCA_BK_11N 0x50C
#define ODM_REG_TXPAUSE_11N 0x522
#define ODM_REG_RESP_TX_11N 0x6D8
#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0
#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4
/* DIG Related */
#define ODM_BIT_IGI_11N 0x0000007F
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __ODM_DBG_H__
#define __ODM_DBG_H__
/* */
/* Define the debug levels */
/* */
/* 1. DBG_TRACE and DBG_LOUD are used for normal cases. */
/* So that, they can help SW engineer to develope or trace states changed */
/* and also help HW enginner to trace every operation to and from HW, */
/* e.g IO, Tx, Rx. */
/* */
/* 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases, */
/* which help us to debug SW or HW. */
/* */
/* */
/* */
/* Never used in a call to ODM_RT_TRACE()! */
/* */
#define ODM_DBG_OFF 1
/* */
/* Fatal bug. */
/* For example, Tx/Rx/IO locked up, OS hangs, memory access violation, */
/* resource allocation failed, unexpected HW behavior, HW BUG and so on. */
/* */
#define ODM_DBG_SERIOUS 2
/* */
/* Abnormal, rare, or unexpeted cases. */
/* For example, IRP/Packet/OID canceled, device suprisely unremoved and so on. */
/* */
#define ODM_DBG_WARNING 3
/* */
/* Normal case with useful information about current SW or HW state. */
/* For example, Tx/Rx descriptor to fill, Tx/Rx descriptor completed status, */
/* SW protocol state change, dynamic mechanism state change and so on. */
/* */
#define ODM_DBG_LOUD 4
/* */
/* Normal case with detail execution flow or information. */
/* */
#define ODM_DBG_TRACE 5
/* */
/* Define the tracing components */
/* */
/* */
/* BB Functions */
#define ODM_COMP_DIG BIT0
#define ODM_COMP_RA_MASK BIT1
#define ODM_COMP_DYNAMIC_TXPWR BIT2
#define ODM_COMP_FA_CNT BIT3
#define ODM_COMP_RSSI_MONITOR BIT4
#define ODM_COMP_CCK_PD BIT5
#define ODM_COMP_ANT_DIV BIT6
#define ODM_COMP_PWR_SAVE BIT7
#define ODM_COMP_PWR_TRAIN BIT8
#define ODM_COMP_RATE_ADAPTIVE BIT9
#define ODM_COMP_PATH_DIV BIT10
#define ODM_COMP_PSD BIT11
#define ODM_COMP_DYNAMIC_PRICCA BIT12
#define ODM_COMP_RXHP BIT13
/* MAC Functions */
#define ODM_COMP_EDCA_TURBO BIT16
#define ODM_COMP_EARLY_MODE BIT17
/* RF Functions */
#define ODM_COMP_TX_PWR_TRACK BIT24
#define ODM_COMP_RX_GAIN_TRACK BIT25
#define ODM_COMP_CALIBRATION BIT26
/* Common Functions */
#define ODM_COMP_COMMON BIT30
#define ODM_COMP_INIT BIT31
/*------------------------Export Macro Definition---------------------------*/
#define DbgPrint printk
#define RT_PRINTK(fmt, args...) DbgPrint("%s(): " fmt, __func__, ## args);
#ifndef ASSERT
#define ASSERT(expr)
#endif
#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) \
if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \
{ \
DbgPrint("[ODM-8723A] "); \
RT_PRINTK fmt; \
}
#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) \
if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \
{ \
RT_PRINTK fmt; \
}
#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) \
if(!(expr)) { \
DbgPrint("Assertion failed! %s at ......\n", #expr); \
DbgPrint(" ......%s,%s,line=%d\n", __FILE__, __func__, __LINE__);\
RT_PRINTK fmt; \
ASSERT(false); \
}
#define ODM_dbg_enter() { DbgPrint("==> %s\n", __func__); }
#define ODM_dbg_exit() { DbgPrint("<== %s\n", __func__); }
#define ODM_dbg_trace(str) { DbgPrint("%s:%s\n", __func__, str); }
#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) \
if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel){ \
int __i; \
u8 * __ptr = (u8 *)ptr; \
DbgPrint("[ODM] "); \
DbgPrint(title_str); \
DbgPrint(" "); \
for (__i=0; __i < 6; __i++) \
DbgPrint("%02X%s", __ptr[__i], (__i == 5) ? "" : "-"); \
DbgPrint("\n"); \
}
void ODM_InitDebugSetting23a(struct dm_odm_t *pDM_Odm);
#endif /* __ODM_DBG_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __ODM_INTERFACE_H__
#define __ODM_INTERFACE_H__
/* */
/* =========== Constant/Structure/Enum/... Define */
/* */
/* */
/* =========== Macro Define */
/* */
#define _reg_all(_name) ODM_##_name
#define _reg_ic(_name, _ic) ODM_##_name##_ic
#define _bit_all(_name) BIT_##_name
#define _bit_ic(_name, _ic) BIT_##_name##_ic
/* _cat: implemented by Token-Pasting Operator. */
/*===================================
#define ODM_REG_DIG_11N 0xC50
#define ODM_REG_DIG_11AC 0xDDD
ODM_REG(DIG,_pDM_Odm)
=====================================*/
#define _reg_11N(_name) ODM_REG_##_name##_11N
#define _reg_11AC(_name) ODM_REG_##_name##_11AC
#define _bit_11N(_name) ODM_BIT_##_name##_11N
#define _bit_11AC(_name) ODM_BIT_##_name##_11AC
#define _cat(_name, _ic_type, _func) \
( \
((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \
_func##_11AC(_name) \
)
/* _name: name of register or bit. */
/* Example: "ODM_REG(R_A_AGC_CORE1, pDM_Odm)" */
/* gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", depends on SupportICType. */
#define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg)
#define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit)
/* */
/* 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem. */
/* Suggest HW team to use thread instead of workitem. Windows also support the feature. */
/* */
typedef void (*RT_WORKITEM_CALL_BACK)(struct work_struct *pContext);
/* */
/* =========== Extern Variable ??? It should be forbidden. */
/* */
/* */
/* =========== EXtern Function Prototype */
/* */
u8 ODM_Read1Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr);
u16 ODM_Read2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr);
u32 ODM_Read4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr);
void ODM_Write1Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u8 Data);
void ODM_Write2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u16 Data);
void ODM_Write4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 Data);
void ODM_SetMACReg(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data);
u32 ODM_GetMACReg(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 BitMask);
void ODM_SetBBReg(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data);
u32 ODM_GetBBReg(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 BitMask);
void ODM_SetRFReg(struct dm_odm_t *pDM_Odm, enum RF_RADIO_PATH eRFPath,
u32 RegAddr, u32 BitMask, u32 Data);
u32 ODM_GetRFReg(struct dm_odm_t *pDM_Odm, enum RF_RADIO_PATH eRFPath,
u32 RegAddr, u32 BitMask);
/* Memory Relative Function. */
void ODM_AllocateMemory(struct dm_odm_t *pDM_Odm, void **pPtr, u32 length);
void ODM_FreeMemory(struct dm_odm_t *pDM_Odm, void *pPtr, u32 length);
s32 ODM_CompareMemory(struct dm_odm_t *pDM_Odm, void *pBuf1, void *pBuf2, u32 length);
/* ODM MISC-spin lock relative API. */
void ODM_AcquireSpinLock(struct dm_odm_t *pDM_Odm, enum rt_spinlock_type type);
void ODM_ReleaseSpinLock(struct dm_odm_t *pDM_Odm, enum rt_spinlock_type type);
/* ODM MISC-workitem relative API. */
void ODM_InitializeWorkItem(struct dm_odm_t *pDM_Odm, void *pRtWorkItem,
RT_WORKITEM_CALL_BACK RtWorkItemCallback, void *pContext, const char *szID);
/* ODM Timer relative API. */
void ODM_SetTimer(struct dm_odm_t *pDM_Odm, struct timer_list *pTimer, u32 msDelay);
void ODM_ReleaseTimer(struct dm_odm_t *pDM_Odm, struct timer_list *pTimer);
/* ODM FW relative API. */
u32 ODM_FillH2CCmd(u8 *pH2CBuffer, u32 H2CBufferLen, u32 CmdNum,
u32 *pElementID, u32 *pCmdLen, u8 **pCmbBuffer,
u8 *CmdStartSeq);
#endif /* __ODM_INTERFACE_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __ODM_PRECOMP_H__
#define __ODM_PRECOMP_H__
#include "odm_types.h"
#define TEST_FALG___ 1
/* 2 Config Flags and Structs - defined by each ODM Type */
#include <osdep_service.h>
#include <drv_types.h>
#include <hal_intf.h>
/* 2 Hardware Parameter Files */
#include "Hal8723UHWImg_CE.h"
/* 2 OutSrc Header Files */
#include "odm.h"
#include "odm_HWConfig.h"
#include "odm_debug.h"
#include "odm_RegDefine11AC.h"
#include "odm_RegDefine11N.h"
#include "HalDMOutSrc8723A.h" /* for IQK,LCK,Power-tracking */
#include "rtl8723a_hal.h"
#include "odm_interface.h"
#include "odm_reg.h"
#include "HalHWImg8723A_MAC.h"
#include "HalHWImg8723A_RF.h"
#include "HalHWImg8723A_BB.h"
#include "HalHWImg8723A_FW.h"
#include "odm_RegConfig8723A.h"
#endif /* __ODM_PRECOMP_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
/* */
/* File Name: odm_reg.h */
/* */
/* Description: */
/* */
/* This file is for general register definition. */
/* */
/* */
/* */
#ifndef __HAL_ODM_REG_H__
#define __HAL_ODM_REG_H__
/* */
/* Register Definition */
/* */
/* MAC REG */
#define ODM_BB_RESET 0x002
#define ODM_DUMMY 0x4fe
#define ODM_EDCA_VO_PARAM 0x500
#define ODM_EDCA_VI_PARAM 0x504
#define ODM_EDCA_BE_PARAM 0x508
#define ODM_EDCA_BK_PARAM 0x50C
#define ODM_TXPAUSE 0x522
/* BB REG */
#define ODM_FPGA_PHY0_PAGE8 0x800
#define ODM_PSD_SETTING 0x808
#define ODM_AFE_SETTING 0x818
#define ODM_TXAGC_B_6_18 0x830
#define ODM_TXAGC_B_24_54 0x834
#define ODM_TXAGC_B_MCS32_5 0x838
#define ODM_TXAGC_B_MCS0_MCS3 0x83c
#define ODM_TXAGC_B_MCS4_MCS7 0x848
#define ODM_TXAGC_B_MCS8_MCS11 0x84c
#define ODM_ANALOG_REGISTER 0x85c
#define ODM_RF_INTERFACE_OUTPUT 0x860
#define ODM_TXAGC_B_MCS12_MCS15 0x868
#define ODM_TXAGC_B_11_A_2_11 0x86c
#define ODM_AD_DA_LSB_MASK 0x874
#define ODM_ENABLE_3_WIRE 0x88c
#define ODM_PSD_REPORT 0x8b4
#define ODM_R_ANT_SELECT 0x90c
#define ODM_CCK_ANT_SELECT 0xa07
#define ODM_CCK_PD_THRESH 0xa0a
#define ODM_CCK_RF_REG1 0xa11
#define ODM_CCK_MATCH_FILTER 0xa20
#define ODM_CCK_RAKE_MAC 0xa2e
#define ODM_CCK_CNT_RESET 0xa2d
#define ODM_CCK_TX_DIVERSITY 0xa2f
#define ODM_CCK_FA_CNT_MSB 0xa5b
#define ODM_CCK_FA_CNT_LSB 0xa5c
#define ODM_CCK_NEW_FUNCTION 0xa75
#define ODM_OFDM_PHY0_PAGE_C 0xc00
#define ODM_OFDM_RX_ANT 0xc04
#define ODM_R_A_RXIQI 0xc14
#define ODM_R_A_AGC_CORE1 0xc50
#define ODM_R_A_AGC_CORE2 0xc54
#define ODM_R_B_AGC_CORE1 0xc58
#define ODM_R_AGC_PAR 0xc70
#define ODM_R_HTSTF_AGC_PAR 0xc7c
#define ODM_TX_PWR_TRAINING_A 0xc90
#define ODM_TX_PWR_TRAINING_B 0xc98
#define ODM_OFDM_FA_CNT1 0xcf0
#define ODM_OFDM_PHY0_PAGE_D 0xd00
#define ODM_OFDM_FA_CNT2 0xda0
#define ODM_OFDM_FA_CNT3 0xda4
#define ODM_OFDM_FA_CNT4 0xda8
#define ODM_TXAGC_A_6_18 0xe00
#define ODM_TXAGC_A_24_54 0xe04
#define ODM_TXAGC_A_1_MCS32 0xe08
#define ODM_TXAGC_A_MCS0_MCS3 0xe10
#define ODM_TXAGC_A_MCS4_MCS7 0xe14
#define ODM_TXAGC_A_MCS8_MCS11 0xe18
#define ODM_TXAGC_A_MCS12_MCS15 0xe1c
/* RF REG */
#define ODM_GAIN_SETTING 0x00
#define ODM_CHANNEL 0x18
/* Ant Detect Reg */
#define ODM_DPDT 0x300
/* PSD Init */
#define ODM_PSDREG 0x808
/* 92D Path Div */
#define PATHDIV_REG 0xB30
#define PATHDIV_TRI 0xBA0
/* */
/* Bitmap Definition */
/* */
#define BIT_FA_RESET BIT0
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __ODM_TYPES_H__
#define __ODM_TYPES_H__
/* Define Different SW team support */
enum hal_status {
HAL_STATUS_SUCCESS,
HAL_STATUS_FAILURE,
};
enum rt_spinlock_type {
RT_TEMP =1,
};
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
#endif /* __ODM_TYPES_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __OSDEP_INTF_H_
#define __OSDEP_INTF_H_
#include <osdep_service.h>
#include <drv_types.h>
int rtw_hw_suspend23a(struct rtw_adapter *padapter);
int rtw_hw_resume23a(struct rtw_adapter *padapter);
u8 rtw_init_drv_sw23a(struct rtw_adapter *padapter);
u8 rtw_free_drv_sw23a(struct rtw_adapter *padapter);
u8 rtw_reset_drv_sw23a(struct rtw_adapter *padapter);
u32 rtw_start_drv_threads23a(struct rtw_adapter *padapter);
void rtw_stop_drv_threads23a (struct rtw_adapter *padapter);
void rtw_cancel_all_timer23a(struct rtw_adapter *padapter);
int rtw_init_netdev23a_name23a(struct net_device *pnetdev, const char *ifname);
struct net_device *rtw_init_netdev23a(struct rtw_adapter *padapter);
u16 rtw_recv_select_queue23a(struct sk_buff *skb);
void rtw_ips_dev_unload23a(struct rtw_adapter *padapter);
int rtw_ips_pwr_up23a(struct rtw_adapter *padapter);
void rtw_ips_pwr_down23a(struct rtw_adapter *padapter);
int rtw_drv_register_netdev(struct rtw_adapter *padapter);
void rtw_ndev_destructor(struct net_device *ndev);
#endif /* _OSDEP_INTF_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __OSDEP_SERVICE_H_
#define __OSDEP_SERVICE_H_
#define _FAIL 0
#define _SUCCESS 1
#define RTW_RX_HANDLED 2
#include <linux/version.h>
#include <linux/spinlock.h>
#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/kref.h>
#include <linux/netdevice.h>
#include <linux/skbuff.h>
#include <linux/circ_buf.h>
#include <asm/uaccess.h>
#include <asm/byteorder.h>
#include <asm/atomic.h>
#include <asm/io.h>
#include <linux/semaphore.h>
#include <linux/sem.h>
#include <linux/sched.h>
#include <linux/etherdevice.h>
#include <linux/wireless.h>
#include <net/iw_handler.h>
#include <linux/if_arp.h>
#include <linux/rtnetlink.h>
#include <linux/delay.h>
#include <linux/proc_fs.h> /* Necessary because we use the proc fs */
#include <linux/interrupt.h> /* for struct tasklet_struct */
#include <linux/ip.h>
#include <linux/kthread.h>
/* #include <linux/ieee80211.h> */
#include <net/ieee80211_radiotap.h>
#include <net/cfg80211.h>
#include <linux/usb.h>
#include <linux/usb/ch9.h>
struct rtw_adapter;
struct c2h_evt_hdr;
typedef s32 (*c2h_id_filter)(u8 id);
struct rtw_queue {
struct list_head queue;
spinlock_t lock;
};
static inline struct list_head *get_list_head(struct rtw_queue *queue)
{
return (&queue->queue);
}
static inline int rtw_netif_queue_stopped(struct net_device *pnetdev)
{
return (netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) &&
netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 1)) &&
netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 2)) &&
netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3)) );
}
#ifndef BIT
#define BIT(x) ( 1 << (x))
#endif
static inline u32 CHKBIT(u32 x)
{
WARN_ON(x >= 32);
if (x >= 32)
return 0;
return BIT(x);
}
#define BIT0 0x00000001
#define BIT1 0x00000002
#define BIT2 0x00000004
#define BIT3 0x00000008
#define BIT4 0x00000010
#define BIT5 0x00000020
#define BIT6 0x00000040
#define BIT7 0x00000080
#define BIT8 0x00000100
#define BIT9 0x00000200
#define BIT10 0x00000400
#define BIT11 0x00000800
#define BIT12 0x00001000
#define BIT13 0x00002000
#define BIT14 0x00004000
#define BIT15 0x00008000
#define BIT16 0x00010000
#define BIT17 0x00020000
#define BIT18 0x00040000
#define BIT19 0x00080000
#define BIT20 0x00100000
#define BIT21 0x00200000
#define BIT22 0x00400000
#define BIT23 0x00800000
#define BIT24 0x01000000
#define BIT25 0x02000000
#define BIT26 0x04000000
#define BIT27 0x08000000
#define BIT28 0x10000000
#define BIT29 0x20000000
#define BIT30 0x40000000
#define BIT31 0x80000000
#define BIT32 0x0100000000
#define BIT33 0x0200000000
#define BIT34 0x0400000000
#define BIT35 0x0800000000
#define BIT36 0x1000000000
int RTW_STATUS_CODE23a(int error_code);
u8* _rtw_vmalloc(u32 sz);
u8* _rtw_zvmalloc(u32 sz);
void _rtw_vmfree(u8 *pbuf, u32 sz);
#define rtw_vmalloc(sz) _rtw_vmalloc((sz))
#define rtw_zvmalloc(sz) _rtw_zvmalloc((sz))
#define rtw_vmfree(pbuf, sz) _rtw_vmfree((pbuf), (sz))
extern unsigned char REALTEK_96B_IE23A[];
extern unsigned char MCS_rate_2R23A[16];
extern unsigned char RTW_WPA_OUI23A[];
extern unsigned char WPA_TKIP_CIPHER23A[4];
extern unsigned char RSN_TKIP_CIPHER23A[4];
extern unsigned char MCS_rate_2R23A[16];
extern unsigned char MCS_rate_1R23A[16];
void _rtw_init_queue23a(struct rtw_queue *pqueue);
u32 _rtw_queue_empty23a(struct rtw_queue *pqueue);
u32 rtw_get_current_time(void);
u32 rtw_systime_to_ms23a(u32 systime);
u32 rtw_ms_to_systime23a(u32 ms);
s32 rtw_get_passing_time_ms23a(u32 start);
s32 rtw_get_time_interval_ms23a(u32 start, u32 end);
#define _RND(sz, r) ((((sz)+((r)-1))/(r))*(r))
#define RND4(x) (((x >> 2) + (((x & 3) == 0) ? 0: 1)) << 2)
static inline u32 _RND4(u32 sz)
{
u32 val;
val = ((sz >> 2) + ((sz & 3) ? 1: 0)) << 2;
return val;
}
static inline u32 _RND8(u32 sz)
{
u32 val;
val = ((sz >> 3) + ((sz & 7) ? 1: 0)) << 3;
return val;
}
static inline u32 _RND128(u32 sz)
{
u32 val;
val = ((sz >> 7) + ((sz & 127) ? 1: 0)) << 7;
return val;
}
static inline u32 _RND256(u32 sz)
{
u32 val;
val = ((sz >> 8) + ((sz & 255) ? 1: 0)) << 8;
return val;
}
static inline u32 _RND512(u32 sz)
{
u32 val;
val = ((sz >> 9) + ((sz & 511) ? 1: 0)) << 9;
return val;
}
static inline u32 bitshift(u32 bitmask)
{
u32 i;
for (i = 0; i <= 31; i++)
if (((bitmask>>i) & 0x1) == 1) break;
return i;
}
#define STRUCT_PACKED __attribute__ ((packed))
/* limitation of path length */
#define PATH_LENGTH_MAX PATH_MAX
void rtw_suspend_lock_init(void);
void rtw_suspend_lock_uninit(void);
void rtw_lock_suspend(void);
void rtw_unlock_suspend(void);
/* File operation APIs, just for linux now */
int rtw_is_file_readable(char *path);
int rtw_retrive_from_file(char *path, u8* buf, u32 sz);
int rtw_store_to_file(char *path, u8* buf, u32 sz);
#define NDEV_FMT "%s"
#define NDEV_ARG(ndev) ndev->name
#define ADPT_FMT "%s"
#define ADPT_ARG(adapter) adapter->pnetdev->name
#define FUNC_NDEV_FMT "%s(%s)"
#define FUNC_NDEV_ARG(ndev) __func__, ndev->name
#define FUNC_ADPT_FMT "%s(%s)"
#define FUNC_ADPT_ARG(adapter) __func__, adapter->pnetdev->name
#define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)),(sig), 1)
u64 rtw_modular6423a(u64 x, u64 y);
u64 rtw_division6423a(u64 x, u64 y);
/* Macros for handling unaligned memory accesses */
#define RTW_GET_BE16(a) ((u16) (((a)[0] << 8) | (a)[1]))
#define RTW_PUT_BE16(a, val) \
do { \
(a)[0] = ((u16) (val)) >> 8; \
(a)[1] = ((u16) (val)) & 0xff; \
} while (0)
#define RTW_GET_LE16(a) ((u16) (((a)[1] << 8) | (a)[0]))
#define RTW_PUT_LE16(a, val) \
do { \
(a)[1] = ((u16) (val)) >> 8; \
(a)[0] = ((u16) (val)) & 0xff; \
} while (0)
#define RTW_GET_BE24(a) ((((u32) (a)[0]) << 16) | (((u32) (a)[1]) << 8) | \
((u32) (a)[2]))
#define RTW_PUT_BE24(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[2] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \
(((u32) (a)[2]) << 8) | ((u32) (a)[3]))
#define RTW_PUT_BE32(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[3] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_LE32(a) ((((u32) (a)[3]) << 24) | (((u32) (a)[2]) << 16) | \
(((u32) (a)[1]) << 8) | ((u32) (a)[0]))
#define RTW_PUT_LE32(a, val) \
do { \
(a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[0] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_BE64(a) ((((u64) (a)[0]) << 56) | (((u64) (a)[1]) << 48) | \
(((u64) (a)[2]) << 40) | (((u64) (a)[3]) << 32) | \
(((u64) (a)[4]) << 24) | (((u64) (a)[5]) << 16) | \
(((u64) (a)[6]) << 8) | ((u64) (a)[7]))
#define RTW_PUT_BE64(a, val) \
do { \
(a)[0] = (u8) (((u64) (val)) >> 56); \
(a)[1] = (u8) (((u64) (val)) >> 48); \
(a)[2] = (u8) (((u64) (val)) >> 40); \
(a)[3] = (u8) (((u64) (val)) >> 32); \
(a)[4] = (u8) (((u64) (val)) >> 24); \
(a)[5] = (u8) (((u64) (val)) >> 16); \
(a)[6] = (u8) (((u64) (val)) >> 8); \
(a)[7] = (u8) (((u64) (val)) & 0xff); \
} while (0)
#define RTW_GET_LE64(a) ((((u64) (a)[7]) << 56) | (((u64) (a)[6]) << 48) | \
(((u64) (a)[5]) << 40) | (((u64) (a)[4]) << 32) | \
(((u64) (a)[3]) << 24) | (((u64) (a)[2]) << 16) | \
(((u64) (a)[1]) << 8) | ((u64) (a)[0]))
struct rtw_cbuf {
u32 write;
u32 read;
u32 size;
void *bufs[0];
};
bool rtw_cbuf_full23a(struct rtw_cbuf *cbuf);
bool rtw_cbuf_empty23a(struct rtw_cbuf *cbuf);
bool rtw_cbuf_push23a(struct rtw_cbuf *cbuf, void *buf);
void *rtw_cbuf_pop23a(struct rtw_cbuf *cbuf);
struct rtw_cbuf *rtw_cbuf_alloc23a(u32 size);
void rtw_cbuf_free(struct rtw_cbuf *cbuf);
int rtw_change_ifname(struct rtw_adapter *padapter, const char *ifname);
s32 c2h_evt_hdl(struct rtw_adapter *adapter, struct c2h_evt_hdr *c2h_evt, c2h_id_filter filter);
void indicate_wx_scan_complete_event(struct rtw_adapter *padapter);
u8 rtw_do_join23a(struct rtw_adapter *padapter);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RECV_OSDEP_H_
#define __RECV_OSDEP_H_
#include <osdep_service.h>
#include <drv_types.h>
int _rtw_init_recv_priv23a(struct recv_priv *precvpriv, struct rtw_adapter *padapter);
void _rtw_free_recv_priv23a (struct recv_priv *precvpriv);
int rtw_recv_entry23a(struct recv_frame *precv_frame);
int rtw_recv_indicatepkt23a(struct rtw_adapter *adapter, struct recv_frame *precv_frame);
void rtw_recv_returnpacket(struct net_device *cnxt, struct sk_buff *preturnedpkt);
void rtw_hostapd_mlme_rx23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
void rtw_handle_tkip_mic_err23a(struct rtw_adapter *padapter, u8 bgroup);
int rtw_init_recv_priv(struct recv_priv *precvpriv, struct rtw_adapter *padapter);
void rtw_free_recv_priv (struct recv_priv *precvpriv);
int rtw_os_recv_resource_init(struct recv_priv *precvpriv, struct rtw_adapter *padapter);
int rtw_os_recv_resource_alloc23a(struct rtw_adapter *padapter, struct recv_frame *precvframe);
void rtw_os_recv_resource_free(struct recv_priv *precvpriv);
int rtw_os_recvbuf_resource_alloc23a(struct rtw_adapter *padapter, struct recv_buf *precvbuf);
int rtw_os_recvbuf_resource_free23a(struct rtw_adapter *padapter, struct recv_buf *precvbuf);
void rtw_os_read_port23a(struct rtw_adapter *padapter, struct recv_buf *precvbuf);
void rtw_init_recv_timer23a(struct recv_reorder_ctrl *preorder_ctrl);
#endif

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drivers/staging/rtl8723au/include/rtl8723a_bt-coexist.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTL8723A_CMD_H__
#define __RTL8723A_CMD_H__
#define H2C_BT_FW_PATCH_LEN 3
#define H2C_BT_PWR_FORCE_LEN 3
enum cmd_msg_element_id
{
NONE_CMDMSG_EID,
AP_OFFLOAD_EID = 0,
SET_PWRMODE_EID = 1,
JOINBSS_RPT_EID = 2,
RSVD_PAGE_EID = 3,
RSSI_4_EID = 4,
RSSI_SETTING_EID = 5,
MACID_CONFIG_EID = 6,
MACID_PS_MODE_EID = 7,
P2P_PS_OFFLOAD_EID = 8,
SELECTIVE_SUSPEND_ROF_CMD = 9,
BT_QUEUE_PKT_EID = 17,
BT_ANT_TDMA_EID = 20,
BT_2ANT_HID_EID = 21,
P2P_PS_CTW_CMD_EID = 32,
FORCE_BT_TX_PWR_EID = 33,
SET_TDMA_WLAN_ACT_TIME_EID = 34,
SET_BT_TX_RETRY_INDEX_EID = 35,
HID_PROFILE_ENABLE_EID = 36,
BT_IGNORE_WLAN_ACT_EID = 37,
BT_PTA_MANAGER_UPDATE_ENABLE_EID = 38,
DAC_SWING_VALUE_EID = 41,
TRADITIONAL_TDMA_EN_EID = 51,
H2C_BT_FW_PATCH = 54,
B_TYPE_TDMA_EID = 58,
SCAN_EN_EID = 59,
LOWPWR_LPS_EID = 71,
H2C_RESET_TSF = 75,
MAX_CMDMSG_EID
};
struct cmd_msg_parm {
u8 eid; /* element id */
u8 sz; /* sz */
u8 buf[6];
};
struct setpwrmode_parm {
u8 Mode;
u8 SmartPS;
u8 AwakeInterval; /* unit: beacon interval */
u8 bAllQueueUAPSD;
#define SETPM_LOWRXBCN BIT(0)
#define SETPM_AUTOANTSWITCH BIT(1)
#define SETPM_PSALLOWBTHIGHPRI BIT(2)
u8 BcnAntMode;
} __packed;
struct H2C_SS_RFOFF_PARAM{
u8 ROFOn; /* 1: on, 0:off */
u16 gpio_period; /* unit: 1024 us */
}__attribute__ ((packed));
struct joinbssrpt_parm {
u8 OpMode; /* enum rt_media_status */
};
struct rsvdpage_loc {
u8 LocProbeRsp;
u8 LocPsPoll;
u8 LocNullData;
u8 LocQosNull;
u8 LocBTQosNull;
};
struct P2P_PS_Offload_t {
u8 Offload_En:1;
u8 role:1; /* 1: Owner, 0: Client */
u8 CTWindow_En:1;
u8 NoA0_En:1;
u8 NoA1_En:1;
u8 AllStaSleep:1; /* Only valid in Owner */
u8 discovery:1;
u8 rsvd:1;
};
struct P2P_PS_CTWPeriod_t {
u8 CTWPeriod; /* TU */
};
#define B_TDMA_EN BIT(0)
#define B_TDMA_FIXANTINBT BIT(1)
#define B_TDMA_TXPSPOLL BIT(2)
#define B_TDMA_VAL870 BIT(3)
#define B_TDMA_AUTOWAKEUP BIT(4)
#define B_TDMA_NOPS BIT(5)
#define B_TDMA_WLANHIGHPRI BIT(6)
struct b_type_tdma_parm {
u8 option;
u8 TBTTOnPeriod;
u8 MedPeriod;
u8 rsvd30;
} __packed;
struct scan_en_parm {
u8 En;
} __packed;
/* BT_PWR */
#define SET_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value)
/* BT_FW_PATCH */
#define SET_H2CCMD_BT_FW_PATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_4BYTE(__pH2CCmd, 0, 8, __Value) /* SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) */
#define SET_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_4BYTE(__pH2CCmd, 8, 16, __Value) /* SET_BITS_TO_LE_2BYTE((__pH2CCmd)+1, 0, 16, __Value) */
struct lowpwr_lps_parm{
u8 bcn_count:4;
u8 tb_bcn_threshold:3;
u8 enable:1;
u8 bcn_interval;
u8 drop_threshold;
u8 max_early_period;
u8 max_bcn_timeout_period;
} __packed;
/* host message to firmware cmd */
void rtl8723a_set_FwPwrMode_cmd(struct rtw_adapter * padapter, u8 Mode);
void rtl8723a_set_FwJoinBssReport_cmd(struct rtw_adapter * padapter, u8 mstatus);
#ifdef CONFIG_8723AU_BT_COEXIST
void rtl8723a_set_BTCoex_AP_mode_FwRsvdPkt_cmd(struct rtw_adapter * padapter);
#endif
u8 rtl8723a_set_rssi_cmd(struct rtw_adapter * padapter, u8 *param);
u8 rtl8723a_set_raid_cmd(struct rtw_adapter * padapter, u32 mask, u8 arg);
void rtl8723a_add_rateatid(struct rtw_adapter * padapter, u32 bitmap, u8 arg, u8 rssi_level);
#ifdef CONFIG_8723AU_P2P
void rtl8723a_set_p2p_ps_offload_cmd(struct rtw_adapter * padapter, u8 p2p_ps_state);
#endif /* CONFIG_8723AU_P2P */
void CheckFwRsvdPageContent23a(struct rtw_adapter *padapter);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTL8723A_DM_H__
#define __RTL8723A_DM_H__
/* */
/* Description: */
/* */
/* This file is for 8723A dynamic mechanism only */
/* */
/* */
/* */
#define DYNAMIC_FUNC_BT BIT(0)
enum{
UP_LINK,
DOWN_LINK,
};
/* */
/* structure and define */
/* */
/* duplicate code,will move to ODM ######### */
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM 9
#define HP_THERMAL_NUM 8
/* duplicate code,will move to ODM ######### */
struct dm_priv
{
u8 DM_Type;
u8 DMFlag;
u8 InitDMFlag;
u32 InitODMFlag;
/* Upper and Lower Signal threshold for Rate Adaptive*/
int UndecoratedSmoothedPWDB;
int UndecoratedSmoothedCCK;
int EntryMinUndecoratedSmoothedPWDB;
int EntryMaxUndecoratedSmoothedPWDB;
int MinUndecoratedPWDBForDM;
int LastMinUndecoratedPWDBForDM;
s32 UndecoratedSmoothedBeacon;
#ifdef CONFIG_8723AU_BT_COEXIST
s32 BT_EntryMinUndecoratedSmoothedPWDB;
s32 BT_EntryMaxUndecoratedSmoothedPWDB;
#endif
/* for High Power */
u8 bDynamicTxPowerEnable;
u8 LastDTPLvl;
u8 DynamicTxHighPowerLvl;/* Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 */
/* for tx power tracking */
u8 bTXPowerTracking;
u8 TXPowercount;
u8 bTXPowerTrackingInit;
u8 TxPowerTrackControl; /* for mp mode, turn off txpwrtracking as default */
u8 TM_Trigger;
u8 ThermalMeter[2]; /* ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 */
u8 ThermalValue;
u8 ThermalValue_LCK;
u8 ThermalValue_IQK;
u8 ThermalValue_DPK;
u8 bRfPiEnable;
/* for APK */
u32 APKoutput[2][2]; /* path A/B; output1_1a/output1_2a */
u8 bAPKdone;
u8 bAPKThermalMeterIgnore;
u8 bDPdone;
u8 bDPPathAOK;
u8 bDPPathBOK;
/* for IQK */
u32 RegC04;
u32 Reg874;
u32 RegC08;
u32 RegB68;
u32 RegB6C;
u32 Reg870;
u32 Reg860;
u32 Reg864;
u32 ADDA_backup[IQK_ADDA_REG_NUM];
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
u32 IQK_BB_backup_recover[9];
u32 IQK_BB_backup[IQK_BB_REG_NUM];
u8 PowerIndex_backup[6];
u8 bCCKinCH14;
u8 CCK_index;
u8 OFDM_index[2];
u8 bDoneTxpower;
u8 CCK_index_HP;
u8 OFDM_index_HP[2];
u8 ThermalValue_HP[HP_THERMAL_NUM];
u8 ThermalValue_HP_index;
/* for TxPwrTracking */
s32 RegE94;
s32 RegE9C;
s32 RegEB4;
s32 RegEBC;
u32 TXPowerTrackingCallbackCnt; /* cosa add for debug */
u32 prv_traffic_idx; /* edca turbo */
s32 OFDM_Pkt_Cnt;
u8 RSSI_Select;
/* u8 DIG_Dynamic_MIN ; */
/* duplicate code,will move to ODM ######### */
/* Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas */
u8 INIDATA_RATE[32];
};
/* */
/* function prototype */
/* */
void rtl8723a_init_dm_priv(struct rtw_adapter *padapter);
void rtl8723a_deinit_dm_priv(struct rtw_adapter *padapter);
void rtl8723a_InitHalDm(struct rtw_adapter *padapter);
void rtl8723a_HalDmWatchDog(struct rtw_adapter *padapter);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTL8723A_HAL_H__
#define __RTL8723A_HAL_H__
#include "rtl8723a_spec.h"
#include "rtl8723a_pg.h"
#include "Hal8723APhyReg.h"
#include "Hal8723APhyCfg.h"
#include "rtl8723a_rf.h"
#ifdef CONFIG_8723AU_BT_COEXIST
#include "rtl8723a_bt-coexist.h"
#endif
#include "rtl8723a_dm.h"
#include "rtl8723a_recv.h"
#include "rtl8723a_xmit.h"
#include "rtl8723a_cmd.h"
#include "rtl8723a_sreset.h"
#include "rtw_efuse.h"
#include "odm_precomp.h"
/* 2TODO: We should define 8192S firmware related macro settings here!! */
#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
#define RTL819X_TOTAL_RF_PATH 2
/* TODO: The following need to check!! */
#define RTL8723_FW_UMC_IMG "rtl8192CU\\rtl8723fw.bin"
#define RTL8723_FW_UMC_B_IMG "rtl8192CU\\rtl8723fw_B.bin"
#define RTL8723_PHY_REG "rtl8723S\\PHY_REG_1T.txt"
#define RTL8723_PHY_RADIO_A "rtl8723S\\radio_a_1T.txt"
#define RTL8723_PHY_RADIO_B "rtl8723S\\radio_b_1T.txt"
#define RTL8723_AGC_TAB "rtl8723S\\AGC_TAB_1T.txt"
#define RTL8723_PHY_MACREG "rtl8723S\\MAC_REG.txt"
#define RTL8723_PHY_REG_PG "rtl8723S\\PHY_REG_PG.txt"
#define RTL8723_PHY_REG_MP "rtl8723S\\PHY_REG_MP.txt"
/* */
/* RTL8723S From header */
/* */
/* Fw Array */
#define Rtl8723_FwImageArray Rtl8723UFwImgArray
#define Rtl8723_FwUMCBCutImageArrayWithBT Rtl8723UFwUMCBCutImgArrayWithBT
#define Rtl8723_FwUMCBCutImageArrayWithoutBT Rtl8723UFwUMCBCutImgArrayWithoutBT
#define Rtl8723_ImgArrayLength Rtl8723UImgArrayLength
#define Rtl8723_UMCBCutImgArrayWithBTLength Rtl8723UUMCBCutImgArrayWithBTLength
#define Rtl8723_UMCBCutImgArrayWithoutBTLength Rtl8723UUMCBCutImgArrayWithoutBTLength
#define Rtl8723_PHY_REG_Array_PG Rtl8723UPHY_REG_Array_PG
#define Rtl8723_PHY_REG_Array_PGLength Rtl8723UPHY_REG_Array_PGLength
#define Rtl8723_FwUMCBCutMPImageArray Rtl8723SFwUMCBCutMPImgAr
#define Rtl8723_UMCBCutMPImgArrayLength Rtl8723SUMCBCutMPImgArrayLength
#define DRVINFO_SZ 4 /* unit is 8bytes */
#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0))
#define FW_8723A_SIZE 0x8000
#define FW_8723A_START_ADDRESS 0x1000
#define FW_8723A_END_ADDRESS 0x1FFF /* 0x5FFF */
#define MAX_PAGE_SIZE 4096 /* @ page : 4k bytes */
#define IS_FW_HEADER_EXIST(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300)
/* */
/* This structure must be cared byte-ordering */
/* */
/* Added by tynli. 2009.12.04. */
struct rt_8723a_firmware_hdr {
/* 8-byte alinment required */
/* LONG WORD 0 ---- */
u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */
u8 Category; /* AP/NIC and USB/PCI */
u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */
u16 Version; /* FW Version */
u8 Subversion; /* FW Subversion, default 0x00 */
u16 Rsvd1;
/* LONG WORD 1 ---- */
u8 Month; /* Release time Month field */
u8 Date; /* Release time Date field */
u8 Hour; /* Release time Hour field */
u8 Minute; /* Release time Minute field */
u16 RamCodeSize; /* The size of RAM code */
u16 Rsvd2;
/* LONG WORD 2 ---- */
u32 SvnIdx; /* The SVN entry index */
u32 Rsvd3;
/* LONG WORD 3 ---- */
u32 Rsvd4;
u32 Rsvd5;
};
#define DRIVER_EARLY_INT_TIME 0x05
#define BCN_DMA_ATIME_INT_TIME 0x02
/* BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON. */
#define MAX_TX_QUEUE 9
#define TX_SELE_HQ BIT(0) /* High Queue */
#define TX_SELE_LQ BIT(1) /* Low Queue */
#define TX_SELE_NQ BIT(2) /* Normal Queue */
/* Note: We will divide number of page equally for each queue other than public queue! */
#define TX_TOTAL_PAGE_NUMBER 0xF8
#define TX_PAGE_BOUNDARY (TX_TOTAL_PAGE_NUMBER + 1)
/* For Normal Chip Setting */
/* (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER */
#define NORMAL_PAGE_NUM_PUBQ 0xE7
#define NORMAL_PAGE_NUM_HPQ 0x0C
#define NORMAL_PAGE_NUM_LPQ 0x02
#define NORMAL_PAGE_NUM_NPQ 0x02
/* For Test Chip Setting */
/* (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER */
#define TEST_PAGE_NUM_PUBQ 0x7E
/* For Test Chip Setting */
#define WMM_TEST_TX_TOTAL_PAGE_NUMBER 0xF5
#define WMM_TEST_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) /* F6 */
#define WMM_TEST_PAGE_NUM_PUBQ 0xA3
#define WMM_TEST_PAGE_NUM_HPQ 0x29
#define WMM_TEST_PAGE_NUM_LPQ 0x29
/* Note: For Normal Chip Setting, modify later */
#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER 0xF5
#define WMM_NORMAL_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) /* F6 */
#define WMM_NORMAL_PAGE_NUM_PUBQ 0xB0
#define WMM_NORMAL_PAGE_NUM_HPQ 0x29
#define WMM_NORMAL_PAGE_NUM_LPQ 0x1C
#define WMM_NORMAL_PAGE_NUM_NPQ 0x1C
/* */
/* Chip specific */
/* */
#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3)
#define CHIP_BONDING_92C_1T2R 0x1
#define CHIP_BONDING_88C_USB_MCARD 0x2
#define CHIP_BONDING_88C_USB_HP 0x1
#include "HalVerDef.h"
#include "hal_com.h"
/* */
/* Channel Plan */
/* */
enum ChannelPlan
{
CHPL_FCC = 0,
CHPL_IC = 1,
CHPL_ETSI = 2,
CHPL_SPAIN = 3,
CHPL_FRANCE = 4,
CHPL_MKK = 5,
CHPL_MKK1 = 6,
CHPL_ISRAEL = 7,
CHPL_TELEC = 8,
CHPL_GLOBAL = 9,
CHPL_WORLD = 10,
};
#define EFUSE_REAL_CONTENT_LEN 512
#define EFUSE_MAP_LEN 128
#define EFUSE_MAX_SECTION 16
#define EFUSE_IC_ID_OFFSET 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */
#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN)
/* */
/* <Roger_Notes> */
/* To prevent out of boundary programming case, */
/* leave 1byte and program full section */
/* 9bytes + 1byt + 5bytes and pre 1byte. */
/* For worst case: */
/* | 1byte|----8bytes----|1byte|--5bytes--| */
/* | | Reserved(14bytes) | */
/* */
/* PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. */
#define EFUSE_OOB_PROTECT_BYTES 15
#define EFUSE_REAL_CONTENT_LEN_8723A 512
#define EFUSE_MAP_LEN_8723A 256
#define EFUSE_MAX_SECTION_8723A 32
/* */
/* EFUSE for BT definition */
/* */
#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512
#define EFUSE_BT_REAL_CONTENT_LEN 1536 /* 512*3 */
#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */
#define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */
#define EFUSE_PROTECT_BYTES_BANK 16
/* */
/* <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06. */
/* */
enum RT_MULTI_FUNC {
RT_MULTI_FUNC_NONE = 0x00,
RT_MULTI_FUNC_WIFI = 0x01,
RT_MULTI_FUNC_BT = 0x02,
RT_MULTI_FUNC_GPS = 0x04,
};
/* */
/* <Roger_Notes> For RTL8723 WiFi PDn/GPIO polarity control configuration. 2010.10.08. */
/* */
enum RT_POLARITY_CTL {
RT_POLARITY_LOW_ACT = 0,
RT_POLARITY_HIGH_ACT = 1,
};
/* For RTL8723 regulator mode. by tynli. 2011.01.14. */
enum RT_REGULATOR_MODE {
RT_SWITCHING_REGULATOR = 0,
RT_LDO_REGULATOR = 1,
};
/* Description: Determine the types of C2H events that are the same in driver and Fw. */
/* Fisrt constructed by tynli. 2009.10.09. */
enum {
C2H_DBG = 0,
C2H_TSF = 1,
C2H_AP_RPT_RSP = 2,
C2H_CCX_TX_RPT = 3, /* The FW notify the report of the specific tx packet. */
C2H_BT_RSSI = 4,
C2H_BT_OP_MODE = 5,
C2H_EXT_RA_RPT = 6,
C2H_HW_INFO_EXCH = 10,
C2H_C2H_H2C_TEST = 11,
C2H_BT_INFO = 12,
C2H_BT_MP_INFO = 15,
MAX_C2HEVENT
};
struct hal_data_8723a {
struct hal_version VersionID;
enum rt_customer_id CustomerID;
u16 FirmwareVersion;
u16 FirmwareVersionRev;
u16 FirmwareSubVersion;
u16 FirmwareSignature;
/* current WIFI_PHY values */
u32 ReceiveConfig;
enum WIRELESS_MODE CurrentWirelessMode;
enum ht_channel_width CurrentChannelBW;
u8 CurrentChannel;
u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */
u16 BasicRateSet;
/* rf_ctrl */
u8 rf_chip;
u8 rf_type;
u8 NumTotalRFPath;
u8 BoardType;
u8 CrystalCap;
/* */
/* EEPROM setting. */
/* */
u8 EEPROMVersion;
u16 EEPROMVID;
u16 EEPROMPID;
u16 EEPROMSVID;
u16 EEPROMSDID;
u8 EEPROMCustomerID;
u8 EEPROMSubCustomerID;
u8 EEPROMRegulatory;
u8 EEPROMThermalMeter;
u8 EEPROMBluetoothCoexist;
u8 EEPROMBluetoothType;
u8 EEPROMBluetoothAntNum;
u8 EEPROMBluetoothAntIsolation;
u8 EEPROMBluetoothRadioShared;
u8 bTXPowerDataReadFromEEPORM;
u8 bAPKThermalMeterIgnore;
u8 bIQKInitialized;
u8 bAntennaDetected;
u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; /* For HT 40MHZ pwr */
u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; /* For HT 40MHZ pwr */
u8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];/* HT 20<->40 Pwr diff */
u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];/* For HT<->legacy pwr diff */
/* For power group */
u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 LegacyHTTxPowerDiff;/* Legacy to HT rate power diff */
/* Read/write are allow for following hardware information variables */
u8 framesync;
u32 framesyncC34;
u8 framesyncMonitor;
u8 DefaultInitialGain[4];
u8 pwrGroupCnt;
u32 MCSTxPowerLevelOriginalOffset[7][16];
u32 CCKTxPowerLevelOriginalOffset;
u32 AntennaTxPath; /* Antenna path Tx */
u32 AntennaRxPath; /* Antenna path Rx */
u8 ExternalPA;
u8 bLedOpenDrain; /* Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. */
u8 b1x1RecvCombine; /* for 1T1R receive combining */
/* For EDCA Turbo mode */
u32 AcParam_BE; /* Original parameter for BE, use for EDCA turbo. */
/* vivi, for tx power tracking, 20080407 */
/* u16 TSSI_13dBm; */
/* u32 Pwr_Track; */
/* The current Tx Power Level */
u8 CurrentCckTxPwrIdx;
u8 CurrentOfdm24GTxPwrIdx;
struct bb_reg_define PHYRegDef[4]; /* Radio A/B/C/D */
bool bRFPathRxEnable[4]; /* We support 4 RF path now. */
u32 RfRegChnlVal[2];
u8 bCckHighPower;
/* RDG enable */
bool bRDGEnable;
/* for host message to fw */
u8 LastHMEBoxNum;
u8 fw_ractrl;
u8 RegTxPause;
/* Beacon function related global variable. */
u32 RegBcnCtrlVal;
u8 RegFwHwTxQCtrl;
u8 RegReg542;
struct dm_priv dmpriv;
struct dm_odm_t odmpriv;
struct sreset_priv srestpriv;
#ifdef CONFIG_8723AU_BT_COEXIST
u8 bBTMode;
/* BT only. */
struct bt_30info BtInfo;
/* For bluetooth co-existance */
struct bt_coexist_str bt_coexist;
#endif
u8 bDumpRxPkt;/* for debug */
u8 FwRsvdPageStartOffset; /* 2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. */
/* 2010/08/09 MH Add CU power down mode. */
u8 pwrdown;
/* Add for dual MAC 0--Mac0 1--Mac1 */
u32 interfaceIndex;
u8 OutEpQueueSel;
u8 OutEpNumber;
/* 2010/12/10 MH Add for USB aggreation mode dynamic shceme. */
bool UsbRxHighSpeedMode;
/* 2010/11/22 MH Add for slim combo debug mode selective. */
/* This is used for fix the drawback of CU TSMC-A/UMC-A cut. HW auto suspend ability. Close BT clock. */
bool SlimComboDbg;
/* */
/* Add For EEPROM Efuse switch and Efuse Shadow map Setting */
/* */
u8 EepromOrEfuse;
u16 EfuseUsedBytes;
u16 BTEfuseUsedBytes;
/* Interrupt relatd register information. */
u32 SysIntrStatus;
u32 SysIntrMask;
/* */
/* 2011/02/23 MH Add for 8723 mylti function definition. The define should be moved to an */
/* independent file in the future. */
/* */
/* 8723-----------------------------------------*/
enum RT_MULTI_FUNC MultiFunc; /* For multi-function consideration. */
enum RT_POLARITY_CTL PolarityCtl; /* For Wifi PDn Polarity control. */
enum RT_REGULATOR_MODE RegulatorMode; /* switching regulator or LDO */
/* 8723-----------------------------------------
* 2011/02/23 MH Add for 8723 mylti function definition. The define should be moved to an */
/* independent file in the future. */
bool bMACFuncEnable;
#ifdef CONFIG_8723AU_P2P
struct P2P_PS_Offload_t p2p_ps_offload;
#endif
/* */
/* For USB Interface HAL related */
/* */
u32 UsbBulkOutSize;
/* Interrupt related register information. */
u32 IntArray[2];
u32 IntrMask[2];
/* */
/* For SDIO Interface HAL related */
/* */
/* Auto FSM to Turn On, include clock, isolation, power control for MAC only */
u8 bMacPwrCtrlOn;
};
#define GET_HAL_DATA(__pAdapter) ((struct hal_data_8723a *)((__pAdapter)->HalData))
#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type)
#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)
#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
struct rxreport_8723a {
u32 pktlen:14;
u32 crc32:1;
u32 icverr:1;
u32 drvinfosize:4;
u32 security:3;
u32 qos:1;
u32 shift:2;
u32 physt:1;
u32 swdec:1;
u32 ls:1;
u32 fs:1;
u32 eor:1;
u32 own:1;
u32 macid:5;
u32 tid:4;
u32 hwrsvd:4;
u32 amsdu:1;
u32 paggr:1;
u32 faggr:1;
u32 a1fit:4;
u32 a2fit:4;
u32 pam:1;
u32 pwr:1;
u32 md:1;
u32 mf:1;
u32 type:2;
u32 mc:1;
u32 bc:1;
u32 seq:12;
u32 frag:4;
u32 nextpktlen:14;
u32 nextind:1;
u32 rsvd0831:1;
u32 rxmcs:6;
u32 rxht:1;
u32 gf:1;
u32 splcp:1;
u32 bw:1;
u32 htc:1;
u32 eosp:1;
u32 bssidfit:2;
u32 rsvd1214:16;
u32 unicastwake:1;
u32 magicwake:1;
u32 pattern0match:1;
u32 pattern1match:1;
u32 pattern2match:1;
u32 pattern3match:1;
u32 pattern4match:1;
u32 pattern5match:1;
u32 pattern6match:1;
u32 pattern7match:1;
u32 pattern8match:1;
u32 pattern9match:1;
u32 patternamatch:1;
u32 patternbmatch:1;
u32 patterncmatch:1;
u32 rsvd1613:19;
u32 tsfl;
u32 bassn:12;
u32 bavld:1;
u32 rsvd2413:19;
};
/* rtl8723a_hal_init.c */
s32 rtl8723a_FirmwareDownload(struct rtw_adapter *padapter);
void rtl8723a_FirmwareSelfReset(struct rtw_adapter *padapter);
void rtl8723a_InitializeFirmwareVars(struct rtw_adapter *padapter);
void rtl8723a_InitAntenna_Selection(struct rtw_adapter *padapter);
void rtl8723a_DeinitAntenna_Selection(struct rtw_adapter *padapter);
void rtl8723a_CheckAntenna_Selection(struct rtw_adapter *padapter);
void rtl8723a_init_default_value(struct rtw_adapter *padapter);
s32 InitLLTTable23a(struct rtw_adapter *padapter, u32 boundary);
s32 CardDisableHWSM(struct rtw_adapter *padapter, u8 resetMCU);
s32 CardDisableWithoutHWSM(struct rtw_adapter *padapter);
/* EFuse */
u8 GetEEPROMSize8723A(struct rtw_adapter *padapter);
void Hal_InitPGData(struct rtw_adapter *padapter, u8 *PROMContent);
void Hal_EfuseParseIDCode(struct rtw_adapter *padapter, u8 *hwinfo);
void Hal_EfuseParsetxpowerinfo_8723A(struct rtw_adapter *padapter, u8 *PROMContent, bool AutoLoadFail);
void Hal_EfuseParseBTCoexistInfo_8723A(struct rtw_adapter *padapter, u8 *hwinfo, bool AutoLoadFail);
void Hal_EfuseParseEEPROMVer(struct rtw_adapter *padapter, u8 *hwinfo, bool AutoLoadFail);
void rtl8723a_EfuseParseChnlPlan(struct rtw_adapter *padapter, u8 *hwinfo, bool AutoLoadFail);
void Hal_EfuseParseCustomerID(struct rtw_adapter *padapter, u8 *hwinfo, bool AutoLoadFail);
void Hal_EfuseParseAntennaDiversity(struct rtw_adapter *padapter, u8 *hwinfo, bool AutoLoadFail);
void Hal_EfuseParseRateIndicationOption(struct rtw_adapter *padapter, u8 *hwinfo, bool AutoLoadFail);
void Hal_EfuseParseXtal_8723A(struct rtw_adapter *pAdapter, u8 *hwinfo, u8 AutoLoadFail);
void Hal_EfuseParseThermalMeter_8723A(struct rtw_adapter *padapter, u8 *hwinfo, u8 AutoLoadFail);
void Hal_InitChannelPlan23a(struct rtw_adapter *padapter);
void rtl8723a_set_hal_ops(struct hal_ops *pHalFunc);
void SetHwReg8723A(struct rtw_adapter *padapter, u8 variable, u8 *val);
void GetHwReg8723A(struct rtw_adapter *padapter, u8 variable, u8 *val);
#ifdef CONFIG_8723AU_BT_COEXIST
void rtl8723a_SingleDualAntennaDetection(struct rtw_adapter *padapter);
#endif
/* register */
void SetBcnCtrlReg23a(struct rtw_adapter *padapter, u8 SetBits, u8 ClearBits);
void rtl8723a_InitBeaconParameters(struct rtw_adapter *padapter);
void rtl8723a_clone_haldata(struct rtw_adapter *dst_adapter, struct rtw_adapter *src_adapter);
void rtl8723a_start_thread(struct rtw_adapter *padapter);
void rtl8723a_stop_thread(struct rtw_adapter *padapter);
s32 c2h_id_filter_ccx_8723a(u8 id);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTL8723A_LED_H__
#define __RTL8723A_LED_H__
#include <osdep_service.h>
#include <drv_types.h>
/* */
/* Interface to manipulate LED objects. */
/* */
void rtl8723au_InitSwLeds(struct rtw_adapter *padapter);
void rtl8723au_DeInitSwLeds(struct rtw_adapter *padapter);
void SwLedOn23a(struct rtw_adapter *padapter, struct led_8723a * pLed);
void SwLedOff23a(struct rtw_adapter *padapter, struct led_8723a * pLed);
#endif

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drivers/staging/rtl8723au/include/rtl8723a_pg.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTL8723A_PG_H__
#define __RTL8723A_PG_H__
/* */
/* EEPROM/Efuse PG Offset for 8723E/8723U/8723S */
/* */
#define EEPROM_CCK_TX_PWR_INX_8723A 0x10
#define EEPROM_HT40_1S_TX_PWR_INX_8723A 0x16
#define EEPROM_HT20_TX_PWR_INX_DIFF_8723A 0x1C
#define EEPROM_OFDM_TX_PWR_INX_DIFF_8723A 0x1F
#define EEPROM_HT40_MAX_PWR_OFFSET_8723A 0x22
#define EEPROM_HT20_MAX_PWR_OFFSET_8723A 0x25
#define EEPROM_ChannelPlan_8723A 0x28
#define EEPROM_TSSI_A_8723A 0x29
#define EEPROM_THERMAL_METER_8723A 0x2A
#define RF_OPTION1_8723A 0x2B
#define RF_OPTION2_8723A 0x2C
#define RF_OPTION3_8723A 0x2D
#define RF_OPTION4_8723A 0x2E
#define EEPROM_VERSION_8723A 0x30
#define EEPROM_CustomID_8723A 0x31
#define EEPROM_SubCustomID_8723A 0x32
#define EEPROM_XTAL_K_8723A 0x33
#define EEPROM_Chipset_8723A 0x34
/* RTL8723AE */
#define EEPROM_VID_8723AE 0x49
#define EEPROM_DID_8723AE 0x4B
#define EEPROM_SVID_8723AE 0x4D
#define EEPROM_SMID_8723AE 0x4F
#define EEPROM_MAC_ADDR_8723AE 0x67
/* RTL8723AU */
#define EEPROM_MAC_ADDR_8723AU 0xC6
#define EEPROM_VID_8723AU 0xB7
#define EEPROM_PID_8723AU 0xB9
/* RTL8723AS */
#define EEPROM_MAC_ADDR_8723AS 0xAA
/* */
/* EEPROM/Efuse Value Type */
/* */
#define EETYPE_TX_PWR 0x0
/* */
/* EEPROM/Efuse Default Value */
/* */
#define EEPROM_Default_CrystalCap_8723A 0x20
/* */
/* EEPROM/EFUSE data structure definition. */
/* */
#define MAX_RF_PATH_NUM 2
#define MAX_CHNL_GROUP 3+9
struct txpowerinfo {
u8 CCKIndex[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
u8 HT40_1SIndex[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
u8 HT40_2SIndexDiff[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
u8 HT20IndexDiff[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
u8 OFDMIndexDiff[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
u8 HT40MaxOffset[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
u8 HT20MaxOffset[MAX_RF_PATH_NUM][MAX_CHNL_GROUP];
u8 TSSI_A[3];
u8 TSSI_B[3];
u8 TSSI_A_5G[3]; /* 5GL/5GM/5GH */
u8 TSSI_B_5G[3];
};
enum bt_ant_num {
Ant_x2 = 0,
Ant_x1 = 1
};
enum bt_cotype {
BT_2Wire = 0,
BT_ISSC_3Wire = 1,
BT_Accel = 2,
BT_CSR_BC4 = 3,
BT_CSR_BC8 = 4,
BT_RTL8756 = 5,
BT_RTL8723A = 6
};
enum bt_radioshared {
BT_Radio_Shared = 0,
BT_Radio_Individual = 1,
};
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTL8723A_RECV_H__
#define __RTL8723A_RECV_H__
#include <osdep_service.h>
#include <drv_types.h>
#define NR_RECVBUFF (4)
#define NR_PREALLOC_RECV_SKB (8)
#define RECV_BLK_SZ 512
#define RECV_BLK_CNT 16
#define RECV_BLK_TH RECV_BLK_CNT
#define MAX_RECVBUF_SZ (15360) /* 15k < 16k */
#define RECV_BULK_IN_ADDR 0x80
#define RECV_INT_IN_ADDR 0x81
#define PHY_RSSI_SLID_WIN_MAX 100
#define PHY_LINKQUALITY_SLID_WIN_MAX 20
struct phy_stat
{
unsigned int phydw0;
unsigned int phydw1;
unsigned int phydw2;
unsigned int phydw3;
unsigned int phydw4;
unsigned int phydw5;
unsigned int phydw6;
unsigned int phydw7;
};
/* Rx smooth factor */
#define Rx_Smooth_Factor (20)
struct interrupt_msg_format {
unsigned int C2H_MSG0;
unsigned int C2H_MSG1;
unsigned int C2H_MSG2;
unsigned int C2H_MSG3;
unsigned int HISR; /* from HISR Reg0x124, read to clear */
unsigned int HISRE;/* from HISRE Reg0x12c, read to clear */
unsigned int MSG_EX;
};
void rtl8723au_init_recvbuf(struct rtw_adapter *padapter, struct recv_buf *precvbuf);
int rtl8723au_init_recv_priv(struct rtw_adapter * padapter);
void rtl8723au_free_recv_priv(struct rtw_adapter * padapter);
void rtl8723a_process_phy_info(struct rtw_adapter *padapter, void *prframe);
void update_recvframe_attrib(struct recv_frame *precvframe, struct recv_stat *prxstat);
void update_recvframe_phyinfo(struct recv_frame *precvframe, struct phy_stat *pphy_info);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTL8723A_RF_H__
#define __RTL8723A_RF_H__
/*--------------------------Define Parameters-------------------------------*/
/* */
/* For RF 6052 Series */
/* */
#define RF6052_MAX_TX_PWR 0x3F
#define RF6052_MAX_REG 0x3F
#define RF6052_MAX_PATH 2
/*--------------------------Define Parameters-------------------------------*/
/*------------------------------Define structure----------------------------*/
/*------------------------------Define structure----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*--------------------------Exported Function prototype---------------------*/
/* */
/* RF RL6052 Series API */
/* */
void rtl8723a_phy_rf6052set_bw(struct rtw_adapter *Adapter,
enum ht_channel_width Bandwidth);
void rtl823a_phy_rf6052setccktxpower(struct rtw_adapter *Adapter,
u8* pPowerlevel);
void rtl8723a_PHY_RF6052SetOFDMTxPower(struct rtw_adapter *Adapter,
u8* pPowerLevel, u8 Channel);
/*--------------------------Exported Function prototype---------------------*/
int PHY_RF6052_Config8723A(struct rtw_adapter *Adapter);
#endif

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drivers/staging/rtl8723au/include/rtl8723a_spec.h Normal file
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25
drivers/staging/rtl8723au/include/rtl8723a_sreset.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _RTL8723A_SRESET_H_
#define _RTL8723A_SRESET_H_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_sreset.h>
void rtl8723a_sreset_xmit_status_check(struct rtw_adapter *padapter);
void rtl8723a_sreset_linked_status_check(struct rtw_adapter *padapter);
#endif

229
drivers/staging/rtl8723au/include/rtl8723a_xmit.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTL8723A_XMIT_H__
#define __RTL8723A_XMIT_H__
/* */
/* Queue Select Value in TxDesc */
/* */
#define QSLT_BK 0x2/* 0x01 */
#define QSLT_BE 0x0
#define QSLT_VI 0x5/* 0x4 */
#define QSLT_VO 0x7/* 0x6 */
#define QSLT_BEACON 0x10
#define QSLT_HIGH 0x11
#define QSLT_MGNT 0x12
#define QSLT_CMD 0x13
/* */
/* defined for TX DESC Operation */
/* */
#define MAX_TID (15)
/* OFFSET 0 */
#define OFFSET_SZ 0
#define OFFSET_SHT 16
#define BMC BIT(24)
#define LSG BIT(26)
#define FSG BIT(27)
#define OWN BIT(31)
/* OFFSET 4 */
#define PKT_OFFSET_SZ 0
#define BK BIT(6)
#define QSEL_SHT 8
#define Rate_ID_SHT 16
#define NAVUSEHDR BIT(20)
#define PKT_OFFSET_SHT 26
#define HWPC BIT(31)
/* OFFSET 8 */
#define AGG_EN BIT(29)
/* OFFSET 12 */
#define SEQ_SHT 16
/* OFFSET 16 */
#define QoS BIT(6)
#define HW_SEQ_EN BIT(7)
#define USERATE BIT(8)
#define DISDATAFB BIT(10)
#define DATA_SHORT BIT(24)
#define DATA_BW BIT(25)
/* OFFSET 20 */
#define SGI BIT(6)
struct txdesc_8723a {
u32 pktlen:16;
u32 offset:8;
u32 bmc:1;
u32 htc:1;
u32 ls:1;
u32 fs:1;
u32 linip:1;
u32 noacm:1;
u32 gf:1;
u32 own:1;
u32 macid:5;
u32 agg_en:1;
u32 bk:1;
u32 rd_en:1;
u32 qsel:5;
u32 rd_nav_ext:1;
u32 lsig_txop_en:1;
u32 pifs:1;
u32 rate_id:4;
u32 navusehdr:1;
u32 en_desc_id:1;
u32 sectype:2;
u32 rsvd0424:2;
u32 pkt_offset:5; /* unit: 8 bytes */
u32 rsvd0431:1;
u32 rts_rc:6;
u32 data_rc:6;
u32 rsvd0812:2;
u32 bar_rty_th:2;
u32 rsvd0816:1;
u32 morefrag:1;
u32 raw:1;
u32 ccx:1;
u32 ampdu_density:3;
u32 bt_null:1;
u32 ant_sel_a:1;
u32 ant_sel_b:1;
u32 tx_ant_cck:2;
u32 tx_antl:2;
u32 tx_ant_ht:2;
u32 nextheadpage:8;
u32 tailpage:8;
u32 seq:12;
u32 cpu_handle:1;
u32 tag1:1;
u32 trigger_int:1;
u32 hwseq_en:1;
u32 rtsrate:5;
u32 ap_dcfe:1;
u32 hwseq_sel:2;
u32 userate:1;
u32 disrtsfb:1;
u32 disdatafb:1;
u32 cts2self:1;
u32 rtsen:1;
u32 hw_rts_en:1;
u32 port_id:1;
u32 rsvd1615:3;
u32 wait_dcts:1;
u32 cts2ap_en:1;
u32 data_sc:2;
u32 data_stbc:2;
u32 data_short:1;
u32 data_bw:1;
u32 rts_short:1;
u32 rts_bw:1;
u32 rts_sc:2;
u32 vcs_stbc:2;
u32 datarate:6;
u32 sgi:1;
u32 try_rate:1;
u32 data_ratefb_lmt:5;
u32 rts_ratefb_lmt:4;
u32 rty_lmt_en:1;
u32 data_rt_lmt:6;
u32 usb_txagg_num:8;
u32 txagg_a:5;
u32 txagg_b:5;
u32 use_max_len:1;
u32 max_agg_num:5;
u32 mcsg1_max_len:4;
u32 mcsg2_max_len:4;
u32 mcsg3_max_len:4;
u32 mcs7_sgi_max_len:4;
u32 checksum:16; /* TxBuffSize(PCIe)/CheckSum(USB) */
u32 mcsg4_max_len:4;
u32 mcsg5_max_len:4;
u32 mcsg6_max_len:4;
u32 mcs15_sgi_max_len:4;
};
#define txdesc_set_ccx_sw_8723a(txdesc, value) \
do { \
((struct txdesc_8723a *)(txdesc))->mcsg4_max_len = (((value)>>8) & 0x0f); \
((struct txdesc_8723a *)(txdesc))->mcs15_sgi_max_len= (((value)>>4) & 0x0f); \
((struct txdesc_8723a *)(txdesc))->mcsg6_max_len = ((value) & 0x0f); \
} while (0)
struct txrpt_ccx_8723a {
/* offset 0 */
u8 tag1:1;
u8 rsvd:4;
u8 int_bt:1;
u8 int_tri:1;
u8 int_ccx:1;
/* offset 1 */
u8 mac_id:5;
u8 pkt_drop:1;
u8 pkt_ok:1;
u8 bmc:1;
/* offset 2 */
u8 retry_cnt:6;
u8 lifetime_over:1;
u8 retry_over:1;
/* offset 3 */
u8 ccx_qtime0;
u8 ccx_qtime1;
/* offset 5 */
u8 final_data_rate;
/* offset 6 */
u8 sw1:4;
u8 qsel:4;
/* offset 7 */
u8 sw0;
};
#define txrpt_ccx_sw_8723a(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1<<8))
#define txrpt_ccx_qtime_8723a(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8))
void dump_txrpt_ccx_8723a(void *buf);
void handle_txrpt_ccx_8723a(struct rtw_adapter *adapter, void *buf);
void rtl8723a_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem);
void rtl8723a_fill_fake_txdesc(struct rtw_adapter *padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull);
s32 rtl8723au_hal_xmitframe_enqueue(struct rtw_adapter *padapter, struct xmit_frame *pxmitframe);
s32 rtl8723au_xmit_buf_handler(struct rtw_adapter *padapter);
#define hal_xmit_handler rtl8723au_xmit_buf_handler
s32 rtl8723au_init_xmit_priv(struct rtw_adapter * padapter);
void rtl8723au_free_xmit_priv(struct rtw_adapter * padapter);
s32 rtl8723au_hal_xmit(struct rtw_adapter *padapter, struct xmit_frame *pxmitframe);
s32 rtl8723au_mgnt_xmit(struct rtw_adapter *padapter, struct xmit_frame *pmgntframe);
s32 rtl8723au_xmitframe_complete(struct rtw_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
#endif

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drivers/staging/rtl8723au/include/rtw_ap.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTW_AP_H_
#define __RTW_AP_H_
#include <osdep_service.h>
#include <drv_types.h>
#ifdef CONFIG_8723AU_AP_MODE
/* external function */
void rtw_indicate_sta_assoc_event23a(struct rtw_adapter *padapter, struct sta_info *psta);
void rtw_indicate_sta_disassoc_event23a(struct rtw_adapter *padapter, struct sta_info *psta);
void init_mlme_ap_info23a(struct rtw_adapter *padapter);
void free_mlme_ap_info23a(struct rtw_adapter *padapter);
/* void update_BCNTIM(struct rtw_adapter *padapter); */
void rtw_add_bcn_ie(struct rtw_adapter *padapter, struct wlan_bssid_ex *pnetwork, u8 index, u8 *data, u8 len);
void rtw_remove_bcn_ie(struct rtw_adapter *padapter, struct wlan_bssid_ex *pnetwork, u8 index);
void update_beacon23a(struct rtw_adapter *padapter, u8 ie_id, u8 *oui, u8 tx);
void add_RATid23a(struct rtw_adapter *padapter, struct sta_info *psta, u8 rssi_level);
void expire_timeout_chk23a(struct rtw_adapter *padapter);
void update_sta_info23a_apmode23a(struct rtw_adapter *padapter, struct sta_info *psta);
int rtw_check_beacon_data23a(struct rtw_adapter *padapter, u8 *pbuf, int len);
void rtw_ap_restore_network(struct rtw_adapter *padapter);
void rtw_set_macaddr_acl23a(struct rtw_adapter *padapter, int mode);
int rtw_acl_add_sta23a(struct rtw_adapter *padapter, u8 *addr);
int rtw_acl_remove_sta23a(struct rtw_adapter *padapter, u8 *addr);
void associated_clients_update23a(struct rtw_adapter *padapter, u8 updated);
void bss_cap_update_on_sta_join23a(struct rtw_adapter *padapter, struct sta_info *psta);
u8 bss_cap_update_on_sta_leave23a(struct rtw_adapter *padapter, struct sta_info *psta);
void sta_info_update23a(struct rtw_adapter *padapter, struct sta_info *psta);
void ap_sta_info_defer_update23a(struct rtw_adapter *padapter, struct sta_info *psta);
u8 ap_free_sta23a(struct rtw_adapter *padapter, struct sta_info *psta, bool active, u16 reason);
int rtw_sta_flush23a(struct rtw_adapter *padapter);
int rtw_ap_inform_ch_switch23a(struct rtw_adapter *padapter, u8 new_ch, u8 ch_offset);
void start_ap_mode23a(struct rtw_adapter *padapter);
void stop_ap_mode23a(struct rtw_adapter *padapter);
#endif /* end of CONFIG_8723AU_AP_MODE */
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTW_CMD_H_
#define __RTW_CMD_H_
#include <wlan_bssdef.h>
#include <rtw_rf.h>
#include <rtw_led.h>
#define C2H_MEM_SZ (16*1024)
#include <osdep_service.h>
#include <ieee80211.h> /* <ieee80211/ieee80211.h> */
#define FREE_CMDOBJ_SZ 128
#define MAX_CMDSZ 1024
#define MAX_RSPSZ 512
#define MAX_EVTSZ 1024
#define CMDBUFF_ALIGN_SZ 512
struct cmd_obj {
struct rtw_adapter *padapter;
u16 cmdcode;
u8 res;
u8 *parmbuf;
u32 cmdsz;
u8 *rsp;
u32 rspsz;
/* struct semaphore cmd_sem; */
struct list_head list;
};
struct cmd_priv {
struct semaphore cmd_queue_sema;
/* struct semaphore cmd_done_sema; */
struct semaphore terminate_cmdthread_sema;
struct rtw_queue cmd_queue;
u8 cmd_seq;
u8 *cmd_buf; /* shall be non-paged, and 4 bytes aligned */
u8 *cmd_allocated_buf;
u8 *rsp_buf; /* shall be non-paged, and 4 bytes aligned */
u8 *rsp_allocated_buf;
u32 cmd_issued_cnt;
u32 cmd_done_cnt;
u32 rsp_cnt;
u8 cmdthd_running;
struct rtw_adapter *padapter;
};
#define C2H_QUEUE_MAX_LEN 10
struct evt_priv {
struct work_struct c2h_wk;
bool c2h_wk_alive;
struct rtw_cbuf *c2h_queue;
atomic_t event_seq;
u8 *evt_buf; /* shall be non-paged, and 4 bytes aligned */
u8 *evt_allocated_buf;
u32 evt_done_cnt;
};
#define init_h2fwcmd_w_parm_no_rsp(pcmd, pparm, code) \
do {\
INIT_LIST_HEAD(&pcmd->list);\
pcmd->cmdcode = code;\
pcmd->parmbuf = (u8 *)(pparm);\
pcmd->cmdsz = sizeof (*pparm);\
pcmd->rsp = NULL;\
pcmd->rspsz = 0;\
} while(0)
struct c2h_evt_hdr {
u8 id:4;
u8 plen:4;
u8 seq;
u8 payload[0];
};
#define c2h_evt_exist(c2h_evt) ((c2h_evt)->id || (c2h_evt)->plen)
u32 rtw_enqueue_cmd23a(struct cmd_priv *pcmdpriv, struct cmd_obj *obj);
void rtw_free_cmd_obj23a(struct cmd_obj *pcmd);
int rtw_cmd_thread23a(void *context);
int rtw_init_cmd_priv23a(struct cmd_priv *pcmdpriv);
void rtw_free_cmd_priv23a (struct cmd_priv *pcmdpriv);
u32 rtw_init_evt_priv23a (struct evt_priv *pevtpriv);
void rtw_free_evt_priv23a (struct evt_priv *pevtpriv);
void rtw_cmd_clr_isr23a(struct cmd_priv *pcmdpriv);
void rtw_evt_notify_isr(struct evt_priv *pevtpriv);
#ifdef CONFIG_8723AU_P2P
u8 p2p_protocol_wk_cmd23a(struct rtw_adapter*padapter, int intCmdType );
#endif /* CONFIG_8723AU_P2P */
enum rtw_drvextra_cmd_id
{
NONE_WK_CID,
DYNAMIC_CHK_WK_CID,
DM_CTRL_WK_CID,
PBC_POLLING_WK_CID,
POWER_SAVING_CTRL_WK_CID,/* IPS,AUTOSuspend */
LPS_CTRL_WK_CID,
ANT_SELECT_WK_CID,
P2P_PS_WK_CID,
P2P_PROTO_WK_CID,
CHECK_HIQ_WK_CID,/* for softap mode, check hi queue if empty */
C2H_WK_CID,
RTP_TIMER_CFG_WK_CID,
MAX_WK_CID
};
enum LPS_CTRL_TYPE
{
LPS_CTRL_SCAN=0,
LPS_CTRL_JOINBSS=1,
LPS_CTRL_CONNECT=2,
LPS_CTRL_DISCONNECT=3,
LPS_CTRL_SPECIAL_PACKET=4,
LPS_CTRL_LEAVE=5,
};
enum RFINTFS {
SWSI,
HWSI,
HWPI,
};
/*
Caller Mode: Infra, Ad-HoC(C)
Notes: To enter USB suspend mode
Command Mode
*/
struct usb_suspend_parm {
u32 action;/* 1: sleep, 0:resume */
};
/*
Caller Mode: Infra, Ad-HoC
Notes: To join a known BSS.
Command-Event Mode
*/
/*
Caller Mode: Infra, Ad-HoC(C)
Notes: To disconnect the current associated BSS
Command Mode
*/
struct disconnect_parm {
u32 deauth_timeout_ms;
};
struct setopmode_parm {
u8 mode;
u8 rsvd[3];
};
/*
Caller Mode: AP, Ad-HoC, Infra
Notes: To ask RTL8711 performing site-survey
Command-Event Mode
*/
#define RTW_SSID_SCAN_AMOUNT 9 /* for WEXT_CSCAN_AMOUNT 9 */
#define RTW_CHANNEL_SCAN_AMOUNT (14+37)
struct sitesurvey_parm {
int scan_mode; /* active: 1, passive: 0 */
u8 ssid_num;
u8 ch_num;
struct cfg80211_ssid ssid[RTW_SSID_SCAN_AMOUNT];
struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT];
};
/*
Caller Mode: Any
Notes: To set the auth type of RTL8711. open/shared/802.1x
Command Mode
*/
struct setauth_parm {
u8 mode; /* 0: legacy open, 1: legacy shared 2: 802.1x */
u8 _1x; /* 0: PSK, 1: TLS */
u8 rsvd[2];
};
/*
Caller Mode: Infra
a. algorithm: wep40, wep104, tkip & aes
b. keytype: grp key/unicast key
c. key contents
when shared key ==> keyid is the camid
when 802.1x ==> keyid [0:1] ==> grp key
when 802.1x ==> keyid > 2 ==> unicast key
*/
struct setkey_parm {
u8 algorithm; /* encryption algorithm, could be none, wep40, TKIP, CCMP, wep104 */
u8 keyid;
u8 grpkey; /* 1: this is the grpkey for 802.1x. 0: this is the unicast key for 802.1x */
u8 set_tx; /* 1: main tx key for wep. 0: other key. */
u8 key[16]; /* this could be 40 or 104 */
};
/*
When in AP or Ad-Hoc mode, this is used to
allocate an sw/hw entry for a newly associated sta.
Command
when shared key ==> algorithm/keyid
*/
struct set_stakey_parm {
u8 addr[ETH_ALEN];
u8 algorithm;
u8 id;/* currently for erasing cam entry if algorithm == _NO_PRIVACY_ */
u8 key[16];
};
struct set_stakey_rsp {
u8 addr[ETH_ALEN];
u8 keyid;
u8 rsvd;
};
/*
Caller Ad-Hoc/AP
Command -Rsp(AID == CAMID) mode
This is to force fw to add an sta_data entry per driver's request.
FW will write an cam entry associated with it.
*/
struct set_assocsta_parm {
u8 addr[ETH_ALEN];
};
struct set_assocsta_rsp {
u8 cam_id;
u8 rsvd[3];
};
/*
Caller Ad-Hoc/AP
Command mode
This is to force fw to del an sta_data entry per driver's request
FW will invalidate the cam entry associated with it.
*/
struct del_assocsta_parm {
u8 addr[ETH_ALEN];
};
/*
Caller Mode: AP/Ad-HoC(M)
Notes: To notify fw that given staid has changed its power state
Command Mode
*/
struct setstapwrstate_parm {
u8 staid;
u8 status;
u8 hwaddr[6];
};
/*
Caller Mode: Any
Notes: To setup the basic rate of RTL8711
Command Mode
*/
struct setbasicrate_parm {
u8 basicrates[NumRates];
};
/*
Caller Mode: Any
Notes: To read the current basic rate
Command-Rsp Mode
*/
struct getbasicrate_parm {
u32 rsvd;
};
struct getbasicrate_rsp {
u8 basicrates[NumRates];
};
/*
Caller Mode: Any
Notes: To setup the data rate of RTL8711
Command Mode
*/
struct setdatarate_parm {
u8 mac_id;
u8 datarates[NumRates];
};
/*
Caller Mode: Any
Notes: To read the current data rate
Command-Rsp Mode
*/
struct getdatarate_parm {
u32 rsvd;
};
struct getdatarate_rsp {
u8 datarates[NumRates];
};
/*
Caller Mode: Any
AP: AP can use the info for the contents of beacon frame
Infra: STA can use the info when sitesurveying
Ad-HoC(M): Like AP
Ad-HoC(C): Like STA
Notes: To set the phy capability of the NIC
Command Mode
*/
struct setphyinfo_parm {
struct regulatory_class class_sets[NUM_REGULATORYS];
u8 status;
};
struct getphyinfo_parm {
u32 rsvd;
};
struct getphyinfo_rsp {
struct regulatory_class class_sets[NUM_REGULATORYS];
u8 status;
};
/*
Caller Mode: Any
Notes: To set the channel/modem/band
This command will be used when channel/modem/band is changed.
Command Mode
*/
struct setphy_parm {
u8 rfchannel;
u8 modem;
};
/*
Caller Mode: Any
Notes: To get the current setting of channel/modem/band
Command-Rsp Mode
*/
struct getphy_parm {
u32 rsvd;
};
struct getphy_rsp {
u8 rfchannel;
u8 modem;
};
struct readBB_parm {
u8 offset;
};
struct readBB_rsp {
u8 value;
};
struct readTSSI_parm {
u8 offset;
};
struct readTSSI_rsp {
u8 value;
};
struct writeBB_parm {
u8 offset;
u8 value;
};
struct readRF_parm {
u8 offset;
};
struct readRF_rsp {
u32 value;
};
struct writeRF_parm {
u32 offset;
u32 value;
};
struct getrfintfs_parm {
u8 rfintfs;
};
struct Tx_Beacon_param
{
struct wlan_bssid_ex network;
};
/* CMD param Formart for driver extra cmd handler */
struct drvextra_cmd_parm {
int ec_id; /* extra cmd id */
int type_size; /* Can use this field as the type id or command size */
unsigned char *pbuf;
};
/*------------------- Below are used for RF/BB tunning ---------------------*/
struct setantenna_parm {
u8 tx_antset;
u8 rx_antset;
u8 tx_antenna;
u8 rx_antenna;
};
struct enrateadaptive_parm {
u32 en;
};
struct settxagctbl_parm {
u32 txagc[MAX_RATES_LENGTH];
};
struct gettxagctbl_parm {
u32 rsvd;
};
struct gettxagctbl_rsp {
u32 txagc[MAX_RATES_LENGTH];
};
struct setagcctrl_parm {
u32 agcctrl; /* 0: pure hw, 1: fw */
};
struct setssup_parm {
u32 ss_ForceUp[MAX_RATES_LENGTH];
};
struct getssup_parm {
u32 rsvd;
};
struct getssup_rsp {
u8 ss_ForceUp[MAX_RATES_LENGTH];
};
struct setssdlevel_parm {
u8 ss_DLevel[MAX_RATES_LENGTH];
};
struct getssdlevel_parm {
u32 rsvd;
};
struct getssdlevel_rsp {
u8 ss_DLevel[MAX_RATES_LENGTH];
};
struct setssulevel_parm {
u8 ss_ULevel[MAX_RATES_LENGTH];
};
struct getssulevel_parm {
u32 rsvd;
};
struct getssulevel_rsp {
u8 ss_ULevel[MAX_RATES_LENGTH];
};
struct setcountjudge_parm {
u8 count_judge[MAX_RATES_LENGTH];
};
struct getcountjudge_parm {
u32 rsvd;
};
struct getcountjudge_rsp {
u8 count_judge[MAX_RATES_LENGTH];
};
struct setratable_parm {
u8 ss_ForceUp[NumRates];
u8 ss_ULevel[NumRates];
u8 ss_DLevel[NumRates];
u8 count_judge[NumRates];
};
struct getratable_parm {
uint rsvd;
};
struct getratable_rsp {
u8 ss_ForceUp[NumRates];
u8 ss_ULevel[NumRates];
u8 ss_DLevel[NumRates];
u8 count_judge[NumRates];
};
/* to get TX,RX retry count */
struct gettxretrycnt_parm{
unsigned int rsvd;
};
struct gettxretrycnt_rsp{
unsigned long tx_retrycnt;
};
struct getrxretrycnt_parm{
unsigned int rsvd;
};
struct getrxretrycnt_rsp{
unsigned long rx_retrycnt;
};
/* to get BCNOK,BCNERR count */
struct getbcnokcnt_parm{
unsigned int rsvd;
};
struct getbcnokcnt_rsp{
unsigned long bcnokcnt;
};
struct getbcnerrcnt_parm{
unsigned int rsvd;
};
struct getbcnerrcnt_rsp{
unsigned long bcnerrcnt;
};
/* to get current TX power level */
struct getcurtxpwrlevel_parm{
unsigned int rsvd;
};
struct getcurtxpwrlevel_rsp{
unsigned short tx_power;
};
struct setprobereqextraie_parm {
unsigned char e_id;
unsigned char ie_len;
unsigned char ie[0];
};
struct setassocreqextraie_parm {
unsigned char e_id;
unsigned char ie_len;
unsigned char ie[0];
};
struct setproberspextraie_parm {
unsigned char e_id;
unsigned char ie_len;
unsigned char ie[0];
};
struct setassocrspextraie_parm {
unsigned char e_id;
unsigned char ie_len;
unsigned char ie[0];
};
struct addBaReq_parm {
unsigned int tid;
u8 addr[ETH_ALEN];
};
/*H2C Handler index: 46 */
struct set_ch_parm {
u8 ch;
u8 bw;
u8 ch_offset;
};
/*H2C Handler index: 59 */
struct SetChannelPlan_param {
u8 channel_plan;
};
/*H2C Handler index: 60 */
struct LedBlink_param {
struct led_8723a *pLed;
};
/*H2C Handler index: 61 */
struct SetChannelSwitch_param {
u8 new_ch_no;
};
/*H2C Handler index: 62 */
struct TDLSoption_param {
u8 addr[ETH_ALEN];
u8 option;
};
#define GEN_CMD_CODE(cmd) cmd ## _CMD_
/*
Result:
0x00: success
0x01: sucess, and check Response.
0x02: cmd ignored due to duplicated sequcne number
0x03: cmd dropped due to invalid cmd code
0x04: reserved.
*/
#define H2C_RSP_OFFSET 512
#define H2C_SUCCESS 0x00
#define H2C_SUCCESS_RSP 0x01
#define H2C_DUPLICATED 0x02
#define H2C_DROPPED 0x03
#define H2C_PARAMETERS_ERROR 0x04
#define H2C_REJECTED 0x05
#define H2C_CMD_OVERFLOW 0x06
#define H2C_RESERVED 0x07
u8 rtw_setassocsta_cmd(struct rtw_adapter *padapter, u8 *mac_addr);
u8 rtw_setstandby_cmd(struct rtw_adapter *padapter, uint action);
u8 rtw_sitesurvey_cmd23a(struct rtw_adapter *padapter, struct cfg80211_ssid *ssid, int ssid_num, struct rtw_ieee80211_channel *ch, int ch_num);
u8 rtw_createbss_cmd23a(struct rtw_adapter *padapter);
u8 rtw_createbss_cmd23a_ex(struct rtw_adapter *padapter, unsigned char *pbss, unsigned int sz);
u8 rtw_setphy_cmd(struct rtw_adapter *padapter, u8 modem, u8 ch);
u8 rtw_setstakey_cmd23a(struct rtw_adapter *padapter, u8 *psta, u8 unicast_key);
u8 rtw_clearstakey_cmd23a(struct rtw_adapter *padapter, u8 *psta, u8 entry, u8 enqueue);
u8 rtw_joinbss_cmd23a(struct rtw_adapter *padapter, struct wlan_network* pnetwork);
u8 rtw_disassoc_cmd23a(struct rtw_adapter *padapter, u32 deauth_timeout_ms, bool enqueue);
u8 rtw_setopmode_cmd23a(struct rtw_adapter *padapter, enum ndis_802_11_net_infra networktype);
u8 rtw_setdatarate_cmd(struct rtw_adapter *padapter, u8 *rateset);
u8 rtw_setbasicrate_cmd(struct rtw_adapter *padapter, u8 *rateset);
u8 rtw_setbbreg_cmd(struct rtw_adapter * padapter, u8 offset, u8 val);
u8 rtw_setrfreg_cmd(struct rtw_adapter * padapter, u8 offset, u32 val);
u8 rtw_getbbreg_cmd(struct rtw_adapter * padapter, u8 offset, u8 * pval);
u8 rtw_getrfreg_cmd(struct rtw_adapter * padapter, u8 offset, u8 * pval);
u8 rtw_setrfintfs_cmd(struct rtw_adapter *padapter, u8 mode);
u8 rtw_setrttbl_cmd(struct rtw_adapter *padapter, struct setratable_parm *prate_table);
u8 rtw_getrttbl_cmd(struct rtw_adapter *padapter, struct getratable_rsp *pval);
u8 rtw_gettssi_cmd(struct rtw_adapter *padapter, u8 offset,u8 *pval);
u8 rtw_setfwdig_cmd(struct rtw_adapter*padapter, u8 type);
u8 rtw_setfwra_cmd(struct rtw_adapter*padapter, u8 type);
u8 rtw_addbareq_cmd23a(struct rtw_adapter*padapter, u8 tid, u8 *addr);
u8 rtw_dynamic_chk_wk_cmd23a(struct rtw_adapter *adapter);
u8 rtw_lps_ctrl_wk_cmd23a(struct rtw_adapter*padapter, u8 lps_ctrl_type, u8 enqueue);
u8 rtw_ps_cmd23a(struct rtw_adapter*padapter);
#ifdef CONFIG_8723AU_AP_MODE
u8 rtw_chk_hi_queue_cmd23a(struct rtw_adapter*padapter);
#endif
u8 rtw_set_ch_cmd23a(struct rtw_adapter*padapter, u8 ch, u8 bw, u8 ch_offset, u8 enqueue);
u8 rtw_set_chplan_cmd(struct rtw_adapter*padapter, u8 chplan, u8 enqueue);
u8 rtw_led_blink_cmd(struct rtw_adapter*padapter, struct led_8723a *pLed);
u8 rtw_set_csa_cmd(struct rtw_adapter*padapter, u8 new_ch_no);
u8 rtw_tdls_cmd(struct rtw_adapter*padapter, u8 *addr, u8 option);
u8 rtw_c2h_wk_cmd23a(struct rtw_adapter *padapter, u8 *c2h_evt);
u8 rtw_drvextra_cmd_hdl23a(struct rtw_adapter *padapter, unsigned char *pbuf);
void rtw_survey_cmd_callback23a(struct rtw_adapter *padapter, struct cmd_obj *pcmd);
void rtw_disassoc_cmd23a_callback(struct rtw_adapter *padapter, struct cmd_obj *pcmd);
void rtw_joinbss_cmd23a_callback(struct rtw_adapter *padapter, struct cmd_obj *pcmd);
void rtw_createbss_cmd23a_callback(struct rtw_adapter *padapter, struct cmd_obj *pcmd);
void rtw_getbbrfreg_cmdrsp_callback23a(struct rtw_adapter *padapter, struct cmd_obj *pcmd);
void rtw_readtssi_cmdrsp_callback(struct rtw_adapter* padapter, struct cmd_obj *pcmd);
void rtw_setstaKey_cmdrsp_callback23a(struct rtw_adapter *padapter, struct cmd_obj *pcmd);
void rtw_setassocsta_cmdrsp_callback23a(struct rtw_adapter *padapter, struct cmd_obj *pcmd);
void rtw_getrttbl_cmdrsp_callback(struct rtw_adapter *padapter, struct cmd_obj *pcmd);
struct _cmd_callback {
u32 cmd_code;
void (*callback)(struct rtw_adapter *padapter, struct cmd_obj *cmd);
};
enum rtw_h2c_cmd {
GEN_CMD_CODE(_Read_MACREG) , /*0*/
GEN_CMD_CODE(_Write_MACREG) ,
GEN_CMD_CODE(_Read_BBREG) ,
GEN_CMD_CODE(_Write_BBREG) ,
GEN_CMD_CODE(_Read_RFREG) ,
GEN_CMD_CODE(_Write_RFREG) , /*5*/
GEN_CMD_CODE(_Read_EEPROM) ,
GEN_CMD_CODE(_Write_EEPROM) ,
GEN_CMD_CODE(_Read_EFUSE) ,
GEN_CMD_CODE(_Write_EFUSE) ,
GEN_CMD_CODE(_Read_CAM) , /*10*/
GEN_CMD_CODE(_Write_CAM) ,
GEN_CMD_CODE(_setBCNITV),
GEN_CMD_CODE(_setMBIDCFG),
GEN_CMD_CODE(_JoinBss), /*14*/
GEN_CMD_CODE(_DisConnect) , /*15*/
GEN_CMD_CODE(_CreateBss) ,
GEN_CMD_CODE(_SetOpMode) ,
GEN_CMD_CODE(_SiteSurvey), /*18*/
GEN_CMD_CODE(_SetAuth) ,
GEN_CMD_CODE(_SetKey) , /*20*/
GEN_CMD_CODE(_SetStaKey) ,
GEN_CMD_CODE(_SetAssocSta) ,
GEN_CMD_CODE(_DelAssocSta) ,
GEN_CMD_CODE(_SetStaPwrState) ,
GEN_CMD_CODE(_SetBasicRate) , /*25*/
GEN_CMD_CODE(_GetBasicRate) ,
GEN_CMD_CODE(_SetDataRate) ,
GEN_CMD_CODE(_GetDataRate) ,
GEN_CMD_CODE(_SetPhyInfo) ,
GEN_CMD_CODE(_GetPhyInfo) , /*30*/
GEN_CMD_CODE(_SetPhy) ,
GEN_CMD_CODE(_GetPhy) ,
GEN_CMD_CODE(_readRssi) ,
GEN_CMD_CODE(_readGain) ,
GEN_CMD_CODE(_SetAtim) , /*35*/
GEN_CMD_CODE(_SetPwrMode) ,
GEN_CMD_CODE(_JoinbssRpt),
GEN_CMD_CODE(_SetRaTable) ,
GEN_CMD_CODE(_GetRaTable) ,
GEN_CMD_CODE(_GetCCXReport), /*40*/
GEN_CMD_CODE(_GetDTMReport),
GEN_CMD_CODE(_GetTXRateStatistics),
GEN_CMD_CODE(_SetUsbSuspend),
GEN_CMD_CODE(_SetH2cLbk),
GEN_CMD_CODE(_AddBAReq) , /*45*/
GEN_CMD_CODE(_SetChannel), /*46*/
GEN_CMD_CODE(_SetTxPower),
GEN_CMD_CODE(_SwitchAntenna),
GEN_CMD_CODE(_SetCrystalCap),
GEN_CMD_CODE(_SetSingleCarrierTx), /*50*/
GEN_CMD_CODE(_SetSingleToneTx),/*51*/
GEN_CMD_CODE(_SetCarrierSuppressionTx),
GEN_CMD_CODE(_SetContinuousTx),
GEN_CMD_CODE(_SwitchBandwidth), /*54*/
GEN_CMD_CODE(_TX_Beacon), /*55*/
GEN_CMD_CODE(_Set_MLME_EVT), /*56*/
GEN_CMD_CODE(_Set_Drv_Extra), /*57*/
GEN_CMD_CODE(_Set_H2C_MSG), /*58*/
GEN_CMD_CODE(_SetChannelPlan), /*59*/
GEN_CMD_CODE(_LedBlink), /*60*/
GEN_CMD_CODE(_SetChannelSwitch), /*61*/
GEN_CMD_CODE(_TDLS), /*62*/
MAX_H2CCMD
};
#define _GetBBReg_CMD_ _Read_BBREG_CMD_
#define _SetBBReg_CMD_ _Write_BBREG_CMD_
#define _GetRFReg_CMD_ _Read_RFREG_CMD_
#define _SetRFReg_CMD_ _Write_RFREG_CMD_
extern struct _cmd_callback rtw_cmd_callback[];
#endif /* _CMD_H_ */

192
drivers/staging/rtl8723au/include/rtw_debug.h Normal file
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@ -0,0 +1,192 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*
******************************************************************************/
#ifndef __RTW_DEBUG_H__
#define __RTW_DEBUG_H__
#include <osdep_service.h>
#include <drv_types.h>
#define _drv_always_ 1
#define _drv_emerg_ 2
#define _drv_alert_ 3
#define _drv_err_ 4
#define _drv_warning_ 5
#define _drv_notice_ 6
#define _drv_info_ 7
#define _drv_debug_ 8
#define _module_rtl871x_xmit_c_ BIT(0)
#define _module_xmit_osdep_c_ BIT(1)
#define _module_rtl871x_recv_c_ BIT(2)
#define _module_recv_osdep_c_ BIT(3)
#define _module_rtl871x_mlme_c_ BIT(4)
#define _module_mlme_osdep_c_ BIT(5)
#define _module_rtl871x_sta_mgt_c_ BIT(6)
#define _module_rtl871x_cmd_c_ BIT(7)
#define _module_cmd_osdep_c_ BIT(8)
#define _module_rtl871x_io_c_ BIT(9)
#define _module_io_osdep_c_ BIT(10)
#define _module_os_intfs_c_ BIT(11)
#define _module_rtl871x_security_c_ BIT(12)
#define _module_rtl871x_eeprom_c_ BIT(13)
#define _module_hal_init_c_ BIT(14)
#define _module_hci_hal_init_c_ BIT(15)
#define _module_rtl871x_ioctl_c_ BIT(16)
#define _module_rtl871x_ioctl_set_c_ BIT(17)
#define _module_rtl871x_ioctl_query_c_ BIT(18)
#define _module_rtl871x_pwrctrl_c_ BIT(19)
#define _module_hci_intfs_c_ BIT(20)
#define _module_hci_ops_c_ BIT(21)
#define _module_osdep_service_c_ BIT(22)
#define _module_mp_ BIT(23)
#define _module_hci_ops_os_c_ BIT(24)
#define _module_rtl871x_ioctl_os_c BIT(25)
#define _module_rtl8712_cmd_c_ BIT(26)
#define _module_rtl8192c_xmit_c_ BIT(28)
#define _module_hal_xmit_c_ BIT(28) /* duplication intentional */
#define _module_efuse_ BIT(29)
#define _module_rtl8712_recv_c_ BIT(30)
#define _module_rtl8712_led_c_ BIT(31)
#undef _MODULE_DEFINE_
#if defined _RTW_XMIT_C_
#define _MODULE_DEFINE_ _module_rtl871x_xmit_c_
#elif defined _XMIT_OSDEP_C_
#define _MODULE_DEFINE_ _module_xmit_osdep_c_
#elif defined _RTW_RECV_C_
#define _MODULE_DEFINE_ _module_rtl871x_recv_c_
#elif defined _RECV_OSDEP_C_
#define _MODULE_DEFINE_ _module_recv_osdep_c_
#elif defined _RTW_MLME_C_
#define _MODULE_DEFINE_ _module_rtl871x_mlme_c_
#elif defined _MLME_OSDEP_C_
#define _MODULE_DEFINE_ _module_mlme_osdep_c_
#elif defined _RTW_MLME_EXT_C_
#define _MODULE_DEFINE_ 1
#elif defined _RTW_STA_MGT_C_
#define _MODULE_DEFINE_ _module_rtl871x_sta_mgt_c_
#elif defined _RTW_CMD_C_
#define _MODULE_DEFINE_ _module_rtl871x_cmd_c_
#elif defined _CMD_OSDEP_C_
#define _MODULE_DEFINE_ _module_cmd_osdep_c_
#elif defined _RTW_IO_C_
#define _MODULE_DEFINE_ _module_rtl871x_io_c_
#elif defined _IO_OSDEP_C_
#define _MODULE_DEFINE_ _module_io_osdep_c_
#elif defined _OS_INTFS_C_
#define _MODULE_DEFINE_ _module_os_intfs_c_
#elif defined _RTW_SECURITY_C_
#define _MODULE_DEFINE_ _module_rtl871x_security_c_
#elif defined _RTW_EEPROM_C_
#define _MODULE_DEFINE_ _module_rtl871x_eeprom_c_
#elif defined _HAL_INTF_C_
#define _MODULE_DEFINE_ _module_hal_init_c_
#elif (defined _HCI_HAL_INIT_C_) || (defined _SDIO_HALINIT_C_)
#define _MODULE_DEFINE_ _module_hci_hal_init_c_
#elif defined _RTL871X_IOCTL_C_
#define _MODULE_DEFINE_ _module_rtl871x_ioctl_c_
#elif defined _RTL871X_IOCTL_SET_C_
#define _MODULE_DEFINE_ _module_rtl871x_ioctl_set_c_
#elif defined _RTL871X_IOCTL_QUERY_C_
#define _MODULE_DEFINE_ _module_rtl871x_ioctl_query_c_
#elif defined _RTL871X_PWRCTRL_C_
#define _MODULE_DEFINE_ _module_rtl871x_pwrctrl_c_
#elif defined _RTW_PWRCTRL_C_
#define _MODULE_DEFINE_ 1
#elif defined _HCI_INTF_C_
#define _MODULE_DEFINE_ _module_hci_intfs_c_
#elif defined _HCI_OPS_C_
#define _MODULE_DEFINE_ _module_hci_ops_c_
#elif defined _SDIO_OPS_C_
#define _MODULE_DEFINE_ 1
#elif defined _OSDEP_HCI_INTF_C_
#define _MODULE_DEFINE_ _module_hci_intfs_c_
#elif defined _OSDEP_SERVICE_C_
#define _MODULE_DEFINE_ _module_osdep_service_c_
#elif defined _HCI_OPS_OS_C_
#define _MODULE_DEFINE_ _module_hci_ops_os_c_
#elif defined _RTL871X_IOCTL_LINUX_C_
#define _MODULE_DEFINE_ _module_rtl871x_ioctl_os_c
#elif defined _RTL8712_CMD_C_
#define _MODULE_DEFINE_ _module_rtl8712_cmd_c_
#elif defined _RTL8192C_XMIT_C_
#define _MODULE_DEFINE_ 1
#elif defined _RTL8723AS_XMIT_C_
#define _MODULE_DEFINE_ 1
#elif defined _RTL8712_RECV_C_
#define _MODULE_DEFINE_ _module_rtl8712_recv_c_
#elif defined _RTL8192CU_RECV_C_
#define _MODULE_DEFINE_ _module_rtl8712_recv_c_
#elif defined _RTL871X_MLME_EXT_C_
#define _MODULE_DEFINE_ _module_mlme_osdep_c_
#elif defined _RTW_MP_C_
#define _MODULE_DEFINE_ _module_mp_
#elif defined _RTW_MP_IOCTL_C_
#define _MODULE_DEFINE_ _module_mp_
#elif defined _RTW_EFUSE_C_
#define _MODULE_DEFINE_ _module_efuse_
#endif
#define DRIVER_PREFIX "RTL8723AU: "
#define DEBUG_LEVEL (_drv_err_)
#define DBG_8723A_LEVEL(_level, fmt, arg...) \
do { \
if (_level <= GlobalDebugLevel23A) \
pr_info(DRIVER_PREFIX"ERROR " fmt, ##arg);\
} while (0)
#define DBG_8723A(...) \
do { \
if (_drv_err_ <= GlobalDebugLevel23A) \
pr_info(DRIVER_PREFIX __VA_ARGS__); \
} while (0)
#define MSG_8723A(...) \
do { \
if (_drv_err_ <= GlobalDebugLevel23A) \
pr_info(DRIVER_PREFIX __VA_ARGS__); \
} while (0)
extern u32 GlobalDebugLevel23A;
#define RT_TRACE(_Comp, _Level, Fmt) \
do { \
if (_Level <= GlobalDebugLevel23A) { \
pr_info("%s [0x%08x,%d]", DRIVER_PREFIX, \
(unsigned int)_Comp, _Level); \
pr_info Fmt; \
} \
} while (0)
#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, \
_HexDataLen) \
if (_Level <= GlobalDebugLevel23A) { \
int __i; \
u8 *ptr = (u8 *)_HexData; \
pr_info("%s", DRIVER_PREFIX); \
pr_info(_TitleString); \
for (__i = 0; __i < (int)_HexDataLen; __i++) { \
printk("%02X%s", ptr[__i], \
(((__i + 1) % 4) == 0) ? " " : " "); \
if (((__i + 1) % 16) == 0) \
printk("\n"); \
} \
printk("\n"); \
}
#endif /* __RTW_DEBUG_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTW_EEPROM_H__
#define __RTW_EEPROM_H__
#include <osdep_service.h>
#include <drv_types.h>
#define RTL8712_EEPROM_ID 0x8712
/* define EEPROM_MAX_SIZE 256 */
#define HWSET_MAX_SIZE_512 512
#define EEPROM_MAX_SIZE HWSET_MAX_SIZE_512
#define CLOCK_RATE 50 /* 100us */
/* EEPROM opcodes */
#define EEPROM_READ_OPCODE 06
#define EEPROM_WRITE_OPCODE 05
#define EEPROM_ERASE_OPCODE 07
#define EEPROM_EWEN_OPCODE 19 /* Erase/write enable */
#define EEPROM_EWDS_OPCODE 16 /* Erase/write disable */
/* Country codes */
#define USA 0x555320
#define EUROPE 0x1 /* temp, should be provided later */
#define JAPAN 0x2 /* temp, should be provided later */
#define EEPROM_CID_DEFAULT 0x0
#define EEPROM_CID_ALPHA 0x1
#define EEPROM_CID_Senao 0x3
#define EEPROM_CID_NetCore 0x5
#define EEPROM_CID_CAMEO 0X8
#define EEPROM_CID_SITECOM 0x9
#define EEPROM_CID_COREGA 0xB
#define EEPROM_CID_EDIMAX_BELKIN 0xC
#define EEPROM_CID_SERCOMM_BELKIN 0xE
#define EEPROM_CID_CAMEO1 0xF
#define EEPROM_CID_WNC_COREGA 0x12
#define EEPROM_CID_CLEVO 0x13
#define EEPROM_CID_WHQL 0xFE /* added by chiyoko for dtm, 20090108 */
/* */
/* Customer ID, note that: */
/* This variable is initiailzed through EEPROM or registry, */
/* however, its definition may be different with that in EEPROM for */
/* EEPROM size consideration. So, we have to perform proper translation between them. */
/* Besides, CustomerID of registry has precedence of that of EEPROM. */
/* defined below. 060703, by rcnjko. */
/* */
enum rt_customer_id
{
RT_CID_DEFAULT = 0,
RT_CID_8187_ALPHA0 = 1,
RT_CID_8187_SERCOMM_PS = 2,
RT_CID_8187_HW_LED = 3,
RT_CID_8187_NETGEAR = 4,
RT_CID_WHQL = 5,
RT_CID_819x_CAMEO = 6,
RT_CID_819x_RUNTOP = 7,
RT_CID_819x_Senao = 8,
RT_CID_TOSHIBA = 9, /* Merge by Jacken, 2008/01/31. */
RT_CID_819x_Netcore = 10,
RT_CID_Nettronix = 11,
RT_CID_DLINK = 12,
RT_CID_PRONET = 13,
RT_CID_COREGA = 14,
RT_CID_CHINA_MOBILE = 15,
RT_CID_819x_ALPHA = 16,
RT_CID_819x_Sitecom = 17,
RT_CID_CCX = 18, /* It's set under CCX logo test and isn't demanded for CCX functions, but for test behavior like retry limit and tx report. By Bruce, 2009-02-17. */
RT_CID_819x_Lenovo = 19,
RT_CID_819x_QMI = 20,
RT_CID_819x_Edimax_Belkin = 21,
RT_CID_819x_Sercomm_Belkin = 22,
RT_CID_819x_CAMEO1 = 23,
RT_CID_819x_MSI = 24,
RT_CID_819x_Acer = 25,
RT_CID_819x_AzWave_ASUS = 26,
RT_CID_819x_AzWave = 27, /* For AzWave in PCIe, The ID is AzWave use and not only Asus */
RT_CID_819x_HP = 28,
RT_CID_819x_WNC_COREGA = 29,
RT_CID_819x_Arcadyan_Belkin = 30,
RT_CID_819x_SAMSUNG = 31,
RT_CID_819x_CLEVO = 32,
RT_CID_819x_DELL = 33,
RT_CID_819x_PRONETS = 34,
RT_CID_819x_Edimax_ASUS = 35,
RT_CID_819x_CAMEO_NETGEAR = 36,
RT_CID_PLANEX = 37,
RT_CID_CC_C = 38,
RT_CID_819x_Xavi = 39,
RT_CID_819x_FUNAI_TV = 40,
RT_CID_819x_ALPHA_WD=41,
};
struct eeprom_priv {
u8 bautoload_fail_flag;
u8 bloadfile_fail_flag;
u8 bloadmac_fail_flag;
/* u8 bempty; */
/* u8 sys_config; */
u8 mac_addr[6]; /* PermanentAddress */
/* u8 config0; */
u16 channel_plan;
/* u8 country_string[3]; */
/* u8 tx_power_b[15]; */
/* u8 tx_power_g[15]; */
/* u8 tx_power_a[201]; */
u8 EepromOrEfuse;
u8 efuse_eeprom_data[HWSET_MAX_SIZE_512]; /* 92C:256bytes, 88E:512bytes, we use union set (512bytes) */
};
void eeprom_write16(struct rtw_adapter *padapter, u16 reg, u16 data);
u16 eeprom_read16(struct rtw_adapter *padapter, u16 reg);
void read_eeprom_content(struct rtw_adapter *padapter);
void eeprom_read_sz(struct rtw_adapter * padapter, u16 reg,u8* data, u32 sz);
void read_eeprom_content_by_attrib(struct rtw_adapter *padapter);
#endif /* __RTL871X_EEPROM_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*
******************************************************************************/
#ifndef __RTW_EFUSE_H__
#define __RTW_EFUSE_H__
#include <osdep_service.h>
#define EFUSE_ERROE_HANDLE 1
#define PG_STATE_HEADER 0x01
#define PG_STATE_WORD_0 0x02
#define PG_STATE_WORD_1 0x04
#define PG_STATE_WORD_2 0x08
#define PG_STATE_WORD_3 0x10
#define PG_STATE_DATA 0x20
#define PG_SWBYTE_H 0x01
#define PG_SWBYTE_L 0x02
#define PGPKT_DATA_SIZE 8
#define EFUSE_WIFI 0
#define EFUSE_BT 1
enum _EFUSE_DEF_TYPE {
TYPE_EFUSE_MAX_SECTION = 0,
TYPE_EFUSE_REAL_CONTENT_LEN = 1,
TYPE_AVAILABLE_EFUSE_BYTES_BANK = 2,
TYPE_AVAILABLE_EFUSE_BYTES_TOTAL = 3,
TYPE_EFUSE_MAP_LEN = 4,
TYPE_EFUSE_PROTECT_BYTES_BANK = 5,
TYPE_EFUSE_CONTENT_LEN_BANK = 6,
};
/* E-Fuse */
#define EFUSE_MAP_SIZE 256
#define EFUSE_MAX_SIZE 512
/* end of E-Fuse */
#define EFUSE_MAX_MAP_LEN 256
#define EFUSE_MAX_HW_SIZE 512
#define EFUSE_MAX_SECTION_BASE 16
#define EXT_HEADER(header) ((header & 0x1F ) == 0x0F)
#define ALL_WORDS_DISABLED(wde) ((wde & 0x0F) == 0x0F)
#define GET_HDR_OFFSET_2_0(header) ( (header & 0xE0) >> 5)
#define EFUSE_REPEAT_THRESHOLD_ 3
/* */
/* The following is for BT Efuse definition */
/* */
#define EFUSE_BT_MAX_MAP_LEN 1024
#define EFUSE_MAX_BANK 4
#define EFUSE_MAX_BT_BANK (EFUSE_MAX_BANK-1)
/* */
/*--------------------------Define Parameters-------------------------------*/
#define EFUSE_MAX_WORD_UNIT 4
/*------------------------------Define structure----------------------------*/
struct pg_pkt_struct {
u8 offset;
u8 word_en;
u8 data[8];
u8 word_cnts;
};
/*------------------------Export global variable----------------------------*/
u8 efuse_GetCurrentSize23a(struct rtw_adapter *padapter, u16 *size);
u16 efuse_GetMaxSize23a(struct rtw_adapter *padapter);
u8 rtw_efuse_access23a(struct rtw_adapter *padapter, u8 bRead, u16 start_addr, u16 cnts, u8 *data);
u8 rtw_efuse_map_read23a(struct rtw_adapter *padapter, u16 addr, u16 cnts, u8 *data);
u8 rtw_efuse_map_write(struct rtw_adapter *padapter, u16 addr, u16 cnts, u8 *data);
u8 rtw_BT_efuse_map_read23a(struct rtw_adapter *padapter, u16 addr, u16 cnts, u8 *data);
u8 rtw_BT_efuse_map_write(struct rtw_adapter *padapter, u16 addr, u16 cnts, u8 *data);
u16 Efuse_GetCurrentSize23a(struct rtw_adapter *pAdapter, u8 efuseType);
u8 Efuse_CalculateWordCnts23a(u8 word_en);
void ReadEFuseByte23a(struct rtw_adapter *Adapter, u16 _offset, u8 *pbuf);
void EFUSE_GetEfuseDefinition23a(struct rtw_adapter *pAdapter, u8 efuseType, u8 type, void *pOut);
u8 efuse_OneByteRead23a(struct rtw_adapter *pAdapter, u16 addr, u8 *data);
u8 efuse_OneByteWrite23a(struct rtw_adapter *pAdapter, u16 addr, u8 data);
void Efuse_PowerSwitch23a(struct rtw_adapter *pAdapter,u8 bWrite,u8 PwrState);
int Efuse_PgPacketRead23a(struct rtw_adapter *pAdapter, u8 offset, u8 *data);
int Efuse_PgPacketWrite23a(struct rtw_adapter *pAdapter, u8 offset, u8 word_en, u8 *data);
void efuse_WordEnableDataRead23a(u8 word_en, u8 *sourdata, u8 *targetdata);
u8 Efuse_WordEnableDataWrite23a(struct rtw_adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data);
u8 EFUSE_Read1Byte23a(struct rtw_adapter *pAdapter, u16 Address);
void EFUSE_ShadowMapUpdate23a(struct rtw_adapter *pAdapter, u8 efuseType);
void EFUSE_ShadowRead23a(struct rtw_adapter *pAdapter, u8 Type, u16 Offset, u32 *Value);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _RTW_EVENT_H_
#define _RTW_EVENT_H_
#include <osdep_service.h>
#include <wlan_bssdef.h>
/*
Used to report a bss has been scanned
*/
struct survey_event {
struct wlan_bssid_ex bss;
};
/*
Used to report that the requested site survey has been done.
bss_cnt indicates the number of bss that has been reported.
*/
struct surveydone_event {
unsigned int bss_cnt;
};
/*
Used to report the link result of joinning the given bss
join_res:
-1: authentication fail
-2: association fail
> 0: TID
*/
struct joinbss_event {
struct wlan_network network;
};
/*
Used to report a given STA has joinned the created BSS.
It is used in AP/Ad-HoC(M) mode.
*/
struct stassoc_event {
unsigned char macaddr[6];
unsigned char rsvd[2];
int cam_id;
};
struct stadel_event {
unsigned char macaddr[6];
unsigned char rsvd[2]; /* for reason */
int mac_id;
};
struct addba_event
{
unsigned int tid;
};
#define GEN_EVT_CODE(event) event ## _EVT_
struct fwevent {
u32 parmsize;
void (*event_callback)(struct rtw_adapter *dev, u8 *pbuf);
};
#define C2HEVENT_SZ 32
struct event_node{
unsigned char *node;
unsigned char evt_code;
unsigned short evt_sz;
volatile int *caller_ff_tail;
int caller_ff_sz;
};
struct c2hevent_queue {
volatile int head;
volatile int tail;
struct event_node nodes[C2HEVENT_SZ];
unsigned char seq;
};
#define NETWORK_QUEUE_SZ 4
struct network_queue {
volatile int head;
volatile int tail;
struct wlan_bssid_ex networks[NETWORK_QUEUE_SZ];
};
#endif /* _WLANEVENT_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _RTW_HT_H_
#define _RTW_HT_H_
#include <osdep_service.h>
#include "linux/ieee80211.h"
#include "wifi.h"
struct ht_priv
{
u32 ht_option;
u32 ampdu_enable;/* for enable Tx A-MPDU */
/* u8 baddbareq_issued[16]; */
u32 tx_amsdu_enable;/* for enable Tx A-MSDU */
u32 tx_amdsu_maxlen; /* 1: 8k, 0:4k ; default:8k, for tx */
u32 rx_ampdu_maxlen; /* for rx reordering ctrl win_sz, updated when join_callback. */
u8 bwmode;/* */
u8 ch_offset;/* PRIME_CHNL_OFFSET */
u8 sgi;/* short GI */
/* for processing Tx A-MPDU */
u8 agg_enable_bitmap;
/* u8 ADDBA_retry_count; */
u8 candidate_tid_bitmap;
struct ieee80211_ht_cap ht_cap;
};
#endif /* _RTL871X_HT_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _RTW_IO_H_
#define _RTW_IO_H_
#include <osdep_service.h>
#include <osdep_intf.h>
#include <asm/byteorder.h>
#include <linux/semaphore.h>
#include <linux/list.h>
/* include <linux/smp_lock.h> */
#include <linux/spinlock.h>
#include <asm/atomic.h>
#include <linux/usb.h>
#include <linux/usb/ch9.h>
#define rtw_usb_buffer_alloc(dev, size, dma) usb_alloc_coherent((dev), (size), (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL), (dma))
#define rtw_usb_buffer_free(dev, size, addr, dma) usb_free_coherent((dev), (size), (addr), (dma))
#define NUM_IOREQ 8
#define MAX_PROT_SZ (64-16)
#define _IOREADY 0
#define _IO_WAIT_COMPLETE 1
#define _IO_WAIT_RSP 2
/* IO COMMAND TYPE */
#define _IOSZ_MASK_ (0x7F)
#define _IO_WRITE_ BIT(7)
#define _IO_FIXED_ BIT(8)
#define _IO_BURST_ BIT(9)
#define _IO_BYTE_ BIT(10)
#define _IO_HW_ BIT(11)
#define _IO_WORD_ BIT(12)
#define _IO_SYNC_ BIT(13)
#define _IO_CMDMASK_ (0x1F80)
/*
For prompt mode accessing, caller shall free io_req
Otherwise, io_handler will free io_req
*/
/* IO STATUS TYPE */
#define _IO_ERR_ BIT(2)
#define _IO_SUCCESS_ BIT(1)
#define _IO_DONE_ BIT(0)
#define IO_RD32 (_IO_SYNC_ | _IO_WORD_)
#define IO_RD16 (_IO_SYNC_ | _IO_HW_)
#define IO_RD8 (_IO_SYNC_ | _IO_BYTE_)
#define IO_RD32_ASYNC (_IO_WORD_)
#define IO_RD16_ASYNC (_IO_HW_)
#define IO_RD8_ASYNC (_IO_BYTE_)
#define IO_WR32 (_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_)
#define IO_WR16 (_IO_WRITE_ | _IO_SYNC_ | _IO_HW_)
#define IO_WR8 (_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_)
#define IO_WR32_ASYNC (_IO_WRITE_ | _IO_WORD_)
#define IO_WR16_ASYNC (_IO_WRITE_ | _IO_HW_)
#define IO_WR8_ASYNC (_IO_WRITE_ | _IO_BYTE_)
/*
Only Sync. burst accessing is provided.
*/
#define IO_WR_BURST(x) (_IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | ( (x) & _IOSZ_MASK_))
#define IO_RD_BURST(x) (_IO_SYNC_ | _IO_BURST_ | ( (x) & _IOSZ_MASK_))
/* below is for the intf_option bit defition... */
#define _INTF_ASYNC_ BIT(0) /* support async io */
struct intf_priv;
struct intf_hdl;
struct io_queue;
struct _io_ops
{
u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata);
int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
void (*_sync_irp_protocol_rw)(struct io_queue *pio_q);
u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr);
u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, struct recv_buf *rbuf);
u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, struct xmit_buf *pmem);
u32 (*_write_scsi)(struct intf_hdl *pintfhdl,u32 cnt, u8 *pmem);
void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
};
struct io_req {
struct list_head list;
u32 addr;
volatile u32 val;
u32 command;
u32 status;
u8 *pbuf;
struct semaphore sema;
void (*_async_io_callback)(struct rtw_adapter *padater, struct io_req *pio_req, u8 *cnxt);
u8 *cnxt;
};
struct intf_hdl {
struct rtw_adapter *padapter;
struct dvobj_priv *pintf_dev;/* pointer to &(padapter->dvobjpriv); */
struct _io_ops io_ops;
};
struct reg_protocol_rd {
#ifdef __LITTLE_ENDIAN
/* DW1 */
u32 NumOfTrans:4;
u32 Reserved1:4;
u32 Reserved2:24;
/* DW2 */
u32 ByteCount:7;
u32 WriteEnable:1; /* 0:read, 1:write */
u32 FixOrContinuous:1; /* 0:continuous, 1: Fix */
u32 BurstMode:1;
u32 Byte1Access:1;
u32 Byte2Access:1;
u32 Byte4Access:1;
u32 Reserved3:3;
u32 Reserved4:16;
/* DW3 */
u32 BusAddress;
/* DW4 */
/* u32 Value; */
#else
/* DW1 */
u32 Reserved1 :4;
u32 NumOfTrans :4;
u32 Reserved2 :24;
/* DW2 */
u32 WriteEnable : 1;
u32 ByteCount :7;
u32 Reserved3 : 3;
u32 Byte4Access : 1;
u32 Byte2Access : 1;
u32 Byte1Access : 1;
u32 BurstMode :1 ;
u32 FixOrContinuous : 1;
u32 Reserved4 : 16;
/* DW3 */
u32 BusAddress;
/* DW4 */
/* u32 Value; */
#endif
};
struct reg_protocol_wt {
#ifdef __LITTLE_ENDIAN
/* DW1 */
u32 NumOfTrans:4;
u32 Reserved1:4;
u32 Reserved2:24;
/* DW2 */
u32 ByteCount:7;
u32 WriteEnable:1; /* 0:read, 1:write */
u32 FixOrContinuous:1; /* 0:continuous, 1: Fix */
u32 BurstMode:1;
u32 Byte1Access:1;
u32 Byte2Access:1;
u32 Byte4Access:1;
u32 Reserved3:3;
u32 Reserved4:16;
/* DW3 */
u32 BusAddress;
/* DW4 */
u32 Value;
#else
/* DW1 */
u32 Reserved1 :4;
u32 NumOfTrans :4;
u32 Reserved2 :24;
/* DW2 */
u32 WriteEnable : 1;
u32 ByteCount :7;
u32 Reserved3 : 3;
u32 Byte4Access : 1;
u32 Byte2Access : 1;
u32 Byte1Access : 1;
u32 BurstMode :1 ;
u32 FixOrContinuous : 1;
u32 Reserved4 : 16;
/* DW3 */
u32 BusAddress;
/* DW4 */
u32 Value;
#endif
};
/*
Below is the data structure used by _io_handler
*/
struct io_queue {
spinlock_t lock;
struct list_head free_ioreqs;
struct list_head pending; /* The io_req list that will be served in the single protocol read/write. */
struct list_head processing;
u8 *free_ioreqs_buf; /* 4-byte aligned */
u8 *pallocated_free_ioreqs_buf;
struct intf_hdl intf;
};
struct io_priv{
struct rtw_adapter *padapter;
struct intf_hdl intf;
};
uint ioreq_flush(struct rtw_adapter *adapter, struct io_queue *ioqueue);
void sync_ioreq_enqueue(struct io_req *preq,struct io_queue *ioqueue);
uint sync_ioreq_flush(struct rtw_adapter *adapter, struct io_queue *ioqueue);
uint free_ioreq(struct io_req *preq, struct io_queue *pio_queue);
struct io_req *alloc_ioreq(struct io_queue *pio_q);
uint register_intf_hdl(u8 *dev, struct intf_hdl *pintfhdl);
void unregister_intf_hdl(struct intf_hdl *pintfhdl);
void _rtw_attrib_read(struct rtw_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
void _rtw_attrib_write(struct rtw_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
u8 _rtw_read823a(struct rtw_adapter *adapter, u32 addr);
u16 _rtw_read1623a(struct rtw_adapter *adapter, u32 addr);
u32 _rtw_read3223a(struct rtw_adapter *adapter, u32 addr);
void _rtw_read_mem23a(struct rtw_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
void _rtw_read_port23a(struct rtw_adapter *adapter, u32 addr, u32 cnt, struct recv_buf *rbuf);
void _rtw_read_port23a_cancel(struct rtw_adapter *adapter);
int _rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val);
int _rtw_write1623a(struct rtw_adapter *adapter, u32 addr, u16 val);
int _rtw_write3223a(struct rtw_adapter *adapter, u32 addr, u32 val);
int _rtw_writeN23a(struct rtw_adapter *adapter, u32 addr, u32 length, u8 *pdata);
int _rtw_write823a_async23a(struct rtw_adapter *adapter, u32 addr, u8 val);
int _rtw_write1623a_async(struct rtw_adapter *adapter, u32 addr, u16 val);
int _rtw_write3223a_async23a(struct rtw_adapter *adapter, u32 addr, u32 val);
void _rtw_write_mem23a(struct rtw_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
u32 _rtw_write_port23a(struct rtw_adapter *adapter, u32 addr, u32 cnt, struct xmit_buf *pmem);
u32 _rtw_write_port23a_and_wait23a(struct rtw_adapter *adapter, u32 addr, u32 cnt, struct xmit_buf *pmem, int timeout_ms);
void _rtw_write_port23a_cancel(struct rtw_adapter *adapter);
#ifdef DBG_IO
bool match_read_sniff_ranges(u16 addr, u16 len);
bool match_write_sniff_ranges(u16 addr, u16 len);
u8 dbg_rtw_read823a(struct rtw_adapter *adapter, u32 addr, const char *caller, const int line);
u16 dbg_rtw_read1623a(struct rtw_adapter *adapter, u32 addr, const char *caller, const int line);
u32 dbg_rtw_read3223a(struct rtw_adapter *adapter, u32 addr, const char *caller, const int line);
int dbg_rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val, const char *caller, const int line);
int dbg_rtw_write1623a(struct rtw_adapter *adapter, u32 addr, u16 val, const char *caller, const int line);
int dbg_rtw_write3223a(struct rtw_adapter *adapter, u32 addr, u32 val, const char *caller, const int line);
int dbg_rtw_writeN23a(struct rtw_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line);
#define rtw_read8(adapter, addr) dbg_rtw_read823a((adapter), (addr), __FUNCTION__, __LINE__)
#define rtw_read16(adapter, addr) dbg_rtw_read1623a((adapter), (addr), __FUNCTION__, __LINE__)
#define rtw_read32(adapter, addr) dbg_rtw_read3223a((adapter), (addr), __FUNCTION__, __LINE__)
#define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem23a((adapter), (addr), (cnt), (mem))
#define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port23a((adapter), (addr), (cnt), (mem))
#define rtw_read_port_cancel(adapter) _rtw_read_port23a_cancel((adapter))
#define rtw_write8(adapter, addr, val) dbg_rtw_write823a((adapter), (addr), (val), __FUNCTION__, __LINE__)
#define rtw_write16(adapter, addr, val) dbg_rtw_write1623a((adapter), (addr), (val), __FUNCTION__, __LINE__)
#define rtw_write32(adapter, addr, val) dbg_rtw_write3223a((adapter), (addr), (val), __FUNCTION__, __LINE__)
#define rtw_writeN(adapter, addr, length, data) dbg_rtw_writeN23a((adapter), (addr), (length), (data), __FUNCTION__, __LINE__)
#define rtw_write8_async(adapter, addr, val) _rtw_write823a_async23a((adapter), (addr), (val))
#define rtw_write16_async(adapter, addr, val) _rtw_write1623a_async((adapter), (addr), (val))
#define rtw_write32_async(adapter, addr, val) _rtw_write3223a_async23a((adapter), (addr), (val))
#define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem23a((adapter), addr, cnt, mem)
#define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port23a(adapter, addr, cnt, mem)
#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port23a_and_wait23a((adapter), (addr), (cnt), (mem), (timeout_ms))
#define rtw_write_port_cancel(adapter) _rtw_write_port23a_cancel(adapter)
#else /* DBG_IO */
#define rtw_read8(adapter, addr) _rtw_read823a((adapter), (addr))
#define rtw_read16(adapter, addr) _rtw_read1623a((adapter), (addr))
#define rtw_read32(adapter, addr) _rtw_read3223a((adapter), (addr))
#define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem23a((adapter), (addr), (cnt), (mem))
#define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port23a((adapter), (addr), (cnt), (mem))
#define rtw_read_port_cancel(adapter) _rtw_read_port23a_cancel((adapter))
#define rtw_write8(adapter, addr, val) _rtw_write823a((adapter), (addr), (val))
#define rtw_write16(adapter, addr, val) _rtw_write1623a((adapter), (addr), (val))
#define rtw_write32(adapter, addr, val) _rtw_write3223a((adapter), (addr), (val))
#define rtw_writeN(adapter, addr, length, data) _rtw_writeN23a((adapter), (addr), (length), (data))
#define rtw_write8_async(adapter, addr, val) _rtw_write823a_async23a((adapter), (addr), (val))
#define rtw_write16_async(adapter, addr, val) _rtw_write1623a_async((adapter), (addr), (val))
#define rtw_write32_async(adapter, addr, val) _rtw_write3223a_async23a((adapter), (addr), (val))
#define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem23a((adapter), (addr), (cnt), (mem))
#define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port23a((adapter), (addr), (cnt), (mem))
#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port23a_and_wait23a((adapter), (addr), (cnt), (mem), (timeout_ms))
#define rtw_write_port_cancel(adapter) _rtw_write_port23a_cancel((adapter))
#endif /* DBG_IO */
void rtw_write_scsi(struct rtw_adapter *adapter, u32 cnt, u8 *pmem);
/* ioreq */
void ioreq_read8(struct rtw_adapter *adapter, u32 addr, u8 *pval);
void ioreq_read16(struct rtw_adapter *adapter, u32 addr, u16 *pval);
void ioreq_read32(struct rtw_adapter *adapter, u32 addr, u32 *pval);
void ioreq_write8(struct rtw_adapter *adapter, u32 addr, u8 val);
void ioreq_write16(struct rtw_adapter *adapter, u32 addr, u16 val);
void ioreq_write32(struct rtw_adapter *adapter, u32 addr, u32 val);
int rtw_init_io_priv23a(struct rtw_adapter *padapter, void (*set_intf_ops)(struct _io_ops *pops));
uint alloc_io_queue(struct rtw_adapter *adapter);
void free_io_queue(struct rtw_adapter *adapter);
void async_bus_io(struct io_queue *pio_q);
void bus_sync_io(struct io_queue *pio_q);
u32 _ioreq2rwmem(struct io_queue *pio_q);
void dev_power_down(struct rtw_adapter * Adapter, u8 bpwrup);
#define PlatformEFIOWrite1Byte(_a,_b,_c) \
rtw_write8(_a,_b,_c)
#define PlatformEFIOWrite2Byte(_a,_b,_c) \
rtw_write16(_a,_b,_c)
#define PlatformEFIOWrite4Byte(_a,_b,_c) \
rtw_write32(_a,_b,_c)
#define PlatformEFIORead1Byte(_a,_b) \
rtw_read8(_a,_b)
#define PlatformEFIORead2Byte(_a,_b) \
rtw_read16(_a,_b)
#define PlatformEFIORead4Byte(_a,_b) \
rtw_read32(_a,_b)
#endif /* _RTL8711_IO_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _RTW_IOCTL_H_
#define _RTW_IOCTL_H_
#include <osdep_service.h>
#include <drv_types.h>
#if defined(CONFIG_WIRELESS_EXT)
extern struct iw_handler_def rtw_handlers_def;
#endif
#endif /* #ifndef __INC_CEINFO_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTW_IOCTL_SET_H_
#define __RTW_IOCTL_SET_H_
#include <drv_types.h>
struct bssid_info {
unsigned char BSSID[6];
u8 PMKID[16];
};
u8 rtw_set_802_11_authentication_mode23a(struct rtw_adapter *pdapter,
enum ndis_802_11_auth_mode authmode);
u8 rtw_set_802_11_add_wep23a(struct rtw_adapter * padapter,
struct ndis_802_11_wep *wep);
u8 rtw_set_802_11_bssid23a_list_scan(struct rtw_adapter *padapter,
struct cfg80211_ssid *pssid, int ssid_max_num);
u8 rtw_set_802_11_infrastructure_mode23a(struct rtw_adapter *padapter,
enum ndis_802_11_net_infra networktype);
u8 rtw_set_802_11_ssid23a(struct rtw_adapter * padapter, struct cfg80211_ssid * ssid);
u16 rtw_get_cur_max_rate23a(struct rtw_adapter *adapter);
s32 FillH2CCmd(struct rtw_adapter *padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTW_LED_H_
#define __RTW_LED_H_
#include <osdep_service.h>
#include <drv_types.h>
#define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000)
#define LED_BLINK_NORMAL_INTERVAL 100
#define LED_BLINK_SLOWLY_INTERVAL 200
#define LED_BLINK_LONG_INTERVAL 400
#define LED_BLINK_NO_LINK_INTERVAL_ALPHA 1000
#define LED_BLINK_LINK_INTERVAL_ALPHA 500 /* 500 */
#define LED_BLINK_SCAN_INTERVAL_ALPHA 180 /* 150 */
#define LED_BLINK_FASTER_INTERVAL_ALPHA 50
#define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA 5000
#define LED_BLINK_NORMAL_INTERVAL_NETTRONIX 100
#define LED_BLINK_SLOWLY_INTERVAL_NETTRONIX 2000
#define LED_BLINK_SLOWLY_INTERVAL_PORNET 1000
#define LED_BLINK_NORMAL_INTERVAL_PORNET 100
#define LED_BLINK_FAST_INTERVAL_BITLAND 30
/* 060403, rcnjko: Customized for AzWave. */
#define LED_CM2_BLINK_ON_INTERVAL 250
#define LED_CM2_BLINK_OFF_INTERVAL 4750
#define LED_CM8_BLINK_INTERVAL 500 /* for QMI */
#define LED_CM8_BLINK_OFF_INTERVAL 3750 /* for QMI */
/* 080124, lanhsin: Customized for RunTop */
#define LED_RunTop_BLINK_INTERVAL 300
/* 060421, rcnjko: Customized for Sercomm Printer Server case. */
#define LED_CM3_BLINK_INTERVAL 1500
enum led_ctl_mode {
LED_CTL_POWER_ON = 1,
LED_CTL_LINK = 2,
LED_CTL_NO_LINK = 3,
LED_CTL_TX = 4,
LED_CTL_RX = 5,
LED_CTL_SITE_SURVEY = 6,
LED_CTL_POWER_OFF = 7,
LED_CTL_START_TO_LINK = 8,
LED_CTL_START_WPS = 9,
LED_CTL_STOP_WPS = 10,
LED_CTL_START_WPS_BOTTON = 11, /* added for runtop */
LED_CTL_STOP_WPS_FAIL = 12, /* added for ALPHA */
LED_CTL_STOP_WPS_FAIL_OVERLAP = 13, /* added for BELKIN */
LED_CTL_CONNECTION_NO_TRANSFER = 14,
};
enum led_state_872x {
LED_UNKNOWN = 0,
RTW_LED_ON = 1,
RTW_LED_OFF = 2,
LED_BLINK_NORMAL = 3,
LED_BLINK_SLOWLY = 4,
LED_BLINK_POWER_ON = 5,
LED_BLINK_SCAN = 6, /* LED is blinking during scanning period, the # of times to blink is depend on time for scanning. */
LED_BLINK_NO_LINK = 7, /* LED is blinking during no link state. */
LED_BLINK_StartToBlink = 8,/* Customzied for Sercomm Printer Server case */
LED_BLINK_TXRX = 9,
LED_BLINK_WPS = 10, /* LED is blinkg during WPS communication */
LED_BLINK_WPS_STOP = 11, /* for ALPHA */
LED_BLINK_WPS_STOP_OVERLAP = 12, /* for BELKIN */
LED_BLINK_RUNTOP = 13, /* Customized for RunTop */
LED_BLINK_CAMEO = 14,
LED_BLINK_XAVI = 15,
LED_BLINK_ALWAYS_ON = 16,
};
enum led_pin_8723a {
LED_PIN_NULL = 0,
LED_PIN_LED0 = 1,
LED_PIN_LED1 = 2,
LED_PIN_LED2 = 3,
LED_PIN_GPIO0 = 4,
};
struct led_8723a {
struct rtw_adapter *padapter;
enum led_pin_8723a LedPin; /* Identify how to implement this SW led. */
enum led_state_872x CurrLedState; /* Current LED state. */
enum led_state_872x BlinkingLedState; /* Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are. */
u8 bLedOn; /* true if LED is ON, false if LED is OFF. */
u8 bLedBlinkInProgress; /* true if it is blinking, false o.w.. */
u8 bLedWPSBlinkInProgress;
u32 BlinkTimes; /* Number of times to toggle led state for blinking. */
struct timer_list BlinkTimer; /* Timer object for led blinking. */
u8 bSWLedCtrl;
/* ALPHA, added by chiyoko, 20090106 */
u8 bLedNoLinkBlinkInProgress;
u8 bLedLinkBlinkInProgress;
u8 bLedStartToLinkBlinkInProgress;
u8 bLedScanBlinkInProgress;
struct work_struct BlinkWorkItem; /* Workitem used by BlinkTimer to manipulate H/W to blink LED. */
};
#define IS_LED_WPS_BLINKING(_LED_871x) (((struct led_8723a *)_LED_871x)->CurrLedState==LED_BLINK_WPS \
|| ((struct led_8723a *)_LED_871x)->CurrLedState==LED_BLINK_WPS_STOP \
|| ((struct led_8723a *)_LED_871x)->bLedWPSBlinkInProgress)
#define IS_LED_BLINKING(_LED_871x) (((struct led_8723a *)_LED_871x)->bLedWPSBlinkInProgress \
||((struct led_8723a *)_LED_871x)->bLedScanBlinkInProgress)
/* */
/* LED customization. */
/* */
enum led_strategy_8723a {
SW_LED_MODE0 = 0, /* SW control 1 LED via GPIO0. It is default option. */
SW_LED_MODE1= 1, /* 2 LEDs, through LED0 and LED1. For ALPHA. */
SW_LED_MODE2 = 2, /* SW control 1 LED via GPIO0, customized for AzWave 8187 minicard. */
SW_LED_MODE3 = 3, /* SW control 1 LED via GPIO0, customized for Sercomm Printer Server case. */
SW_LED_MODE4 = 4, /* for Edimax / Belkin */
SW_LED_MODE5 = 5, /* for Sercomm / Belkin */
SW_LED_MODE6 = 6, /* for 88CU minicard, porting from ce SW_LED_MODE7 */
HW_LED = 50, /* HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes, see MAC.CONFIG1 for details.) */
LED_ST_NONE = 99,
};
void LedControl871x23a(struct rtw_adapter *padapter, enum led_ctl_mode LedAction);
struct led_priv{
/* add for led controll */
struct led_8723a SwLed0;
struct led_8723a SwLed1;
enum led_strategy_8723a LedStrategy;
u8 bRegUseLed;
void (*LedControlHandler)(struct rtw_adapter *padapter, enum led_ctl_mode LedAction);
/* add for led controll */
};
#define rtw_led_control(adapter, LedAction)
void BlinkWorkItemCallback23a(struct work_struct *work);
void ResetLedStatus23a(struct led_8723a *pLed);
void
InitLed871x23a(
struct rtw_adapter *padapter,
struct led_8723a *pLed,
enum led_pin_8723a LedPin
);
void
DeInitLed871x23a(struct led_8723a *pLed);
/* hal... */
void BlinkHandler23a(struct led_8723a *pLed);
#endif /* __RTW_LED_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*
******************************************************************************/
#ifndef __RTW_MLME_H_
#define __RTW_MLME_H_
#include <osdep_service.h>
#include <mlme_osdep.h>
#include <drv_types.h>
#include <wlan_bssdef.h>
#define MAX_BSS_CNT 128
#define MAX_JOIN_TIMEOUT 6500
/* Increase the scanning timeout because of increasing the SURVEY_TO value. */
#define SCANNING_TIMEOUT 8000
#define SCAN_INTERVAL (30) /* unit:2sec, 30*2 = 60sec */
#define SCANQUEUE_LIFETIME 20 /* unit:sec */
#define WIFI_NULL_STATE 0x00000000
#define WIFI_ASOC_STATE 0x00000001 /* Under Linked state.*/
#define WIFI_REASOC_STATE 0x00000002
#define WIFI_SLEEP_STATE 0x00000004
#define WIFI_STATION_STATE 0x00000008
#define WIFI_AP_STATE 0x00000010
#define WIFI_ADHOC_STATE 0x00000020
#define WIFI_ADHOC_MASTER_STATE 0x00000040
#define WIFI_UNDER_LINKING 0x00000080
#define WIFI_UNDER_WPS 0x00000100
#define WIFI_STA_ALIVE_CHK_STATE 0x00000400
/* to indicate the station is under site surveying */
#define WIFI_SITE_MONITOR 0x00000800
#define WIFI_MP_STATE 0x00010000
#define WIFI_MP_CTX_BACKGROUND 0x00020000 /* in continous tx background */
#define WIFI_MP_CTX_ST 0x00040000 /* in continous tx with single-tone */
#define WIFI_MP_CTX_BACKGROUND_PENDING 0x00080000 /* pending in continous tx background due to out of skb */
#define WIFI_MP_CTX_CCK_HW 0x00100000 /* in continous tx */
#define WIFI_MP_CTX_CCK_CS 0x00200000 /* in continous tx with carrier suppression */
#define WIFI_MP_LPBK_STATE 0x00400000
#define _FW_UNDER_LINKING WIFI_UNDER_LINKING
#define _FW_LINKED WIFI_ASOC_STATE
#define _FW_UNDER_SURVEY WIFI_SITE_MONITOR
enum dot11AuthAlgrthmNum {
dot11AuthAlgrthm_Open = 0,
dot11AuthAlgrthm_Shared,
dot11AuthAlgrthm_8021X,
dot11AuthAlgrthm_Auto,
dot11AuthAlgrthm_MaxNum
};
/* Scan type including active and passive scan. */
enum rt_scan_type {
SCAN_PASSIVE,
SCAN_ACTIVE,
SCAN_MIX,
};
enum {
GHZ24_50 = 0,
GHZ_50,
GHZ_24,
};
enum SCAN_RESULT_TYPE {
SCAN_RESULT_P2P_ONLY = 0, /* Will return all the P2P devices. */
SCAN_RESULT_ALL = 1, /* Will return all the scanned device, include AP. */
SCAN_RESULT_WFD_TYPE = 2 /* Will just return the correct WFD device. */
/* If this device is Miracast sink device, it will just return all the Miracast source devices. */
};
/*
there are several "locks" in mlme_priv,
since mlme_priv is a shared resource between many threads,
like ISR/Call-Back functions, the OID handlers, and even timer functions.
Each _queue has its own locks, already.
Other items are protected by mlme_priv.lock.
To avoid possible dead lock, any thread trying to modifiying mlme_priv
SHALL not lock up more than one locks at a time!
*/
#define traffic_threshold 10
#define traffic_scan_period 500
struct sitesurvey_ctrl {
u64 last_tx_pkts;
uint last_rx_pkts;
int traffic_busy;
struct timer_list sitesurvey_ctrl_timer;
};
struct rt_link_detect {
u32 NumTxOkInPeriod;
u32 NumRxOkInPeriod;
u32 NumRxUnicastOkInPeriod;
bool bBusyTraffic;
bool bTxBusyTraffic;
bool bRxBusyTraffic;
bool bHigherBusyTraffic; /* For interrupt migration purpose. */
bool bHigherBusyRxTraffic; /* We may disable Tx interrupt according as Rx traffic. */
bool bHigherBusyTxTraffic; /* We may disable Tx interrupt according as Tx traffic. */
};
struct profile_info {
u8 ssidlen;
u8 ssid[IEEE80211_MAX_SSID_LEN];
u8 peermac[ETH_ALEN];
};
struct tx_invite_req_info {
u8 token;
u8 benable;
u8 go_ssid[IEEE80211_MAX_SSID_LEN];
u8 ssidlen;
u8 go_bssid[ETH_ALEN];
u8 peer_macaddr[ETH_ALEN];
u8 operating_ch; /* This information will be set by using the p2p_set op_ch = x */
u8 peer_ch; /* The listen channel for peer P2P device */
};
struct tx_invite_resp_info {
u8 token; /* Used to record the dialog token of p2p invitation request frame. */
};
#ifdef CONFIG_8723AU_P2P
struct wifi_display_info {
u16 wfd_enable; /* Enable/Disable the WFD function. */
u16 rtsp_ctrlport; /* TCP port number at which the this WFD device listens for RTSP messages */
u16 peer_rtsp_ctrlport; /* TCP port number at which the peer WFD device listens for RTSP messages */
/* This filed should be filled when receiving the gropu negotiation request */
u8 peer_session_avail; /* WFD session is available or not for the peer wfd device. */
/* This variable will be set when sending the provisioning discovery request to peer WFD device. */
/* And this variable will be reset when it is read by using the iwpriv p2p_get wfd_sa command. */
u8 ip_address[4];
u8 peer_ip_address[4];
u8 wfd_pc; /* WFD preferred connection */
/* 0 -> Prefer to use the P2P for WFD connection on peer side. */
/* 1 -> Prefer to use the TDLS for WFD connection on peer side. */
u8 wfd_device_type;/* WFD Device Type */
/* 0 -> WFD Source Device */
/* 1 -> WFD Primary Sink Device */
enum SCAN_RESULT_TYPE scan_result_type; /* Used when P2P is enable. This parameter will impact the scan result. */
};
#endif /* CONFIG_8723AU_P2P */
struct tx_provdisc_req_info {
u16 wps_config_method_request; /* Used when sending the provisioning request frame */
u16 peer_channel_num[2]; /* The channel number which the receiver stands. */
struct cfg80211_ssid ssid;
u8 peerDevAddr[ETH_ALEN]; /* Peer device address */
u8 peerIFAddr[ETH_ALEN]; /* Peer interface address */
u8 benable; /* This provision discovery request frame is trigger to send or not */
};
struct rx_provdisc_req_info { /* When peer device issue prov_disc_req first, we should store the following informations */
u8 peerDevAddr[ETH_ALEN]; /* Peer device address */
u8 strconfig_method_desc_of_prov_disc_req[4]; /* description for the config method located in the provisioning discovery request frame. */
/* The UI must know this information to know which config method the remote p2p device is requiring. */
};
struct tx_nego_req_info {
u16 peer_channel_num[2]; /* The channel number which the receiver stands. */
u8 peerDevAddr[ETH_ALEN];/* Peer device address */
u8 benable; /* This negoitation request frame is trigger to send or not */
};
struct group_id_info {
u8 go_device_addr[ETH_ALEN]; /*The GO's device address of P2P group */
u8 ssid[IEEE80211_MAX_SSID_LEN]; /* The SSID of this P2P group */
};
struct scan_limit_info {
u8 scan_op_ch_only; /* When this flag is set, the driver should just scan the operation channel */
u8 operation_ch[2]; /* Store the operation channel of invitation request frame */
};
struct cfg80211_wifidirect_info {
struct timer_list remain_on_ch_timer;
u8 restore_channel;
struct ieee80211_channel remain_on_ch_channel;
enum nl80211_channel_type remain_on_ch_type;
u64 remain_on_ch_cookie;
bool is_ro_ch;
};
struct wifidirect_info {
struct rtw_adapter *padapter;
struct timer_list find_phase_timer;
struct timer_list restore_p2p_state_timer;
/* Used to do the scanning. After confirming the peer is availalble, the driver transmits the P2P frame to peer. */
struct timer_list pre_tx_scan_timer;
struct timer_list reset_ch_sitesurvey;
struct timer_list reset_ch_sitesurvey2; /* Just for resetting the scan limit function by using p2p nego */
struct tx_provdisc_req_info tx_prov_disc_info;
struct rx_provdisc_req_info rx_prov_disc_info;
struct tx_invite_req_info invitereq_info;
struct profile_info profileinfo[P2P_MAX_PERSISTENT_GROUP_NUM]; /* Store the profile information of persistent group */
struct tx_invite_resp_info inviteresp_info;
struct tx_nego_req_info nego_req_info;
struct group_id_info groupid_info; /* Store the group id information when doing the group negotiation handshake. */
struct scan_limit_info rx_invitereq_info; /* Used for get the limit scan channel from the Invitation procedure */
struct scan_limit_info p2p_info; /* Used for get the limit scan channel from the P2P negotiation handshake */
#ifdef CONFIG_8723AU_P2P
struct wifi_display_info *wfd_info;
#endif
enum P2P_ROLE role;
enum P2P_STATE pre_p2p_state;
enum P2P_STATE p2p_state;
u8 device_addr[ETH_ALEN]; /* The device address should be the mac address of this device. */
u8 interface_addr[ETH_ALEN];
u8 social_chan[4];
u8 listen_channel;
u8 operating_channel;
u8 listen_dwell; /* This value should be between 1 and 3 */
u8 support_rate[8];
u8 p2p_wildcard_ssid[P2P_WILDCARD_SSID_LEN];
u8 intent; /* should only include the intent value. */
u8 p2p_peer_interface_addr[ETH_ALEN];
u8 p2p_peer_device_addr[ETH_ALEN];
u8 peer_intent; /* Included the intent value and tie breaker value. */
u8 device_name[WPS_MAX_DEVICE_NAME_LEN]; /* Device name for displaying on searching device screen */
u8 device_name_len;
u8 profileindex; /* Used to point to the index of profileinfo array */
u8 peer_operating_ch;
u8 find_phase_state_exchange_cnt;
u16 device_password_id_for_nego; /* The device password ID for group negotation */
u8 negotiation_dialog_token;
/* SSID information for group negotitation */
u8 nego_ssid[IEEE80211_MAX_SSID_LEN];
u8 nego_ssidlen;
u8 p2p_group_ssid[IEEE80211_MAX_SSID_LEN];
u8 p2p_group_ssid_len;
u8 persistent_supported; /* Flag to know the persistent function should be supported or not. */
/* In the Sigma test, the Sigma will provide this enable from the sta_set_p2p CAPI. */
/* 0: disable */
/* 1: enable */
u8 session_available; /* Flag to set the WFD session available to enable or disable "by Sigma" */
/* In the Sigma test, the Sigma will disable the session available by using the sta_preset CAPI. */
/* 0: disable */
/* 1: enable */
u8 wfd_tdls_enable; /* Flag to enable or disable the TDLS by WFD Sigma */
/* 0: disable */
/* 1: enable */
u8 wfd_tdls_weaksec; /* Flag to enable or disable the weak security function for TDLS by WFD Sigma */
/* 0: disable */
/* In this case, the driver can't issue the tdsl setup request frame. */
/* 1: enable */
/* In this case, the driver can issue the tdls setup request frame */
/* even the current security is weak security. */
enum P2P_WPSINFO ui_got_wps_info; /* This field will store the WPS value (PIN value or PBC) that UI had got from the user. */
u16 supported_wps_cm; /* This field describes the WPS config method which this driver supported. */
/* The value should be the combination of config method defined in page104 of WPS v2.0 spec. */
uint channel_list_attr_len; /* This field will contain the length of body of P2P Channel List attribute of group negotitation response frame. */
u8 channel_list_attr[100]; /* This field will contain the body of P2P Channel List attribute of group negotitation response frame. */
/* We will use the channel_cnt and channel_list fields when constructing the group negotitation confirm frame. */
#ifdef CONFIG_8723AU_P2P
enum P2P_PS_MODE p2p_ps_mode; /* indicate p2p ps mode */
enum P2P_PS_STATE p2p_ps_state; /* indicate p2p ps state */
u8 noa_index; /* Identifies and instance of Notice of Absence timing. */
u8 ctwindow; /* Client traffic window. A period of time in TU after TBTT. */
u8 opp_ps; /* opportunistic power save. */
u8 noa_num; /* number of NoA descriptor in P2P IE. */
u8 noa_count[P2P_MAX_NOA_NUM]; /* Count for owner, Type of client. */
u32 noa_duration[P2P_MAX_NOA_NUM]; /* Max duration for owner, preferred or min acceptable duration for client. */
u32 noa_interval[P2P_MAX_NOA_NUM]; /* Length of interval for owner, preferred or max acceptable interval of client. */
u32 noa_start_time[P2P_MAX_NOA_NUM]; /* schedule expressed in terms of the lower 4 bytes of the TSF timer. */
#endif /* CONFIG_8723AU_P2P */
};
struct tdls_ss_record { /* signal strength record */
u8 macaddr[ETH_ALEN];
u8 RxPWDBAll;
u8 is_tdls_sta; /* true: direct link sta, false: else */
};
struct tdls_info {
u8 ap_prohibited;
uint setup_state;
u8 sta_cnt;
/* 1:tdls sta == (NUM_STA-1), reach max direct link no; 0: else; */
u8 sta_maximum;
struct tdls_ss_record ss_record;
u8 macid_index; /* macid entry that is ready to write */
/* cam entry that is trying to clear, using it in direct link teardown*/
u8 clear_cam;
u8 ch_sensing;
u8 cur_channel;
u8 candidate_ch;
u8 collect_pkt_num[MAX_CHANNEL_NUM];
spinlock_t cmd_lock;
spinlock_t hdl_lock;
u8 watchdog_count;
u8 dev_discovered; /* WFD_TDLS: for sigma test */
u8 enable;
#ifdef CONFIG_8723AU_P2P
struct wifi_display_info *wfd_info;
#endif
};
struct mlme_priv {
spinlock_t lock;
int fw_state;
u8 bScanInProcess;
u8 to_join; /* flag */
u8 to_roaming; /* roaming trying times */
struct rtw_adapter *nic_hdl;
u8 not_indic_disco;
struct rtw_queue scanned_queue;
struct cfg80211_ssid assoc_ssid;
u8 assoc_bssid[6];
struct wlan_network cur_network;
/* uint wireless_mode; no used, remove it */
u32 scan_interval;
struct timer_list assoc_timer;
uint assoc_by_bssid;
uint assoc_by_rssi;
struct timer_list scan_to_timer;
struct timer_list set_scan_deny_timer;
atomic_t set_scan_deny; /* 0: allowed, 1: deny */
struct qos_priv qospriv;
/* Number of non-HT AP/stations */
int num_sta_no_ht;
int num_FortyMHzIntolerant;
struct ht_priv htpriv;
struct rt_link_detect LinkDetectInfo;
struct timer_list dynamic_chk_timer; /* dynamic/periodic check timer */
u8 key_mask; /* use for ips to set wep key after ips_leave23a */
u8 acm_mask; /* for wmm acm mask */
u8 ChannelPlan;
enum rt_scan_type scan_mode; /* active: 1, passive: 0 */
u8 *wps_probe_req_ie;
u32 wps_probe_req_ie_len;
#ifdef CONFIG_8723AU_AP_MODE
/* Number of associated Non-ERP stations (i.e., stations using 802.11b
* in 802.11g BSS) */
int num_sta_non_erp;
/* Number of associated stations that do not support Short Slot Time */
int num_sta_no_short_slot_time;
/* Number of associated stations that do not support Short Preamble */
int num_sta_no_short_preamble;
int olbc; /* Overlapping Legacy BSS Condition */
/* Number of HT associated stations that do not support greenfield */
int num_sta_ht_no_gf;
/* Number of associated non-HT stations */
/* int num_sta_no_ht; */
/* Number of HT associated stations 20 MHz */
int num_sta_ht_20mhz;
/* Overlapping BSS information */
int olbc_ht;
u16 ht_op_mode;
u8 *assoc_req;
u32 assoc_req_len;
u8 *assoc_rsp;
u32 assoc_rsp_len;
u8 *wps_beacon_ie;
/* u8 *wps_probe_req_ie; */
u8 *wps_probe_resp_ie;
u8 *wps_assoc_resp_ie;
u32 wps_beacon_ie_len;
/* u32 wps_probe_req_ie_len; */
u32 wps_probe_resp_ie_len;
u32 wps_assoc_resp_ie_len;
u8 *p2p_beacon_ie;
u8 *p2p_probe_req_ie;
u8 *p2p_probe_resp_ie;
u8 *p2p_go_probe_resp_ie; /* for GO */
u8 *p2p_assoc_req_ie;
u32 p2p_beacon_ie_len;
u32 p2p_probe_req_ie_len;
u32 p2p_probe_resp_ie_len;
u32 p2p_go_probe_resp_ie_len; /* for GO */
u32 p2p_assoc_req_ie_len;
spinlock_t bcn_update_lock;
u8 update_bcn;
#endif /* ifdef CONFIG_8723AU_AP_MODE */
#if defined(CONFIG_8723AU_P2P)
u8 *wfd_beacon_ie;
u8 *wfd_probe_req_ie;
u8 *wfd_probe_resp_ie;
u8 *wfd_go_probe_resp_ie; /* for GO */
u8 *wfd_assoc_req_ie;
u32 wfd_beacon_ie_len;
u32 wfd_probe_req_ie_len;
u32 wfd_probe_resp_ie_len;
u32 wfd_go_probe_resp_ie_len; /* for GO */
u32 wfd_assoc_req_ie_len;
#endif
};
#ifdef CONFIG_8723AU_AP_MODE
struct hostapd_priv {
struct rtw_adapter *padapter;
};
int hostapd_mode_init(struct rtw_adapter *padapter);
void hostapd_mode_unload(struct rtw_adapter *padapter);
#endif
void rtw_joinbss_event_prehandle23a(struct rtw_adapter *adapter, u8 *pbuf);
void rtw_survey_event_cb23a(struct rtw_adapter *adapter, u8 *pbuf);
void rtw_surveydone_event_callback23a(struct rtw_adapter *adapter, u8 *pbuf);
void rtw23a_joinbss_event_cb(struct rtw_adapter *adapter, u8 *pbuf);
void rtw_stassoc_event_callback23a(struct rtw_adapter *adapter, u8 *pbuf);
void rtw_stadel_event_callback23a(struct rtw_adapter *adapter, u8 *pbuf);
void rtw_atimdone_event_callback23a(struct rtw_adapter *adapter, u8 *pbuf);
void rtw_cpwm_event_callback23a(struct rtw_adapter *adapter, u8 *pbuf);
int event_thread(void *context);
void rtw23a_join_to_handler(unsigned long);
void rtw_free_network_queue23a(struct rtw_adapter *adapter, u8 isfreeall);
int rtw_init_mlme_priv23a(struct rtw_adapter *adapter);
void rtw_free_mlme_priv23a(struct mlme_priv *pmlmepriv);
int rtw_select_and_join_from_scanned_queue23a(struct mlme_priv *pmlmepriv);
int rtw_set_key23a(struct rtw_adapter *adapter,
struct security_priv *psecuritypriv, int keyid, u8 set_tx);
int rtw_set_auth23a(struct rtw_adapter *adapter,
struct security_priv *psecuritypriv);
static inline u8 *get_bssid(struct mlme_priv *pmlmepriv)
{ /* if sta_mode:pmlmepriv->cur_network.network.MacAddress => bssid */
/* if adhoc_mode:pmlmepriv->cur_network.network.MacAddress => ibss mac address */
return pmlmepriv->cur_network.network.MacAddress;
}
static inline int check_fwstate(struct mlme_priv *pmlmepriv, int state)
{
if (pmlmepriv->fw_state & state)
return true;
return false;
}
static inline int get_fwstate(struct mlme_priv *pmlmepriv)
{
return pmlmepriv->fw_state;
}
/*
* No Limit on the calling context,
* therefore set it to be the critical section...
*
* ### NOTE:#### (!!!!)
* MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock
*/
static inline void set_fwstate(struct mlme_priv *pmlmepriv, int state)
{
pmlmepriv->fw_state |= state;
/* FOR HW integration */
if (_FW_UNDER_SURVEY == state)
pmlmepriv->bScanInProcess = true;
}
static inline void _clr_fwstate_(struct mlme_priv *pmlmepriv, int state)
{
pmlmepriv->fw_state &= ~state;
/* FOR HW integration */
if (_FW_UNDER_SURVEY == state)
pmlmepriv->bScanInProcess = false;
}
/*
* No Limit on the calling context,
* therefore set it to be the critical section...
*/
static inline void clr_fwstate(struct mlme_priv *pmlmepriv, int state)
{
spin_lock_bh(&pmlmepriv->lock);
if (check_fwstate(pmlmepriv, state) == true)
pmlmepriv->fw_state ^= state;
spin_unlock_bh(&pmlmepriv->lock);
}
static inline void clr_fwstate_ex(struct mlme_priv *pmlmepriv, int state)
{
spin_lock_bh(&pmlmepriv->lock);
_clr_fwstate_(pmlmepriv, state);
spin_unlock_bh(&pmlmepriv->lock);
}
u16 rtw_get_capability23a(struct wlan_bssid_ex *bss);
void rtw_update_scanned_network23a(struct rtw_adapter *adapter,
struct wlan_bssid_ex *target);
void rtw_disconnect_hdl23a_under_linked(struct rtw_adapter *adapter,
struct sta_info *psta, u8 free_assoc);
void rtw_generate_random_ibss23a(u8 *pibss);
struct wlan_network *rtw_find_network23a(struct rtw_queue *scanned_queue, u8 *addr);
struct wlan_network *rtw_get_oldest_wlan_network23a(struct rtw_queue *scanned_queue);
void rtw_free_assoc_resources23a(struct rtw_adapter *adapter,
int lock_scanned_queue);
void rtw_indicate_disconnect23a(struct rtw_adapter *adapter);
void rtw_indicate_connect23a(struct rtw_adapter *adapter);
void rtw_indicate_scan_done23a(struct rtw_adapter *padapter, bool aborted);
void rtw_scan_abort23a(struct rtw_adapter *adapter);
int rtw_restruct_sec_ie23a(struct rtw_adapter *adapter, u8 *in_ie, u8 *out_ie,
uint in_len);
int rtw_restruct_wmm_ie23a(struct rtw_adapter *adapter, u8 *in_ie, u8 *out_ie,
uint in_len, uint initial_out_len);
void rtw_init_registrypriv_dev_network23a(struct rtw_adapter *adapter);
void rtw_update_registrypriv_dev_network23a(struct rtw_adapter *adapter);
void rtw_get_encrypt_decrypt_from_registrypriv23a(struct rtw_adapter *adapter);
void rtw_scan_timeout_handler23a(unsigned long data);
void rtw_dynamic_check_timer_handler(unsigned long data);
bool rtw_is_scan_deny(struct rtw_adapter *adapter);
void rtw_clear_scan_deny(struct rtw_adapter *adapter);
void rtw_set_scan_deny_timer_hdl(unsigned long data);
void rtw_set_scan_deny(struct rtw_adapter *adapter, u32 ms);
int _rtw_init_mlme_priv23a(struct rtw_adapter *padapter);
void rtw23a_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv);
void _rtw_free_mlme_priv23a(struct mlme_priv *pmlmepriv);
struct wlan_network *rtw_alloc_network(struct mlme_priv *pmlmepriv);
void _rtw_free_network23a(struct mlme_priv *pmlmepriv,
struct wlan_network *pnetwork, u8 isfreeall);
void _rtw_free_network23a_nolock23a(struct mlme_priv *pmlmepriv,
struct wlan_network *pnetwork);
struct wlan_network *_rtw_find_network23a(struct rtw_queue *scanned_queue, u8 *addr);
void _rtw_free_network23a_queue23a(struct rtw_adapter *padapter, u8 isfreeall);
int rtw_if_up23a(struct rtw_adapter *padapter);
int rtw_linked_check(struct rtw_adapter *padapter);
u8 *rtw_get_capability23a_from_ie(u8 *ie);
u8 *rtw_get_timestampe_from_ie23a(u8 *ie);
u8 *rtw_get_beacon_interval23a_from_ie(u8 *ie);
void rtw_joinbss_reset23a(struct rtw_adapter *padapter);
unsigned int rtw_restructure_ht_ie23a(struct rtw_adapter *padapter, u8 *in_ie,
u8 *out_ie, uint in_len, uint *pout_len);
void rtw_update_ht_cap23a(struct rtw_adapter *padapter,
u8 *pie, uint ie_len);
void rtw_issue_addbareq_cmd23a(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe);
int rtw_is_same_ibss23a(struct rtw_adapter *adapter,
struct wlan_network *pnetwork);
int is_same_network23a(struct wlan_bssid_ex *src, struct wlan_bssid_ex *dst);
void _rtw23a_roaming(struct rtw_adapter *adapter,
struct wlan_network *tgt_network);
void rtw23a_roaming(struct rtw_adapter *adapter,
struct wlan_network *tgt_network);
void rtw_set_roaming(struct rtw_adapter *adapter, u8 to_roaming);
u8 rtw_to_roaming(struct rtw_adapter *adapter);
void rtw_stassoc_hw_rpt23a(struct rtw_adapter *adapter, struct sta_info *psta);
#endif /* __RTL871X_MLME_H_ */

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drivers/staging/rtl8723au/include/rtw_mlme_ext.h Normal file
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@ -0,0 +1,782 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTW_MLME_EXT_H_
#define __RTW_MLME_EXT_H_
#include <osdep_service.h>
#include <drv_types.h>
#include <wlan_bssdef.h>
/* Commented by Albert 20101105 */
/* Increase the SURVEY_TO value from 100 to 150 ( 100ms to 150ms ) */
/* The Realtek 8188CE SoftAP will spend around 100ms to send the probe response after receiving the probe request. */
/* So, this driver tried to extend the dwell time for each scanning channel. */
/* This will increase the chance to receive the probe response from SoftAP. */
#define SURVEY_TO (100)
#define REAUTH_TO (300) /* 50) */
#define REASSOC_TO (300) /* 50) */
/* define DISCONNECT_TO (3000) */
#define ADDBA_TO (2000)
#define LINKED_TO (1) /* unit:2 sec, 1x2=2 sec */
#define REAUTH_LIMIT (4)
#define REASSOC_LIMIT (4)
#define READDBA_LIMIT (2)
#define ROAMING_LIMIT 8
#define DYNAMIC_FUNC_DISABLE (0x0)
/* ====== enum odm_ability ======== */
/* BB ODM section BIT 0-15 */
#define DYNAMIC_BB_DIG BIT(0)
#define DYNAMIC_BB_RA_MASK BIT(1)
#define DYNAMIC_BB_DYNAMIC_TXPWR BIT(2)
#define DYNAMIC_BB_BB_FA_CNT BIT(3)
#define DYNAMIC_BB_RSSI_MONITOR BIT(4)
#define DYNAMIC_BB_CCK_PD BIT(5)
#define DYNAMIC_BB_ANT_DIV BIT(6)
#define DYNAMIC_BB_PWR_SAVE BIT(7)
#define DYNAMIC_BB_PWR_TRAIN BIT(8)
#define DYNAMIC_BB_RATE_ADAPTIVE BIT(9)
#define DYNAMIC_BB_PATH_DIV BIT(10)
#define DYNAMIC_BB_PSD BIT(11)
/* MAC DM section BIT 16-23 */
#define DYNAMIC_MAC_struct edca_turboURBO BIT(16)
#define DYNAMIC_MAC_EARLY_MODE BIT(17)
/* RF ODM section BIT 24-31 */
#define DYNAMIC_RF_TX_PWR_TRACK BIT(24)
#define DYNAMIC_RF_RX_GAIN_TRACK BIT(25)
#define DYNAMIC_RF_CALIBRATION BIT(26)
#define DYNAMIC_ALL_FUNC_ENABLE 0xFFFFFFF
#define _HW_STATE_NOLINK_ 0x00
#define _HW_STATE_ADHOC_ 0x01
#define _HW_STATE_STATION_ 0x02
#define _HW_STATE_AP_ 0x03
#define _1M_RATE_ 0
#define _2M_RATE_ 1
#define _5M_RATE_ 2
#define _11M_RATE_ 3
#define _6M_RATE_ 4
#define _9M_RATE_ 5
#define _12M_RATE_ 6
#define _18M_RATE_ 7
#define _24M_RATE_ 8
#define _36M_RATE_ 9
#define _48M_RATE_ 10
#define _54M_RATE_ 11
extern unsigned char RTW_WPA_OUI23A[];
extern unsigned char WMM_OUI23A[];
extern unsigned char WPS_OUI23A[];
extern unsigned char WFD_OUI23A[];
extern unsigned char P2P_OUI23A[];
extern unsigned char WMM_INFO_OUI23A[];
extern unsigned char WMM_PARA_OUI23A[];
/* */
/* Channel Plan Type. */
/* Note: */
/* We just add new channel plan when the new channel plan is different from any of the following */
/* channel plan. */
/* If you just wnat to customize the acitions(scan period or join actions) about one of the channel plan, */
/* customize them in struct rt_channel_info in the RT_CHANNEL_LIST. */
/* */
enum { /* _RT_CHANNEL_DOMAIN */
/* old channel plan mapping ===== */
RT_CHANNEL_DOMAIN_FCC = 0x00,
RT_CHANNEL_DOMAIN_IC = 0x01,
RT_CHANNEL_DOMAIN_ETSI = 0x02,
RT_CHANNEL_DOMAIN_SPAIN = 0x03,
RT_CHANNEL_DOMAIN_FRANCE = 0x04,
RT_CHANNEL_DOMAIN_MKK = 0x05,
RT_CHANNEL_DOMAIN_MKK1 = 0x06,
RT_CHANNEL_DOMAIN_ISRAEL = 0x07,
RT_CHANNEL_DOMAIN_TELEC = 0x08,
RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN = 0x09,
RT_CHANNEL_DOMAIN_WORLD_WIDE_13 = 0x0A,
RT_CHANNEL_DOMAIN_TAIWAN = 0x0B,
RT_CHANNEL_DOMAIN_CHINA = 0x0C,
RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO = 0x0D,
RT_CHANNEL_DOMAIN_KOREA = 0x0E,
RT_CHANNEL_DOMAIN_TURKEY = 0x0F,
RT_CHANNEL_DOMAIN_JAPAN = 0x10,
RT_CHANNEL_DOMAIN_FCC_NO_DFS = 0x11,
RT_CHANNEL_DOMAIN_JAPAN_NO_DFS = 0x12,
RT_CHANNEL_DOMAIN_WORLD_WIDE_5G = 0x13,
RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS = 0x14,
/* new channel plan mapping, (2GDOMAIN_5GDOMAIN) ===== */
RT_CHANNEL_DOMAIN_WORLD_NULL = 0x20,
RT_CHANNEL_DOMAIN_ETSI1_NULL = 0x21,
RT_CHANNEL_DOMAIN_FCC1_NULL = 0x22,
RT_CHANNEL_DOMAIN_MKK1_NULL = 0x23,
RT_CHANNEL_DOMAIN_ETSI2_NULL = 0x24,
RT_CHANNEL_DOMAIN_FCC1_FCC1 = 0x25,
RT_CHANNEL_DOMAIN_WORLD_ETSI1 = 0x26,
RT_CHANNEL_DOMAIN_MKK1_MKK1 = 0x27,
RT_CHANNEL_DOMAIN_WORLD_KCC1 = 0x28,
RT_CHANNEL_DOMAIN_WORLD_FCC2 = 0x29,
RT_CHANNEL_DOMAIN_WORLD_FCC3 = 0x30,
RT_CHANNEL_DOMAIN_WORLD_FCC4 = 0x31,
RT_CHANNEL_DOMAIN_WORLD_FCC5 = 0x32,
RT_CHANNEL_DOMAIN_WORLD_FCC6 = 0x33,
RT_CHANNEL_DOMAIN_FCC1_FCC7 = 0x34,
RT_CHANNEL_DOMAIN_WORLD_ETSI2 = 0x35,
RT_CHANNEL_DOMAIN_WORLD_ETSI3 = 0x36,
RT_CHANNEL_DOMAIN_MKK1_MKK2 = 0x37,
RT_CHANNEL_DOMAIN_MKK1_MKK3 = 0x38,
RT_CHANNEL_DOMAIN_FCC1_NCC1 = 0x39,
RT_CHANNEL_DOMAIN_FCC1_NCC2 = 0x40,
RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN_2G = 0x41,
/* Add new channel plan above this line=============== */
RT_CHANNEL_DOMAIN_MAX,
RT_CHANNEL_DOMAIN_REALTEK_DEFINE = 0x7F,
};
enum { /* _RT_CHANNEL_DOMAIN_2G */
RT_CHANNEL_DOMAIN_2G_WORLD = 0x00, /* Worldwird 13 */
RT_CHANNEL_DOMAIN_2G_ETSI1 = 0x01, /* Europe */
RT_CHANNEL_DOMAIN_2G_FCC1 = 0x02, /* US */
RT_CHANNEL_DOMAIN_2G_MKK1 = 0x03, /* Japan */
RT_CHANNEL_DOMAIN_2G_ETSI2 = 0x04, /* France */
RT_CHANNEL_DOMAIN_2G_NULL = 0x05,
/* Add new channel plan above this line=============== */
RT_CHANNEL_DOMAIN_2G_MAX,
};
enum { /* _RT_CHANNEL_DOMAIN_5G */
RT_CHANNEL_DOMAIN_5G_NULL = 0x00,
RT_CHANNEL_DOMAIN_5G_ETSI1 = 0x01, /* Europe */
RT_CHANNEL_DOMAIN_5G_ETSI2 = 0x02, /* Australia, New Zealand */
RT_CHANNEL_DOMAIN_5G_ETSI3 = 0x03, /* Russia */
RT_CHANNEL_DOMAIN_5G_FCC1 = 0x04, /* US */
RT_CHANNEL_DOMAIN_5G_FCC2 = 0x05, /* FCC o/w DFS Channels */
RT_CHANNEL_DOMAIN_5G_FCC3 = 0x06, /* India, Mexico */
RT_CHANNEL_DOMAIN_5G_FCC4 = 0x07, /* Venezuela */
RT_CHANNEL_DOMAIN_5G_FCC5 = 0x08, /* China */
RT_CHANNEL_DOMAIN_5G_FCC6 = 0x09, /* Israel */
RT_CHANNEL_DOMAIN_5G_FCC7_IC1 = 0x0A, /* US, Canada */
RT_CHANNEL_DOMAIN_5G_KCC1 = 0x0B, /* Korea */
RT_CHANNEL_DOMAIN_5G_MKK1 = 0x0C, /* Japan */
RT_CHANNEL_DOMAIN_5G_MKK2 = 0x0D, /* Japan (W52, W53) */
RT_CHANNEL_DOMAIN_5G_MKK3 = 0x0E, /* Japan (W56) */
RT_CHANNEL_DOMAIN_5G_NCC1 = 0x0F, /* Taiwan */
RT_CHANNEL_DOMAIN_5G_NCC2 = 0x10, /* Taiwan o/w DFS */
/* Add new channel plan above this line=============== */
/* Driver Self Defined ===== */
RT_CHANNEL_DOMAIN_5G_FCC = 0x11,
RT_CHANNEL_DOMAIN_5G_JAPAN_NO_DFS = 0x12,
RT_CHANNEL_DOMAIN_5G_FCC4_NO_DFS = 0x13,
RT_CHANNEL_DOMAIN_5G_MAX,
};
#define rtw_is_channel_plan_valid(chplan) (chplan<RT_CHANNEL_DOMAIN_MAX || chplan == RT_CHANNEL_DOMAIN_REALTEK_DEFINE)
struct rt_channel_plan {
unsigned char Channel[MAX_CHANNEL_NUM];
unsigned char Len;
};
struct rt_channel_plan_2g {
unsigned char Channel[MAX_CHANNEL_NUM_2G];
unsigned char Len;
};
struct rt_channel_plan_5g {
unsigned char Channel[MAX_CHANNEL_NUM_5G];
unsigned char Len;
};
struct rt_channel_plan_map {
unsigned char Index2G;
unsigned char Index5G;
};
enum Associated_AP {
atherosAP = 0,
broadcomAP = 1,
ciscoAP = 2,
marvellAP = 3,
ralinkAP = 4,
realtekAP = 5,
airgocapAP = 6,
unknownAP = 7,
maxAP,
};
enum { /* HT_IOT_PEER_E */
HT_IOT_PEER_UNKNOWN = 0,
HT_IOT_PEER_REALTEK = 1,
HT_IOT_PEER_REALTEK_92SE = 2,
HT_IOT_PEER_BROADCOM = 3,
HT_IOT_PEER_RALINK = 4,
HT_IOT_PEER_ATHEROS = 5,
HT_IOT_PEER_CISCO = 6,
HT_IOT_PEER_MERU = 7,
HT_IOT_PEER_MARVELL = 8,
HT_IOT_PEER_REALTEK_SOFTAP = 9,/* peer is RealTek SOFT_AP, by Bohn, 2009.12.17 */
HT_IOT_PEER_SELF_SOFTAP = 10, /* Self is SoftAP */
HT_IOT_PEER_AIRGO = 11,
HT_IOT_PEER_INTEL = 12,
HT_IOT_PEER_RTK_APCLIENT = 13,
HT_IOT_PEER_REALTEK_81XX = 14,
HT_IOT_PEER_REALTEK_WOW = 15,
HT_IOT_PEER_TENDA = 16,
HT_IOT_PEER_MAX = 17
};
enum SCAN_STATE {
SCAN_DISABLE = 0,
SCAN_START = 1,
SCAN_TXNULL = 2,
SCAN_PROCESS = 3,
SCAN_COMPLETE = 4,
SCAN_STATE_MAX,
};
struct mlme_handler {
char *str;
unsigned int (*func)(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
};
struct action_handler {
unsigned int num;
char* str;
unsigned int (*func)(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
};
struct ss_res
{
int state;
int bss_cnt;
int channel_idx;
int scan_mode;
u8 ssid_num;
u8 ch_num;
struct cfg80211_ssid ssid[RTW_SSID_SCAN_AMOUNT];
struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT];
};
/* define AP_MODE 0x0C */
/* define STATION_MODE 0x08 */
/* define AD_HOC_MODE 0x04 */
/* define NO_LINK_MODE 0x00 */
#define WIFI_FW_NULL_STATE _HW_STATE_NOLINK_
#define WIFI_FW_STATION_STATE _HW_STATE_STATION_
#define WIFI_FW_AP_STATE _HW_STATE_AP_
#define WIFI_FW_ADHOC_STATE _HW_STATE_ADHOC_
#define WIFI_FW_AUTH_NULL 0x00000100
#define WIFI_FW_AUTH_STATE 0x00000200
#define WIFI_FW_AUTH_SUCCESS 0x00000400
#define WIFI_FW_ASSOC_STATE 0x00002000
#define WIFI_FW_ASSOC_SUCCESS 0x00004000
#define WIFI_FW_LINKING_STATE (WIFI_FW_AUTH_NULL | WIFI_FW_AUTH_STATE | WIFI_FW_AUTH_SUCCESS |WIFI_FW_ASSOC_STATE)
struct FW_Sta_Info {
struct sta_info *psta;
u32 status;
u32 rx_pkt;
u32 retry;
unsigned char SupportedRates[NDIS_802_11_LENGTH_RATES_EX];
};
/*
* Usage:
* When one iface acted as AP mode and the other iface is STA mode and scanning,
* it should switch back to AP's operating channel periodically.
* Parameters info:
* When the driver scanned RTW_SCAN_NUM_OF_CH channels, it would switch back to AP's operating channel for
* RTW_STAY_AP_CH_MILLISECOND * SURVEY_TO milliseconds.
* Example:
* For chip supports 2.4G + 5GHz and AP mode is operating in channel 1,
* RTW_SCAN_NUM_OF_CH is 8, RTW_STAY_AP_CH_MILLISECOND is 3 and SURVEY_TO is 100.
* When it's STA mode gets set_scan command,
* it would
* 1. Doing the scan on channel 1.2.3.4.5.6.7.8
* 2. Back to channel 1 for 300 milliseconds
* 3. Go through doing site survey on channel 9.10.11.36.40.44.48.52
* 4. Back to channel 1 for 300 milliseconds
* 5. ... and so on, till survey done.
*/
struct mlme_ext_info
{
u32 state;
u32 reauth_count;
u32 reassoc_count;
u32 link_count;
u32 auth_seq;
u32 auth_algo; /* 802.11 auth, could be open, shared, auto */
u32 authModeToggle;
u32 enc_algo;/* encrypt algorithm; */
u32 key_index; /* this is only valid for legendary wep, 0~3 for key id. */
u32 iv;
u8 chg_txt[128];
u16 aid;
u16 bcn_interval;
u16 capability;
u8 assoc_AP_vendor;
u8 slotTime;
u8 preamble_mode;
u8 WMM_enable;
u8 ERP_enable;
u8 ERP_IE;
u8 HT_enable;
u8 HT_caps_enable;
u8 HT_info_enable;
u8 HT_protection;
u8 turboMode_cts2self;
u8 turboMode_rtsen;
u8 SM_PS;
u8 agg_enable_bitmap;
u8 ADDBA_retry_count;
u8 candidate_tid_bitmap;
u8 dialogToken;
/* Accept ADDBA Request */
bool bAcceptAddbaReq;
u8 bwmode_updated;
u8 hidden_ssid_mode;
struct ADDBA_request ADDBA_req;
struct WMM_para_element WMM_param;
struct HT_caps_element HT_caps;
struct HT_info_element HT_info;
struct wlan_bssid_ex network;/* join network or bss_network, if in ap mode, it is the same to cur_network.network */
struct FW_Sta_Info FW_sta_info[NUM_STA];
};
/* The channel information about this channel including joining, scanning, and power constraints. */
struct rt_channel_info {
u8 ChannelNum; /* The channel number. */
enum rt_scan_type ScanType; /* Scan type such as passive or active scan. */
};
int rtw_ch_set_search_ch23a(struct rt_channel_info *ch_set, const u32 ch);
/* P2P_MAX_REG_CLASSES - Maximum number of regulatory classes */
#define P2P_MAX_REG_CLASSES 10
/* P2P_MAX_REG_CLASS_CHANNELS - Maximum number of channels per regulatory class */
#define P2P_MAX_REG_CLASS_CHANNELS 20
/* struct p2p_channels - List of supported channels */
struct p2p_channels {
/* struct p2p_reg_class - Supported regulatory class */
struct p2p_reg_class {
/* reg_class - Regulatory class (IEEE 802.11-2007, Annex J) */
u8 reg_class;
/* channel - Supported channels */
u8 channel[P2P_MAX_REG_CLASS_CHANNELS];
/* channels - Number of channel entries in use */
size_t channels;
} reg_class[P2P_MAX_REG_CLASSES];
/* reg_classes - Number of reg_class entries in use */
size_t reg_classes;
};
struct p2p_oper_class_map {
enum hw_mode {IEEE80211G,IEEE80211A} mode;
u8 op_class;
u8 min_chan;
u8 max_chan;
u8 inc;
enum {
BW20, BW40PLUS, BW40MINUS
} bw;
};
struct mlme_ext_priv {
struct rtw_adapter *padapter;
u8 mlmeext_init;
atomic_t event_seq;
u16 mgnt_seq;
/* struct fw_priv fwpriv; */
unsigned char cur_channel;
unsigned char cur_bwmode;
unsigned char cur_ch_offset;/* PRIME_CHNL_OFFSET */
unsigned char cur_wireless_mode; /* NETWORK_TYPE */
unsigned char max_chan_nums;
struct rt_channel_info channel_set[MAX_CHANNEL_NUM];
struct p2p_channels channel_list;
unsigned char basicrate[NumRates];
unsigned char datarate[NumRates];
struct ss_res sitesurvey_res;
struct mlme_ext_info mlmext_info;/* for sta/adhoc mode, including current scanning/connecting/connected related info. */
/* for ap mode, network includes ap's cap_info */
struct timer_list survey_timer;
struct timer_list link_timer;
u16 chan_scan_time;
u8 scan_abort;
u8 tx_rate; /* TXRATE when USERATE is set. */
u32 retry; /* retry for issue probereq */
u64 TSFValue;
#ifdef CONFIG_8723AU_AP_MODE
unsigned char bstart_bss;
#endif
u8 update_channel_plan_by_ap_done;
/* recv_decache check for Action_public frame */
u8 action_public_dialog_token;
u16 action_public_rxseq;
u8 active_keep_alive_check;
};
int init_mlme_ext_priv23a(struct rtw_adapter* padapter);
int init_hw_mlme_ext23a(struct rtw_adapter *padapter);
void free_mlme_ext_priv23a (struct mlme_ext_priv *pmlmeext);
void init_mlme_ext_timer23a(struct rtw_adapter *padapter);
void init_addba_retry_timer23a(struct sta_info *psta);
struct xmit_frame *alloc_mgtxmitframe23a(struct xmit_priv *pxmitpriv);
unsigned char networktype_to_raid23a(unsigned char network_type);
u8 judge_network_type23a(struct rtw_adapter *padapter, unsigned char *rate,
int ratelen);
void get_rate_set23a(struct rtw_adapter *padapter, unsigned char *pbssrate,
int *bssrate_len);
void UpdateBrateTbl23a(struct rtw_adapter *padapter,u8 *mBratesOS);
void Update23aTblForSoftAP(u8 *bssrateset, u32 bssratelen);
void Save_DM_Func_Flag23a(struct rtw_adapter *padapter);
void Restore_DM_Func_Flag23a(struct rtw_adapter *padapter);
void Switch_DM_Func23a(struct rtw_adapter *padapter, unsigned long mode, u8 enable);
void Set_MSR23a(struct rtw_adapter *padapter, u8 type);
u8 rtw_get_oper_ch23a(struct rtw_adapter *adapter);
void rtw_set_oper_ch23a(struct rtw_adapter *adapter, u8 ch);
u8 rtw_get_oper_bw23a(struct rtw_adapter *adapter);
void rtw_set_oper_bw23a(struct rtw_adapter *adapter, u8 bw);
u8 rtw_get_oper_ch23aoffset(struct rtw_adapter *adapter);
void rtw_set_oper_ch23aoffset23a(struct rtw_adapter *adapter, u8 offset);
void set_channel_bwmode23a(struct rtw_adapter *padapter, unsigned char channel,
unsigned char channel_offset, unsigned short bwmode);
void SelectChannel23a(struct rtw_adapter *padapter, unsigned char channel);
void SetBWMode23a(struct rtw_adapter *padapter, unsigned short bwmode,
unsigned char channel_offset);
unsigned int decide_wait_for_beacon_timeout23a(unsigned int bcn_interval);
void write_cam23a(struct rtw_adapter *padapter, u8 entry, u16 ctrl,
u8 *mac, u8 *key);
void clear_cam_entry23a(struct rtw_adapter *padapter, u8 entry);
void invalidate_cam_all23a(struct rtw_adapter *padapter);
void CAM_empty_entry23a(struct rtw_adapter *Adapter, u8 ucIndex);
int allocate_fw_sta_entry23a(struct rtw_adapter *padapter);
void flush_all_cam_entry23a(struct rtw_adapter *padapter);
bool IsLegal5GChannel(struct rtw_adapter *Adapter, u8 channel);
void site_survey23a(struct rtw_adapter *padapter);
u8 collect_bss_info23a(struct rtw_adapter *padapter,
struct recv_frame *precv_frame,
struct wlan_bssid_ex *bssid);
void update_network23a(struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src,
struct rtw_adapter *padapter, bool update_ie);
int get_bsstype23a(unsigned short capability);
u8 *get_my_bssid23a(struct wlan_bssid_ex *pnetwork);
u16 get_beacon_interval23a(struct wlan_bssid_ex *bss);
int is_client_associated_to_ap23a(struct rtw_adapter *padapter);
int is_client_associated_to_ibss23a(struct rtw_adapter *padapter);
int is_IBSS_empty23a(struct rtw_adapter *padapter);
unsigned char check_assoc_AP23a(u8 *pframe, uint len);
int WMM_param_handler23a(struct rtw_adapter *padapter,
struct ndis_802_11_var_ies *pIE);
#ifdef CONFIG_8723AU_P2P
int WFD_info_handler(struct rtw_adapter *padapter,
struct ndis_802_11_var_ies *pIE);
#endif
void WMMOnAssocRsp23a(struct rtw_adapter *padapter);
void HT_caps_handler23a(struct rtw_adapter *padapter,
struct ndis_802_11_var_ies *pIE);
void HT_info_handler23a(struct rtw_adapter *padapter,
struct ndis_802_11_var_ies *pIE);
void HTOnAssocRsp23a(struct rtw_adapter *padapter);
void ERP_IE_handler23a(struct rtw_adapter *padapter,
struct ndis_802_11_var_ies *pIE);
void VCS_update23a(struct rtw_adapter *padapter, struct sta_info *psta);
void update_beacon23a_info(struct rtw_adapter *padapter, u8 *pframe, uint len,
struct sta_info *psta);
int rtw_check_bcn_info23a(struct rtw_adapter *Adapter, u8 *pframe, u32 packet_len);
void update_IOT_info23a(struct rtw_adapter *padapter);
void update_capinfo23a(struct rtw_adapter *Adapter, u16 updateCap);
void update_wireless_mode23a(struct rtw_adapter * padapter);
void update_tx_basic_rate23a(struct rtw_adapter *padapter, u8 modulation);
void update_bmc_sta_support_rate23a(struct rtw_adapter *padapter, u32 mac_id);
int update_sta_support_rate23a(struct rtw_adapter *padapter, u8* pvar_ie,
uint var_ie_len, int cam_idx);
/* for sta/adhoc mode */
void update_sta_info23a(struct rtw_adapter *padapter, struct sta_info *psta);
unsigned int update_basic_rate23a(unsigned char *ptn, unsigned int ptn_sz);
unsigned int update_supported_rate23a(unsigned char *ptn, unsigned int ptn_sz);
unsigned int update_MSC_rate23a(struct HT_caps_element *pHT_caps);
void Update_RA_Entry23a(struct rtw_adapter *padapter, struct sta_info *psta);
void set_sta_rate23a(struct rtw_adapter *padapter, struct sta_info *psta);
unsigned int receive_disconnect23a(struct rtw_adapter *padapter,
unsigned char *MacAddr, unsigned short reason);
unsigned char get_highest_rate_idx23a(u32 mask);
int support_short_GI23a(struct rtw_adapter *padapter,
struct HT_caps_element *pHT_caps);
unsigned int is_ap_in_tkip23a(struct rtw_adapter *padapter);
unsigned int is_ap_in_wep23a(struct rtw_adapter *padapter);
unsigned int should_forbid_n_rate23a(struct rtw_adapter *padapter);
void report_join_res23a(struct rtw_adapter *padapter, int res);
void report_survey_event23a(struct rtw_adapter *padapter,
struct recv_frame *precv_frame);
void report_surveydone_event23a(struct rtw_adapter *padapter);
void report_del_sta_event23a(struct rtw_adapter *padapter,
unsigned char *MacAddr, unsigned short reason);
void report_add_sta_event23a(struct rtw_adapter *padapter,
unsigned char *MacAddr, int cam_idx);
void beacon_timing_control23a(struct rtw_adapter *padapter);
u8 set_tx_beacon_cmd23a(struct rtw_adapter*padapter);
unsigned int setup_beacon_frame(struct rtw_adapter *padapter,
unsigned char *beacon_frame);
void update_mgnt_tx_rate23a(struct rtw_adapter *padapter, u8 rate);
void update_mgntframe_attrib23a(struct rtw_adapter *padapter,
struct pkt_attrib *pattrib);
void dump_mgntframe23a(struct rtw_adapter *padapter,
struct xmit_frame *pmgntframe);
s32 dump_mgntframe23a_and_wait(struct rtw_adapter *padapter,
struct xmit_frame *pmgntframe, int timeout_ms);
s32 dump_mgntframe23a_and_wait_ack23a(struct rtw_adapter *padapter,
struct xmit_frame *pmgntframe);
#ifdef CONFIG_8723AU_P2P
void issue_probersp23a_p2p23a(struct rtw_adapter *padapter, unsigned char *da);
void issue_p2p_provision_request23a(struct rtw_adapter *padapter, u8 *pssid,
u8 ussidlen, u8* pdev_raddr);
void issue_p2p_GO_request23a(struct rtw_adapter *padapter, u8* raddr);
void issue23a_probereq_p2p(struct rtw_adapter *padapter, u8 *da);
int issue23a_probereq_p2p_ex(struct rtw_adapter *adapter, u8 *da, int try_cnt,
int wait_ms);
void issue_p2p_invitation_response23a(struct rtw_adapter *padapter, u8* raddr,
u8 dialogToken, u8 success);
void issue_p2p_invitation_request23a(struct rtw_adapter *padapter, u8* raddr);
#endif /* CONFIG_8723AU_P2P */
void issue_beacon23a(struct rtw_adapter *padapter, int timeout_ms);
void issue_probersp23a(struct rtw_adapter *padapter, unsigned char *da,
u8 is_valid_p2p_probereq);
void issue_assocreq23a(struct rtw_adapter *padapter);
void issue_asocrsp23a(struct rtw_adapter *padapter, unsigned short status,
struct sta_info *pstat, int pkt_type);
void issue_auth23a(struct rtw_adapter *padapter, struct sta_info *psta,
unsigned short status);
void issue_probereq23a(struct rtw_adapter *padapter, struct cfg80211_ssid *pssid,
u8 *da);
s32 issue_probereq23a_ex23a(struct rtw_adapter *padapter, struct cfg80211_ssid *pssid,
u8 *da, int try_cnt, int wait_ms);
int issue_nulldata23a(struct rtw_adapter *padapter, unsigned char *da,
unsigned int power_mode, int try_cnt, int wait_ms);
int issue_qos_nulldata23a(struct rtw_adapter *padapter, unsigned char *da, u16 tid,
int try_cnt, int wait_ms);
int issue_deauth23a(struct rtw_adapter *padapter, unsigned char *da,
unsigned short reason);
int issue_deauth23a_ex23a(struct rtw_adapter *padapter, u8 *da, unsigned short reason,
int try_cnt, int wait_ms);
void issue_action_spct_ch_switch23a(struct rtw_adapter *padapter, u8 *ra,
u8 new_ch, u8 ch_offset);
void issue_action_BA23a(struct rtw_adapter *padapter, unsigned char *raddr,
unsigned char action, unsigned short status);
unsigned int send_delba23a(struct rtw_adapter *padapter, u8 initiator, u8 *addr);
unsigned int send_beacon23a(struct rtw_adapter *padapter);
void start_clnt_assoc23a(struct rtw_adapter *padapter);
void start_clnt_auth23a(struct rtw_adapter *padapter);
void start_clnt_join23a(struct rtw_adapter *padapter);
void start_create_ibss23a(struct rtw_adapter *padapter);
unsigned int OnAssocReq23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnAssocRsp23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnProbeReq23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnProbeRsp23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int DoReserved23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnBeacon23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnAtim23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnDisassoc23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnAuth23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnAuth23aClient23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnDeAuth23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnAction23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int on_action_spct23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnAction23a_qos(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnAction23a_dls(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnAction23a_back23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int on_action_public23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnAction23a_ht(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnAction23a_wmm(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
unsigned int OnAction23a_p2p(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
void mlmeext_joinbss_event_callback23a(struct rtw_adapter *padapter, int join_res);
void mlmeext_sta_del_event_callback23a(struct rtw_adapter *padapter);
void mlmeext_sta_add_event_callback23a(struct rtw_adapter *padapter, struct sta_info *psta);
void linked_status_chk23a(struct rtw_adapter *padapter);
#define set_survey_timer(mlmeext, ms) \
/*DBG_8723A("%s set_survey_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms));*/ \
mod_timer(&mlmeext->survey_timer, jiffies + msecs_to_jiffies(ms));
#define set_link_timer(mlmeext, ms) \
/*DBG_8723A("%s set_link_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms));*/ \
mod_timer(&mlmeext->link_timer, jiffies + msecs_to_jiffies(ms));
int cckrates_included23a(unsigned char *rate, int ratelen);
int cckratesonly_included23a(unsigned char *rate, int ratelen);
void process_addba_req23a(struct rtw_adapter *padapter, u8 *paddba_req, u8 *addr);
void update_TSF23a(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len);
void correct_TSF23a(struct rtw_adapter *padapter, struct mlme_ext_priv *pmlmeext);
struct cmd_hdl {
uint parmsize;
u8 (*h2cfuns)(struct rtw_adapter *padapter, u8 *pbuf);
};
u8 read_macreg_hdl(struct rtw_adapter *padapter, u8 *pbuf);
u8 write_macreg_hdl(struct rtw_adapter *padapter, u8 *pbuf);
u8 read_bbreg_hdl(struct rtw_adapter *padapter, u8 *pbuf);
u8 write_bbreg_hdl(struct rtw_adapter *padapter, u8 *pbuf);
u8 read_rfreg_hdl(struct rtw_adapter *padapter, u8 *pbuf);
u8 write_rfreg_hdl(struct rtw_adapter *padapter, u8 *pbuf);
u8 NULL_hdl23a(struct rtw_adapter *padapter, u8 *pbuf);
u8 join_cmd_hdl23a(struct rtw_adapter *padapter, u8 *pbuf);
u8 disconnect_hdl23a(struct rtw_adapter *padapter, u8 *pbuf);
u8 createbss_hdl23a(struct rtw_adapter *padapter, u8 *pbuf);
u8 setopmode_hdl23a(struct rtw_adapter *padapter, u8 *pbuf);
u8 sitesurvey_cmd_hdl23a(struct rtw_adapter *padapter, u8 *pbuf);
u8 setauth_hdl23a(struct rtw_adapter *padapter, u8 *pbuf);
u8 setkey_hdl23a(struct rtw_adapter *padapter, u8 *pbuf);
u8 set_stakey_hdl23a(struct rtw_adapter *padapter, u8 *pbuf);
u8 set_assocsta_hdl(struct rtw_adapter *padapter, u8 *pbuf);
u8 del_assocsta_hdl(struct rtw_adapter *padapter, u8 *pbuf);
u8 add_ba_hdl23a(struct rtw_adapter *padapter, unsigned char *pbuf);
u8 mlme_evt_hdl23a(struct rtw_adapter *padapter, unsigned char *pbuf);
u8 h2c_msg_hdl23a(struct rtw_adapter *padapter, unsigned char *pbuf);
u8 tx_beacon_hdl23a(struct rtw_adapter *padapter, unsigned char *pbuf);
u8 set_ch_hdl23a(struct rtw_adapter *padapter, u8 *pbuf);
u8 set_chplan_hdl23a(struct rtw_adapter *padapter, unsigned char *pbuf);
u8 led_blink_hdl23a(struct rtw_adapter *padapter, unsigned char *pbuf);
u8 set_csa_hdl23a(struct rtw_adapter *padapter, unsigned char *pbuf); /* Kurt: Handling DFS channel switch announcement ie. */
u8 tdls_hdl23a(struct rtw_adapter *padapter, unsigned char *pbuf);
#define GEN_DRV_CMD_HANDLER(size, cmd) {size, &cmd ## _hdl23a},
#define GEN_MLME_EXT_HANDLER(size, cmd) {size, cmd},
struct C2HEvent_Header {
#ifdef __LITTLE_ENDIAN
unsigned int len:16;
unsigned int ID:8;
unsigned int seq:8;
#elif defined(__BIG_ENDIAN)
unsigned int seq:8;
unsigned int ID:8;
unsigned int len:16;
#else
# error "Must be LITTLE or BIG Endian"
#endif
unsigned int rsvd;
};
void rtw_dummy_event_callback23a(struct rtw_adapter *adapter , u8 *pbuf);
void rtw23a_fwdbg_event_callback(struct rtw_adapter *adapter , u8 *pbuf);
enum rtw_c2h_event {
GEN_EVT_CODE(_Read_MACREG) = 0, /*0*/
GEN_EVT_CODE(_Read_BBREG),
GEN_EVT_CODE(_Read_RFREG),
GEN_EVT_CODE(_Read_EEPROM),
GEN_EVT_CODE(_Read_EFUSE),
GEN_EVT_CODE(_Read_CAM), /*5*/
GEN_EVT_CODE(_Get_BasicRate),
GEN_EVT_CODE(_Get_DataRate),
GEN_EVT_CODE(_Survey), /*8*/
GEN_EVT_CODE(_SurveyDone), /*9*/
GEN_EVT_CODE(_JoinBss) , /*10*/
GEN_EVT_CODE(_AddSTA),
GEN_EVT_CODE(_DelSTA),
GEN_EVT_CODE(_AtimDone) ,
GEN_EVT_CODE(_TX_Report),
GEN_EVT_CODE(_CCX_Report), /*15*/
GEN_EVT_CODE(_DTM_Report),
GEN_EVT_CODE(_TX_Rate_Statistics),
GEN_EVT_CODE(_C2HLBK),
GEN_EVT_CODE(_FWDBG),
GEN_EVT_CODE(_C2HFEEDBACK), /*20*/
GEN_EVT_CODE(_ADDBA),
GEN_EVT_CODE(_C2HBCN),
GEN_EVT_CODE(_ReportPwrState), /* filen: only for PCIE, USB */
GEN_EVT_CODE(_CloseRF), /* filen: only for PCIE, work around ASPM */
MAX_C2HEVT
};
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTW_P2P_H_
#define __RTW_P2P_H_
#include <drv_types.h>
u32 build_beacon_p2p_ie23a(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_probe_resp_p2p_ie23a(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_prov_disc_request_p2p_ie23a(struct wifidirect_info *pwdinfo, u8 *pbuf,
u8 *pssid, u8 ussidlen, u8 *pdev_raddr);
u32 build_assoc_resp_p2p_ie23a(struct wifidirect_info *pwdinfo, u8 *pbuf,
u8 status_code);
u32 build_deauth_p2p_ie23a(struct wifidirect_info *pwdinfo, u8 *pbuf);
#ifdef CONFIG_8723AU_P2P
u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf,
u8 tunneled);
u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_invitation_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_invitation_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
#endif /* CONFIG_8723AU_P2P */
u32 process_probe_req_p2p_ie23a(struct wifidirect_info *pwdinfo, u8 *pframe,
uint len);
u32 process_assoc_req_p2p_ie23a(struct wifidirect_info *pwdinfo, u8 *pframe,
uint len, struct sta_info *psta);
u32 process_p2p_devdisc_req23a(struct wifidirect_info *pwdinfo, u8 *pframe,
uint len);
u32 process_p2p_devdisc_resp23a(struct wifidirect_info *pwdinfo, u8 *pframe,
uint len);
u8 process_p2p_provdisc_req23a(struct wifidirect_info *pwdinfo, u8 *pframe,
uint len);
u8 process_p2p_provdisc_resp23a(struct wifidirect_info *pwdinfo, u8 *pframe);
u8 process_p2p_group_negotation_req23a(struct wifidirect_info *pwdinfo,
u8 *pframe, uint len);
u8 process_p2p_group_negotation_resp23a(struct wifidirect_info *pwdinfo,
u8 *pframe, uint len);
u8 process_p2p_group_negotation_confirm23a(struct wifidirect_info *pwdinfo,
u8 *pframe, uint len);
u8 process_p2p_presence_req23a(struct wifidirect_info *pwdinfo,
u8 *pframe, uint len);
void p2p_protocol_wk_hdl23a(struct rtw_adapter *padapter, int cmdtype);
#ifdef CONFIG_8723AU_P2P
void process_p2p_ps_ie23a(struct rtw_adapter *padapter, u8 *IEs, u32 IELength);
void p2p_ps_wk_hdl23a(struct rtw_adapter *padapter, u8 p2p_ps_state);
u8 p2p_ps_wk_cmd23a(struct rtw_adapter *padapter, u8 p2p_ps_state, u8 enqueue);
#endif /* CONFIG_8723AU_P2P */
void rtw_init_cfg80211_wifidirect_info(struct rtw_adapter *padapter);
int rtw_p2p_check_frames(struct rtw_adapter *padapter, const u8 *buf,
u32 len, u8 tx);
void rtw_append_wfd_ie(struct rtw_adapter *padapter, u8 *buf, u32 *len);
void reset_global_wifidirect_info23a(struct rtw_adapter *padapter);
int rtw_init_wifi_display_info(struct rtw_adapter *padapter);
void rtw_init_wifidirect_timers23a(struct rtw_adapter *padapter);
void rtw_init_wifidirect_addrs23a(struct rtw_adapter *padapter, u8 *dev_addr,
u8 *iface_addr);
void init_wifidirect_info23a(struct rtw_adapter *padapter, enum P2P_ROLE role);
int rtw_p2p_enable23a(struct rtw_adapter *padapter, enum P2P_ROLE role);
static inline void _rtw_p2p_set_state(struct wifidirect_info *wdinfo,
enum P2P_STATE state)
{
if (wdinfo->p2p_state != state) {
/* wdinfo->pre_p2p_state = wdinfo->p2p_state; */
wdinfo->p2p_state = state;
}
}
static inline void _rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo,
enum P2P_STATE state)
{
if (wdinfo->pre_p2p_state != state)
wdinfo->pre_p2p_state = state;
}
static inline void _rtw_p2p_set_role(struct wifidirect_info *wdinfo,
enum P2P_ROLE role)
{
if (wdinfo->role != role)
wdinfo->role = role;
}
static inline int _rtw_p2p_state(struct wifidirect_info *wdinfo)
{
return wdinfo->p2p_state;
}
static inline int _rtw_p2p_pre_state(struct wifidirect_info *wdinfo)
{
return wdinfo->pre_p2p_state;
}
static inline int _rtw_p2p_role(struct wifidirect_info *wdinfo)
{
return wdinfo->role;
}
static inline bool _rtw_p2p_chk_state(struct wifidirect_info *wdinfo,
enum P2P_STATE state)
{
return wdinfo->p2p_state == state;
}
static inline bool _rtw_p2p_chk_role(struct wifidirect_info *wdinfo,
enum P2P_ROLE role)
{
return wdinfo->role == role;
}
#define rtw_p2p_set_state(wdinfo, state) _rtw_p2p_set_state(wdinfo, state)
#define rtw_p2p_set_pre_state(wdinfo, state) \
_rtw_p2p_set_pre_state(wdinfo, state)
#define rtw_p2p_set_role(wdinfo, role) _rtw_p2p_set_role(wdinfo, role)
#define rtw_p2p_state(wdinfo) _rtw_p2p_state(wdinfo)
#define rtw_p2p_pre_state(wdinfo) _rtw_p2p_pre_state(wdinfo)
#define rtw_p2p_role(wdinfo) _rtw_p2p_role(wdinfo)
#define rtw_p2p_chk_state(wdinfo, state) _rtw_p2p_chk_state(wdinfo, state)
#define rtw_p2p_chk_role(wdinfo, role) _rtw_p2p_chk_role(wdinfo, role)
#define rtw_p2p_findphase_ex_set(wdinfo, value) \
((wdinfo)->find_phase_state_exchange_cnt = (value))
/* is this find phase exchange for social channel scan? */
#define rtw_p2p_findphase_ex_is_social(wdinfo) \
((wdinfo)->find_phase_state_exchange_cnt >= \
P2P_FINDPHASE_EX_SOCIAL_FIRST)
/* should we need find phase exchange anymore? */
#define rtw_p2p_findphase_ex_is_needed(wdinfo) \
((wdinfo)->find_phase_state_exchange_cnt < P2P_FINDPHASE_EX_MAX && \
(wdinfo)->find_phase_state_exchange_cnt != P2P_FINDPHASE_EX_NONE)
#endif

265
drivers/staging/rtl8723au/include/rtw_pwrctrl.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTW_PWRCTRL_H_
#define __RTW_PWRCTRL_H_
#include <osdep_service.h>
#include <drv_types.h>
#define FW_PWR0 0
#define FW_PWR1 1
#define FW_PWR2 2
#define FW_PWR3 3
#define HW_PWR0 7
#define HW_PWR1 6
#define HW_PWR2 2
#define HW_PWR3 0
#define HW_PWR4 8
#define FW_PWRMSK 0x7
#define XMIT_ALIVE BIT(0)
#define RECV_ALIVE BIT(1)
#define CMD_ALIVE BIT(2)
#define EVT_ALIVE BIT(3)
enum Power_Mgnt {
PS_MODE_ACTIVE = 0,
PS_MODE_MIN,
PS_MODE_MAX,
PS_MODE_DTIM,
PS_MODE_VOIP,
PS_MODE_UAPSD_WMM,
PS_MODE_UAPSD,
PS_MODE_IBSS,
PS_MODE_WWLAN,
PM_Radio_Off,
PM_Card_Disable,
PS_MODE_NUM
};
/* BIT[2:0] = HW state
* BIT[3] = Protocol PS state, 0: active, 1: sleep state
* BIT[4] = sub-state
*/
#define PS_DPS BIT(0)
#define PS_LCLK (PS_DPS)
#define PS_RF_OFF BIT(1)
#define PS_ALL_ON BIT(2)
#define PS_ST_ACTIVE BIT(3)
#define PS_ISR_ENABLE BIT(4)
#define PS_IMR_ENABLE BIT(5)
#define PS_ACK BIT(6)
#define PS_TOGGLE BIT(7)
#define PS_STATE_MASK (0x0F)
#define PS_STATE_HW_MASK (0x07)
#define PS_SEQ_MASK (0xc0)
#define PS_STATE(x) (PS_STATE_MASK & (x))
#define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x))
#define PS_SEQ(x) (PS_SEQ_MASK & (x))
#define PS_STATE_S0 (PS_DPS)
#define PS_STATE_S1 (PS_LCLK)
#define PS_STATE_S2 (PS_RF_OFF)
#define PS_STATE_S3 (PS_ALL_ON)
#define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON))
#define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON))
#define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE))
#define CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
struct reportpwrstate_parm {
unsigned char mode;
unsigned char state; /* the CPWM value */
unsigned short rsvd;
};
#define LPS_DELAY_TIME (1*HZ) /* 1 sec */
#define EXE_PWR_NONE 0x01
#define EXE_PWR_IPS 0x02
#define EXE_PWR_LPS 0x04
/* RF state. */
enum rt_rf_power_state {
rf_on, /* RF is on after RFSleep or RFOff */
rf_sleep, /* 802.11 Power Save mode */
rf_off, /* HW/SW Radio OFF or Inactive Power Save */
/* Add the new RF state above this line===== */
rf_max
};
/* RF Off Level for IPS or HW/SW radio off */
#define RT_RF_OFF_LEVL_ASPM BIT(0) /* PCI ASPM */
#define RT_RF_OFF_LEVL_CLK_REQ BIT(1) /* PCI clock request */
#define RT_RF_OFF_LEVL_PCI_D3 BIT(2) /* PCI D3 mode */
/* NIC halt, re-init hw params */
#define RT_RF_OFF_LEVL_HALT_NIC BIT(3)
/* FW free, re-download the FW */
#define RT_RF_OFF_LEVL_FREE_FW BIT(4)
#define RT_RF_OFF_LEVL_FW_32K BIT(5) /* FW in 32k */
/* Always enable ASPM and Clock Req in initialization. */
#define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT(6)
/* When LPS is on, disable 2R if no packet is received or transmittd. */
#define RT_RF_LPS_DISALBE_2R BIT(30)
#define RT_RF_LPS_LEVEL_ASPM BIT(31) /* LPS with ASPM */
#define RT_IN_PS_LEVEL(ppsc, _PS_FLAG) \
((ppsc->cur_ps_level & _PS_FLAG) ? true : false)
#define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG) \
(ppsc->cur_ps_level &= (~(_PS_FLAG)))
#define RT_SET_PS_LEVEL(ppsc, _PS_FLAG) \
(ppsc->cur_ps_level |= _PS_FLAG)
enum {
PSBBREG_RF0 = 0,
PSBBREG_RF1,
PSBBREG_RF2,
PSBBREG_AFE0,
PSBBREG_TOTALCNT
};
enum { /* for ips_mode */
IPS_NONE = 0,
IPS_NORMAL,
IPS_LEVEL_2,
};
struct pwrctrl_priv {
struct semaphore lock;
volatile u8 rpwm; /* requested power state for fw */
volatile u8 cpwm; /* fw current power state. updated when 1.
* read from HCPWM 2. driver lowers power level
*/
volatile u8 tog; /* toggling */
volatile u8 cpwm_tog; /* toggling */
u8 pwr_mode;
u8 smart_ps;
u8 bcn_ant_mode;
u32 alives;
struct work_struct cpwm_event;
u8 bpower_saving;
u8 b_hw_radio_off;
u8 reg_rfoff;
u8 reg_pdnmode; /* powerdown mode */
u32 rfoff_reason;
/* RF OFF Level */
u32 cur_ps_level;
u32 reg_rfps_level;
uint ips_enter23a_cnts;
uint ips_leave23a_cnts;
u8 ips_mode;
u8 ips_mode_req; /* used to accept the mode setting request */
uint bips_processing;
u32 ips_deny_time; /* will deny IPS when system time is smaller */
u8 ps_processing; /* used to mark whether in rtw_ps_processor23a */
u8 bLeisurePs;
u8 LpsIdleCount;
u8 power_mgnt;
u8 bFwCurrentInPSMode;
unsigned long DelayLPSLastTimeStamp;
u8 btcoex_rfon;
s32 pnp_current_pwr_state;
u8 pnp_bstop_trx;
u8 bInternalAutoSuspend;
u8 bInSuspend;
#ifdef CONFIG_8723AU_BT_COEXIST
u8 bAutoResume;
u8 autopm_cnt;
#endif
u8 bSupportRemoteWakeup;
struct timer_list pwr_state_check_timer;
int pwr_state_check_interval;
u8 pwr_state_check_cnts;
int ps_flag;
enum rt_rf_power_state rf_pwrstate;/* cur power state */
enum rt_rf_power_state change_rfpwrstate;
u8 wepkeymask;
u8 bHWPowerdown;/* if support hw power down */
u8 bHWPwrPindetect;
u8 bkeepfwalive;
u8 brfoffbyhw;
unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
};
#define rtw_get_ips_mode_req(pwrctrlpriv) \
((pwrctrlpriv)->ips_mode_req)
#define rtw_ips_mode_req(pwrctrlpriv, ips_mode) \
((pwrctrlpriv)->ips_mode_req = (ips_mode))
#define RTW_PWR_STATE_CHK_INTERVAL 2000
#define _rtw_set_pwr_state_check_timer(pwrctrlpriv, ms) \
(mod_timer(&pwrctrlpriv->pwr_state_check_timer, jiffies + \
msecs_to_jiffies(ms)))
#define rtw_set_pwr_state_check_timer(pwrctrlpriv) \
(_rtw_set_pwr_state_check_timer((pwrctrlpriv), \
(pwrctrlpriv)->pwr_state_check_interval))
void rtw_init_pwrctrl_priv23a(struct rtw_adapter *adapter);
void rtw_free_pwrctrl_priv(struct rtw_adapter *adapter);
void rtw_set_ps_mode23a(struct rtw_adapter *padapter, u8 ps_mode,
u8 smart_ps, u8 bcn_ant_mode);
void rtw_set_rpwm23a(struct rtw_adapter *padapter, u8 val8);
void LeaveAllPowerSaveMode23a(struct rtw_adapter *adapter);
void ips_enter23a(struct rtw_adapter *padapter);
int ips_leave23a(struct rtw_adapter *padapter);
void rtw_ps_processor23a(struct rtw_adapter *padapter);
enum rt_rf_power_state RfOnOffDetect23a(struct rtw_adapter *adapter);
s32 LPS_RF_ON_check23a(struct rtw_adapter *padapter, u32 delay_ms);
void LPS_Enter23a(struct rtw_adapter *padapter);
void LPS_Leave23a(struct rtw_adapter *padapter);
u8 rtw_interface_ps_func23a(struct rtw_adapter *padapter,
enum hal_intf_ps_func efunc_id, u8 *val);
void rtw_set_ips_deny23a(struct rtw_adapter *padapter, u32 ms);
int _rtw_pwr_wakeup23a(struct rtw_adapter *padapter, u32 ips_deffer_ms,
const char *caller);
#define rtw_pwr_wakeup(adapter) _rtw_pwr_wakeup23a(adapter, \
RTW_PWR_STATE_CHK_INTERVAL, __func__)
#define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) \
_rtw_pwr_wakeup23a(adapter, ips_deffer_ms, __func__)
int rtw_pm_set_ips23a(struct rtw_adapter *padapter, u8 mode);
int rtw_pm_set_lps23a(struct rtw_adapter *padapter, u8 mode);
#endif /* __RTL871X_PWRCTRL_H_ */

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drivers/staging/rtl8723au/include/rtw_qos.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _RTW_QOS_H_
#define _RTW_QOS_H_
#include <osdep_service.h>
struct qos_priv {
/* bit mask option: u-apsd, s-apsd, ts, block ack... */
unsigned int qos_option;
};
#endif /* _RTL871X_QOS_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _RTW_RECV_H_
#define _RTW_RECV_H_
#include <osdep_service.h>
#include <drv_types.h>
#define NR_RECVFRAME 256
#define MAX_RXFRAME_CNT 512
#define MAX_RX_NUMBLKS (32)
#define RECVFRAME_HDR_ALIGN 128
#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
#define MAX_SUBFRAME_COUNT 64
/* for Rx reordering buffer control */
struct recv_reorder_ctrl {
struct rtw_adapter *padapter;
u8 enable;
u16 indicate_seq;/* wstart_b, init_value=0xffff */
u16 wend_b;
u8 wsize_b;
struct rtw_queue pending_recvframe_queue;
struct timer_list reordering_ctrl_timer;
};
struct stainfo_rxcache {
u16 tid_rxseq[16];
/*
unsigned short tid0_rxseq;
unsigned short tid1_rxseq;
unsigned short tid2_rxseq;
unsigned short tid3_rxseq;
unsigned short tid4_rxseq;
unsigned short tid5_rxseq;
unsigned short tid6_rxseq;
unsigned short tid7_rxseq;
unsigned short tid8_rxseq;
unsigned short tid9_rxseq;
unsigned short tid10_rxseq;
unsigned short tid11_rxseq;
unsigned short tid12_rxseq;
unsigned short tid13_rxseq;
unsigned short tid14_rxseq;
unsigned short tid15_rxseq;
*/
};
struct smooth_rssi_data {
u32 elements[100]; /* array to store values */
u32 index; /* index to current array to store */
u32 total_num; /* num of valid elements */
u32 total_val; /* sum of valid elements */
};
struct signal_stat {
u8 update_req; /* used to indicate */
u8 avg_val; /* avg of valid elements */
u32 total_num; /* num of valid elements */
u32 total_val; /* sum of valid elements */
};
#define MAX_PATH_NUM_92CS 2
struct phy_info {
u8 RxPWDBAll;
u8 SignalQuality; /* in 0-100 index. */
u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; /* EVM */
u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];/* 0~100 */
s8 RxPower; /* in dBm Translate from PWdB */
/* Real power in dBm for this packet, no beautification and aggregation.
* Keep this raw info to be used for the other procedures.
*/
s8 RecvSignalPower;
u8 BTRxRSSIPercentage;
u8 SignalStrength; /* in 0-100 index. */
u8 RxPwr[MAX_PATH_NUM_92CS];/* per-path's pwdb */
u8 RxSNR[MAX_PATH_NUM_92CS];/* per-path's SNR */
};
struct rx_pkt_attrib {
u16 pkt_len;
u8 physt;
u8 drvinfo_sz;
u8 shift_sz;
u8 hdrlen; /* the WLAN Header Len */
u8 to_fr_ds;
u8 amsdu;
u8 qos;
u8 priority;
u8 pw_save;
u8 mdata;
u16 seq_num;
u8 frag_num;
u8 mfrag;
u8 order;
u8 privacy; /* in frame_ctrl field */
u8 bdecrypted;
/* when 0 indicate no encrypt. when non-zero, indicate the algorith */
u8 encrypt;
u8 iv_len;
u8 icv_len;
u8 crc_err;
u8 icv_err;
u16 eth_type;
u8 dst[ETH_ALEN];
u8 src[ETH_ALEN];
u8 ta[ETH_ALEN];
u8 ra[ETH_ALEN];
u8 bssid[ETH_ALEN];
u8 ack_policy;
u8 tcpchk_valid; /* 0: invalid, 1: valid */
u8 ip_chkrpt; /* 0: incorrect, 1: correct */
u8 tcp_chkrpt; /* 0: incorrect, 1: correct */
u8 key_index;
u8 mcs_rate;
u8 rxht;
u8 sgi;
u8 pkt_rpt_type;
u32 MacIDValidEntry[2]; /* 64 bits present 64 entry. */
struct phy_info phy_info;
};
/* These definition is used for Rx packet reordering. */
#define SN_LESS(a, b) (((a-b) & 0x800) != 0)
#define SN_EQUAL(a, b) (a == b)
#define REORDER_WAIT_TIME (50) /* (ms) */
#define RECVBUFF_ALIGN_SZ 8
#define RXDESC_SIZE 24
#define RXDESC_OFFSET RXDESC_SIZE
struct recv_stat {
unsigned int rxdw0;
unsigned int rxdw1;
unsigned int rxdw2;
unsigned int rxdw3;
unsigned int rxdw4;
unsigned int rxdw5;
};
/* accesser of recv_priv: rtw_recv_entry23a(dispatch / passive level); \
* recv_thread(passive) ; returnpkt(dispatch) ; halt(passive) ;
*
* using enter_critical section to protect
*/
struct recv_priv {
spinlock_t lock;
struct rtw_queue free_recv_queue;
struct rtw_queue recv_pending_queue;
struct rtw_queue uc_swdec_pending_queue;
void *pallocated_frame_buf;
uint free_recvframe_cnt;
struct rtw_adapter *adapter;
u32 bIsAnyNonBEPkts;
u64 rx_bytes;
u64 rx_pkts;
u64 rx_drop;
u64 last_rx_bytes;
uint rx_icv_err;
uint rx_largepacket_crcerr;
uint rx_smallpacket_crcerr;
uint rx_middlepacket_crcerr;
/* u8 *pallocated_urb_buf; */
struct semaphore allrxreturnevt;
uint ff_hwaddr;
u8 rx_pending_cnt;
struct urb *int_in_urb;
u8 *int_in_buf;
struct tasklet_struct irq_prepare_beacon_tasklet;
struct tasklet_struct recv_tasklet;
struct sk_buff_head free_recv_skb_queue;
struct sk_buff_head rx_skb_queue;
u8 *precv_buf;
struct rtw_queue free_recv_buf_queue;
u32 free_recv_buf_queue_cnt;
/* For display the phy informatiom */
u8 is_signal_dbg; /* for debug */
u8 signal_strength_dbg; /* for debug */
s8 rssi;
s8 rxpwdb;
u8 signal_strength;
u8 signal_qual;
u8 noise;
int RxSNRdB[2];
s8 RxRssi[2];
int FalseAlmCnt_all;
struct timer_list signal_stat_timer;
u32 signal_stat_sampling_interval;
/* u32 signal_stat_converging_constant; */
struct signal_stat signal_qual_data;
struct signal_stat signal_strength_data;
};
#define rtw_set_signal_stat_timer(recvpriv) \
mod_timer(&(recvpriv)->signal_stat_timer, jiffies + \
msecs_to_jiffies((recvpriv)->signal_stat_sampling_interval))
struct sta_recv_priv {
spinlock_t lock;
int option;
/* struct rtw_queue blk_strms[MAX_RX_NUMBLKS]; */
struct rtw_queue defrag_q; /* keeping the fragment frame until defrag */
struct stainfo_rxcache rxcache;
/* uint sta_rx_bytes; */
/* uint sta_rx_pkts; */
/* uint sta_rx_fail; */
};
struct recv_buf {
struct list_head list;
struct rtw_adapter *adapter;
struct urb *purb;
struct sk_buff *pskb;
};
/* head ----->
*
* data ----->
*
* payload
*
* tail ----->
*
* end ----->
*
* len = (unsigned int )(tail - data);
*
*/
struct recv_frame {
struct list_head list;
struct sk_buff *pkt;
struct rtw_adapter *adapter;
struct rx_pkt_attrib attrib;
struct sta_info *psta;
/* for A-MPDU Rx reordering buffer control */
struct recv_reorder_ctrl *preorder_ctrl;
};
/* get a free recv_frame from pfree_recv_queue */
struct recv_frame *rtw_alloc_recvframe23a(struct rtw_queue *pfree_recv_queue);
int rtw_free_recvframe23a(struct recv_frame *precvframe, struct rtw_queue *pfree_recv_queue);
int rtw_enqueue_recvframe23a(struct recv_frame *precvframe, struct rtw_queue *queue);
void rtw_free_recvframe23a_queue(struct rtw_queue *pframequeue, struct rtw_queue *pfree_recv_queue);
u32 rtw_free_uc_swdec_pending_queue23a(struct rtw_adapter *adapter);
int rtw_enqueue_recvbuf23a_to_head(struct recv_buf *precvbuf, struct rtw_queue *queue);
int rtw_enqueue_recvbuf23a(struct recv_buf *precvbuf, struct rtw_queue *queue);
struct recv_buf *rtw_dequeue_recvbuf23a(struct rtw_queue *queue);
void rtw_reordering_ctrl_timeout_handler23a(unsigned long pcontext);
static inline s32 translate_percentage_to_dbm(u32 SignalStrengthIndex)
{
s32 SignalPower; /* in dBm. */
/* Translate to dBm (x=0.5y-95). */
SignalPower = (s32)((SignalStrengthIndex + 1) >> 1);
SignalPower -= 95;
return SignalPower;
}
struct sta_info;
void _rtw_init_sta_recv_priv23a(struct sta_recv_priv *psta_recvpriv);
void mgt_dispatcher23a(struct rtw_adapter *padapter,
struct recv_frame *precv_frame);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTW_RF_H_
#define __RTW_RF_H_
#include <rtw_cmd.h>
#define OFDM_PHY 1
#define MIXED_PHY 2
#define CCK_PHY 3
#define NumRates (13)
/* slot time for 11g */
#define SHORT_SLOT_TIME 9
#define NON_SHORT_SLOT_TIME 20
/* We now define the max channels in each channel plan. */
#define MAX_CHANNEL_NUM_2G 14
#define MAX_CHANNEL_NUM_5G 24
#define MAX_CHANNEL_NUM 38/* 14+24 */
/* define NUM_REGULATORYS 21 */
#define NUM_REGULATORYS 1
/* Country codes */
#define USA 0x555320
#define EUROPE 0x1 /* temp, should be provided later */
#define JAPAN 0x2 /* temp, should be provided later */
struct regulatory_class {
u32 starting_freq; /* MHz, */
u8 channel_set[MAX_CHANNEL_NUM];
u8 channel_cck_power[MAX_CHANNEL_NUM];/* dbm */
u8 channel_ofdm_power[MAX_CHANNEL_NUM];/* dbm */
u8 txpower_limit; /* dbm */
u8 channel_spacing; /* MHz */
u8 modem;
};
enum {
cESS = 0x0001,
cIBSS = 0x0002,
cPollable = 0x0004,
cPollReq = 0x0008,
cPrivacy = 0x0010,
cShortPreamble = 0x0020,
cPBCC = 0x0040,
cChannelAgility = 0x0080,
cSpectrumMgnt = 0x0100,
cQos = 0x0200, /* For HCCA, use with CF-Pollable and CF-PollReq */
cShortSlotTime = 0x0400,
cAPSD = 0x0800,
cRM = 0x1000, /* RRM (Radio Request Measurement) */
cDSSS_OFDM = 0x2000,
cDelayedBA = 0x4000,
cImmediateBA = 0x8000,
};
enum {
PREAMBLE_LONG = 1,
PREAMBLE_AUTO = 2,
PREAMBLE_SHORT = 3,
};
/* Bandwidth Offset */
#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
#define HAL_PRIME_CHNL_OFFSET_LOWER 1
#define HAL_PRIME_CHNL_OFFSET_UPPER 2
/* Represent Channel Width in HT Capabilities */
enum ht_channel_width {
HT_CHANNEL_WIDTH_20 = 0,
HT_CHANNEL_WIDTH_40 = 1,
HT_CHANNEL_WIDTH_80 = 2,
HT_CHANNEL_WIDTH_160 = 3,
HT_CHANNEL_WIDTH_10 = 4,
};
/* */
/* Represent Extention Channel Offset in HT Capabilities */
/* This is available only in 40Mhz mode. */
/* */
enum {
HT_EXTCHNL_OFFSET_NO_EXT = 0,
HT_EXTCHNL_OFFSET_UPPER = 1,
HT_EXTCHNL_OFFSET_NO_DEF = 2,
HT_EXTCHNL_OFFSET_LOWER = 3,
};
/* 2007/11/15 MH Define different RF type. */
enum {
RF_1T2R = 0,
RF_2T4R = 1,
RF_2T2R = 2,
RF_1T1R = 3,
RF_2T2R_GREEN = 4,
RF_819X_MAX_TYPE = 5,
};
#endif /* _RTL8711_RF_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __RTW_SECURITY_H_
#define __RTW_SECURITY_H_
#include <osdep_service.h>
#include <drv_types.h>
#define _NO_PRIVACY_ 0x0
#define _WEP40_ 0x1
#define _TKIP_ 0x2
#define _TKIP_WTMIC_ 0x3
#define _AES_ 0x4
#define _WEP104_ 0x5
#define _WEP_WPA_MIXED_ 0x07 /* WEP + WPA */
#define _SMS4_ 0x06
#define is_wep_enc(alg) (((alg) == _WEP40_) || ((alg) == _WEP104_))
#define _WPA_IE_ID_ 0xdd
#define _WPA2_IE_ID_ 0x30
#define SHA256_MAC_LEN 32
#define AES_BLOCK_SIZE 16
#define AES_PRIV_SIZE (4 * 44)
enum ENCRYP_PROTOCOL {
ENCRYP_PROTOCOL_OPENSYS, /* open system */
ENCRYP_PROTOCOL_WEP, /* WEP */
ENCRYP_PROTOCOL_WPA, /* WPA */
ENCRYP_PROTOCOL_WPA2, /* WPA2 */
ENCRYP_PROTOCOL_MAX
};
#ifndef Ndis802_11AuthModeWPA2
#define Ndis802_11AuthModeWPA2 (Ndis802_11AuthModeWPANone + 1)
#endif
#ifndef Ndis802_11AuthModeWPA2PSK
#define Ndis802_11AuthModeWPA2PSK (Ndis802_11AuthModeWPANone + 2)
#endif
union pn48 {
u64 val;
#ifdef __LITTLE_ENDIAN
struct {
u8 TSC0;
u8 TSC1;
u8 TSC2;
u8 TSC3;
u8 TSC4;
u8 TSC5;
u8 TSC6;
u8 TSC7;
} _byte_;
#elif defined(__BIG_ENDIAN)
struct {
u8 TSC7;
u8 TSC6;
u8 TSC5;
u8 TSC4;
u8 TSC3;
u8 TSC2;
u8 TSC1;
u8 TSC0;
} _byte_;
#else
#error Need BIG or LITTLE endian
#endif
};
union Keytype {
u8 skey[16];
u32 lkey[4];
};
struct rt_pmkid_list {
u8 bUsed;
u8 Bssid[6];
u8 PMKID[16];
u8 SsidBuf[33];
u8 *ssid_octet;
u16 ssid_length;
};
struct security_priv {
u32 dot11AuthAlgrthm; /* 802.11 auth, could be open, shared,
* 8021x and authswitch */
u32 dot11PrivacyAlgrthm; /* This specifies the privacy for
* shared auth. algorithm.
*/
/* WEP */
u32 dot11PrivacyKeyIndex; /* this is only valid for legendary
* wep, 0~3 for key id. (tx key index)
*/
union Keytype dot11DefKey[4]; /* this is only valid for def. key */
u32 dot11DefKeylen[4];
u32 dot118021XGrpPrivacy; /* specify the privacy algthm.
* used for Grp key
*/
u32 dot118021XGrpKeyid; /* key id used for Grp Key
* (tx key index)
*/
union Keytype dot118021XGrpKey[4];/* 802.1x Grp Key, inx0 and inx1 */
union Keytype dot118021XGrptxmickey[4];
union Keytype dot118021XGrprxmickey[4];
union pn48 dot11Grptxpn; /* PN48 used for Grp Key xmit.*/
union pn48 dot11Grprxpn; /* PN48 used for Grp Key recv.*/
#ifdef CONFIG_8723AU_AP_MODE
/* extend security capabilities for AP_MODE */
unsigned int dot8021xalg;/* 0:disable, 1:psk, 2:802.1x */
unsigned int wpa_psk;/* 0:disable, bit(0): WPA, bit(1):WPA2 */
unsigned int wpa_group_cipher;
unsigned int wpa2_group_cipher;
unsigned int wpa_pairwise_cipher;
unsigned int wpa2_pairwise_cipher;
#endif
u8 wps_ie[MAX_WPS_IE_LEN];/* added in assoc req */
int wps_ie_len;
u8 binstallGrpkey;
u8 busetkipkey;
u8 bcheck_grpkey;
u8 bgrpkey_handshake;
s32 hw_decrypted;
u32 ndisauthtype; /* enum ndis_802_11_auth_mode */
u32 ndisencryptstatus; /* NDIS_802_11_ENCRYPTION_STATUS */
struct wlan_bssid_ex sec_bss; /* for joinbss (h2c buffer) usage */
struct ndis_802_11_wep ndiswep;
u8 assoc_info[600];
u8 szofcapability[256]; /* for wpa2 usage */
u8 oidassociation[512]; /* for wpa/wpa2 usage */
u8 authenticator_ie[256]; /* store ap security information element */
u8 supplicant_ie[256]; /* store sta security information element */
/* for tkip countermeasure */
unsigned long last_mic_err_time;
u8 btkip_countermeasure;
u8 btkip_wait_report;
unsigned long btkip_countermeasure_time;
/* For WPA2 Pre-Authentication. */
struct rt_pmkid_list PMKIDList[NUM_PMKID_CACHE];
u8 PMKIDIndex;
u8 bWepDefaultKeyIdxSet;
};
struct sha256_state {
u64 length;
u32 state[8], curlen;
u8 buf[64];
};
#define GET_ENCRY_ALGO(psecuritypriv, psta, encry_algo, bmcst)\
do {\
switch (psecuritypriv->dot11AuthAlgrthm) {\
case dot11AuthAlgrthm_Open:\
case dot11AuthAlgrthm_Shared:\
case dot11AuthAlgrthm_Auto:\
encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm;\
break;\
case dot11AuthAlgrthm_8021X:\
if (bmcst)\
encry_algo = (u8)psecuritypriv->dot118021XGrpPrivacy;\
else\
encry_algo = (u8)psta->dot118021XPrivacy;\
break;\
} \
} while (0)
#define GET_TKIP_PN(iv, dot11txpn)\
do {\
dot11txpn._byte_.TSC0 = iv[2];\
dot11txpn._byte_.TSC1 = iv[0];\
dot11txpn._byte_.TSC2 = iv[4];\
dot11txpn._byte_.TSC3 = iv[5];\
dot11txpn._byte_.TSC4 = iv[6];\
dot11txpn._byte_.TSC5 = iv[7];\
} while (0)
#define ROL32(A, n) (((A) << (n)) | (((A)>>(32-(n))) & ((1UL << (n)) - 1)))
#define ROR32(A, n) ROL32((A), 32-(n))
struct mic_data {
u32 K0, K1; /* Key */
u32 L, R; /* Current state */
u32 M; /* Message accumulator (single word) */
u32 nBytesInM; /* # bytes in M */
};
extern const u32 Te0[256];
extern const u32 Te1[256];
extern const u32 Te2[256];
extern const u32 Te3[256];
extern const u32 Te4[256];
extern const u32 Td0[256];
extern const u32 Td1[256];
extern const u32 Td2[256];
extern const u32 Td3[256];
extern const u32 Td4[256];
extern const u32 rcon[10];
extern const u8 Td4s[256];
extern const u8 rcons[10];
#define RCON(i) (rcons[(i)] << 24)
static inline u32 rotr(u32 val, int bits)
{
return (val >> bits) | (val << (32 - bits));
}
#define TE0(i) Te0[((i) >> 24) & 0xff]
#define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8)
#define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16)
#define TE3(i) rotr(Te0[(i) & 0xff], 24)
#define TE41(i) ((Te0[((i) >> 24) & 0xff] << 8) & 0xff000000)
#define TE42(i) (Te0[((i) >> 16) & 0xff] & 0x00ff0000)
#define TE43(i) (Te0[((i) >> 8) & 0xff] & 0x0000ff00)
#define TE44(i) ((Te0[(i) & 0xff] >> 8) & 0x000000ff)
#define TE421(i) ((Te0[((i) >> 16) & 0xff] << 8) & 0xff000000)
#define TE432(i) (Te0[((i) >> 8) & 0xff] & 0x00ff0000)
#define TE443(i) (Te0[(i) & 0xff] & 0x0000ff00)
#define TE414(i) ((Te0[((i) >> 24) & 0xff] >> 8) & 0x000000ff)
#define TE4(i) ((Te0[(i)] >> 8) & 0x000000ff)
#define TD0(i) Td0[((i) >> 24) & 0xff]
#define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8)
#define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16)
#define TD3(i) rotr(Td0[(i) & 0xff], 24)
#define TD41(i) (Td4s[((i) >> 24) & 0xff] << 24)
#define TD42(i) (Td4s[((i) >> 16) & 0xff] << 16)
#define TD43(i) (Td4s[((i) >> 8) & 0xff] << 8)
#define TD44(i) (Td4s[(i) & 0xff])
#define TD0_(i) Td0[(i) & 0xff]
#define TD1_(i) rotr(Td0[(i) & 0xff], 8)
#define TD2_(i) rotr(Td0[(i) & 0xff], 16)
#define TD3_(i) rotr(Td0[(i) & 0xff], 24)
#define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ \
((u32)(pt)[2] << 8) ^ ((u32)(pt)[3]))
#define PUTU32(ct, st) { \
(ct)[0] = (u8)((st) >> 24); (ct)[1] = (u8)((st) >> 16); \
(ct)[2] = (u8)((st) >> 8); (ct)[3] = (u8)(st); }
#define WPA_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \
(((u32) (a)[2]) << 8) | ((u32) (a)[3]))
#define WPA_PUT_LE16(a, val) \
do { \
(a)[1] = ((u16) (val)) >> 8; \
(a)[0] = ((u16) (val)) & 0xff; \
} while (0)
#define WPA_PUT_BE32(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[3] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define WPA_PUT_BE64(a, val) \
do { \
(a)[0] = (u8) (((u64) (val)) >> 56); \
(a)[1] = (u8) (((u64) (val)) >> 48); \
(a)[2] = (u8) (((u64) (val)) >> 40); \
(a)[3] = (u8) (((u64) (val)) >> 32); \
(a)[4] = (u8) (((u64) (val)) >> 24); \
(a)[5] = (u8) (((u64) (val)) >> 16); \
(a)[6] = (u8) (((u64) (val)) >> 8); \
(a)[7] = (u8) (((u64) (val)) & 0xff); \
} while (0)
/* ===== start - public domain SHA256 implementation ===== */
/* This is based on SHA256 implementation in LibTomCrypt that was released into
* public domain by Tom St Denis. */
/* the K array */
static const unsigned long K[64] = {
0x428a2f98UL, 0x71374491UL, 0xb5c0fbcfUL, 0xe9b5dba5UL, 0x3956c25bUL,
0x59f111f1UL, 0x923f82a4UL, 0xab1c5ed5UL, 0xd807aa98UL, 0x12835b01UL,
0x243185beUL, 0x550c7dc3UL, 0x72be5d74UL, 0x80deb1feUL, 0x9bdc06a7UL,
0xc19bf174UL, 0xe49b69c1UL, 0xefbe4786UL, 0x0fc19dc6UL, 0x240ca1ccUL,
0x2de92c6fUL, 0x4a7484aaUL, 0x5cb0a9dcUL, 0x76f988daUL, 0x983e5152UL,
0xa831c66dUL, 0xb00327c8UL, 0xbf597fc7UL, 0xc6e00bf3UL, 0xd5a79147UL,
0x06ca6351UL, 0x14292967UL, 0x27b70a85UL, 0x2e1b2138UL, 0x4d2c6dfcUL,
0x53380d13UL, 0x650a7354UL, 0x766a0abbUL, 0x81c2c92eUL, 0x92722c85UL,
0xa2bfe8a1UL, 0xa81a664bUL, 0xc24b8b70UL, 0xc76c51a3UL, 0xd192e819UL,
0xd6990624UL, 0xf40e3585UL, 0x106aa070UL, 0x19a4c116UL, 0x1e376c08UL,
0x2748774cUL, 0x34b0bcb5UL, 0x391c0cb3UL, 0x4ed8aa4aUL, 0x5b9cca4fUL,
0x682e6ff3UL, 0x748f82eeUL, 0x78a5636fUL, 0x84c87814UL, 0x8cc70208UL,
0x90befffaUL, 0xa4506cebUL, 0xbef9a3f7UL, 0xc67178f2UL
};
/* Various logical functions */
#define RORc(x, y) \
(((((unsigned long)(x) & 0xFFFFFFFFUL) >> (unsigned long) ((y) & 31)) | \
((unsigned long)(x) << (unsigned long) (32 - ((y) & 31)))) & 0xFFFFFFFFUL)
#define Ch(x, y, z) (z ^ (x & (y ^ z)))
#define Maj(x, y, z) (((x | y) & z) | (x & y))
#define S(x, n) RORc((x), (n))
#define R(x, n) (((x)&0xFFFFFFFFUL)>>(n))
#define Sigma0(x) (S(x, 2) ^ S(x, 13) ^ S(x, 22))
#define Sigma1(x) (S(x, 6) ^ S(x, 11) ^ S(x, 25))
#define Gamma0(x) (S(x, 7) ^ S(x, 18) ^ R(x, 3))
#define Gamma1(x) (S(x, 17) ^ S(x, 19) ^ R(x, 10))
#ifndef MIN
#define MIN(x, y) (((x) < (y)) ? (x) : (y))
#endif
void rtw_secmicsetkey23a(struct mic_data *pmicdata, u8 *key);
void rtw_secmicappend23abyte23a(struct mic_data *pmicdata, u8 b);
void rtw_secmicappend23a(struct mic_data *pmicdata, u8 *src, u32 nbBytes);
void rtw_secgetmic23a(struct mic_data *pmicdata, u8 *dst);
void rtw_seccalctkipmic23a(u8 *key, u8 *header, u8 *data, u32 data_len,
u8 *Miccode, u8 priorityi);
u32 rtw_aes_encrypt23a(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe);
u32 rtw_tkip_encrypt23a(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe);
void rtw_wep_encrypt23a(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe);
u32 rtw_aes_decrypt23a(struct rtw_adapter *padapter,
struct recv_frame *precvframe);
u32 rtw_tkip_decrypt23a(struct rtw_adapter *padapter,
struct recv_frame *precvframe);
void rtw_wep_decrypt23a(struct rtw_adapter *padapter, struct recv_frame *precvframe);
void rtw_use_tkipkey_handler23a(void *FunctionContext);
#endif /* __RTL871X_SECURITY_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _RTW_SRESET_C_
#define _RTW_SRESET_C_
#include <osdep_service.h>
#include <drv_types.h>
enum {
SRESET_TGP_NULL = 0,
SRESET_TGP_XMIT_STATUS = 1,
SRESET_TGP_LINK_STATUS = 2,
};
struct sreset_priv {
struct mutex silentreset_mutex;
u8 silent_reset_inprogress;
u8 Wifi_Error_Status;
unsigned long last_tx_time;
unsigned long last_tx_complete_time;
s32 dbg_trigger_point;
};
#include <rtl8723a_hal.h>
#define WIFI_STATUS_SUCCESS 0
#define USB_VEN_REQ_CMD_FAIL BIT0
#define USB_READ_PORT_FAIL BIT1
#define USB_WRITE_PORT_FAIL BIT2
#define WIFI_MAC_TXDMA_ERROR BIT3
#define WIFI_TX_HANG BIT4
#define WIFI_RX_HANG BIT5
#define WIFI_IF_NOT_EXIST BIT6
void sreset_init_value23a(struct rtw_adapter *padapter);
void sreset_reset_value23a(struct rtw_adapter *padapter);
u8 sreset_get_wifi_status23a(struct rtw_adapter *padapter);
void sreset_set_wifi_error_status23a(struct rtw_adapter *padapter, u32 status);
void sreset_set_trigger_point(struct rtw_adapter *padapter, s32 tgp);
bool sreset_inprogress(struct rtw_adapter *padapter);
void sreset_reset(struct rtw_adapter *padapter);
#endif

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#define DRIVERVERSION "v4.1.6_7336.20130426"

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _RTW_XMIT_H_
#define _RTW_XMIT_H_
#include <osdep_service.h>
#include <drv_types.h>
#define MAX_XMITBUF_SZ 2048
#define NR_XMITBUFF 4
#define XMITBUF_ALIGN_SZ 512
/* xmit extension buff defination */
#define MAX_XMIT_EXTBUF_SZ 1536
#define NR_XMIT_EXTBUFF 32
#define MAX_NUMBLKS 1
#define XMIT_VO_QUEUE 0
#define XMIT_VI_QUEUE 1
#define XMIT_BE_QUEUE 2
#define XMIT_BK_QUEUE 3
#define VO_QUEUE_INX 0
#define VI_QUEUE_INX 1
#define BE_QUEUE_INX 2
#define BK_QUEUE_INX 3
#define BCN_QUEUE_INX 4
#define MGT_QUEUE_INX 5
#define HIGH_QUEUE_INX 6
#define TXCMD_QUEUE_INX 7
#define HW_QUEUE_ENTRY 8
#define WEP_IV(pattrib_iv, dot11txpn, keyidx) \
do { \
pattrib_iv[0] = dot11txpn._byte_.TSC0; \
pattrib_iv[1] = dot11txpn._byte_.TSC1; \
pattrib_iv[2] = dot11txpn._byte_.TSC2; \
pattrib_iv[3] = ((keyidx & 0x3) << 6); \
dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0 : \
(dot11txpn.val+1); \
} while (0)
#define TKIP_IV(pattrib_iv, dot11txpn, keyidx) \
do { \
pattrib_iv[0] = dot11txpn._byte_.TSC1; \
pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f; \
pattrib_iv[2] = dot11txpn._byte_.TSC0; \
pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6); \
pattrib_iv[4] = dot11txpn._byte_.TSC2; \
pattrib_iv[5] = dot11txpn._byte_.TSC3; \
pattrib_iv[6] = dot11txpn._byte_.TSC4; \
pattrib_iv[7] = dot11txpn._byte_.TSC5; \
dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : \
(dot11txpn.val+1); \
} while (0)
#define AES_IV(pattrib_iv, dot11txpn, keyidx)\
do { \
pattrib_iv[0] = dot11txpn._byte_.TSC0; \
pattrib_iv[1] = dot11txpn._byte_.TSC1; \
pattrib_iv[2] = 0; \
pattrib_iv[3] = BIT(5) | ((keyidx & 0x3) << 6); \
pattrib_iv[4] = dot11txpn._byte_.TSC2; \
pattrib_iv[5] = dot11txpn._byte_.TSC3; \
pattrib_iv[6] = dot11txpn._byte_.TSC4; \
pattrib_iv[7] = dot11txpn._byte_.TSC5; \
dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : \
(dot11txpn.val+1); \
} while (0)
#define HWXMIT_ENTRY 4
#define TXDESC_SIZE 32
#define PACKET_OFFSET_SZ 8
#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
struct tx_desc {
/* DWORD 0 */
unsigned int txdw0;
unsigned int txdw1;
unsigned int txdw2;
unsigned int txdw3;
unsigned int txdw4;
unsigned int txdw5;
unsigned int txdw6;
unsigned int txdw7;
};
union txdesc {
struct tx_desc txdesc;
unsigned int value[TXDESC_SIZE>>2];
};
struct hw_xmit {
struct rtw_queue *sta_queue;
int accnt;
};
/* reduce size */
struct pkt_attrib {
u8 type;
u8 subtype;
u8 bswenc;
u8 dhcp_pkt;
u16 ether_type;
u16 seqnum;
u16 pkt_hdrlen; /* the original 802.3 pkt header len */
u16 hdrlen; /* the WLAN Header Len */
u32 pktlen; /* the original 802.3 pkt raw_data len */
u32 last_txcmdsz;
u8 nr_frags;
u8 encrypt; /* when 0 indicate no encrypt. */
u8 iv_len;
u8 icv_len;
u8 iv[18];
u8 icv[16];
u8 priority;
u8 ack_policy;
u8 mac_id;
u8 vcs_mode; /* virtual carrier sense method */
u8 dst[ETH_ALEN];
u8 src[ETH_ALEN];
u8 ta[ETH_ALEN];
u8 ra[ETH_ALEN];
u8 key_idx;
u8 qos_en;
u8 ht_en;
u8 raid;/* rate adpative id */
u8 bwmode;
u8 ch_offset;/* PRIME_CHNL_OFFSET */
u8 sgi;/* short GI */
u8 ampdu_en;/* tx ampdu enable */
u8 mdata;/* more data bit */
u8 pctrl;/* per packet txdesc control enable */
u8 triggered;/* for ap mode handling Power Saving sta */
u8 qsel;
u8 eosp;
u8 rate;
u8 retry_ctrl;
struct sta_info *psta;
};
#define WLANHDR_OFFSET 64
#define NULL_FRAMETAG 0x0
#define DATA_FRAMETAG 0x01
#define L2_FRAMETAG 0x02
#define MGNT_FRAMETAG 0x03
#define AMSDU_FRAMETAG 0x04
#define EII_FRAMETAG 0x05
#define IEEE8023_FRAMETAG 0x06
#define MP_FRAMETAG 0x07
#define TXAGG_FRAMETAG 0x08
struct submit_ctx {
u32 timeout_ms; /* <0: not synchronous, 0: wait forever,
* >0: up to ms waiting
*/
int status; /* status for operation */
struct completion done;
};
enum {
RTW_SCTX_SUBMITTED = -1,
RTW_SCTX_DONE_SUCCESS = 0,
RTW_SCTX_DONE_UNKNOWN,
RTW_SCTX_DONE_TIMEOUT,
RTW_SCTX_DONE_BUF_ALLOC,
RTW_SCTX_DONE_BUF_FREE,
RTW_SCTX_DONE_WRITE_PORT_ERR,
RTW_SCTX_DONE_TX_DESC_NA,
RTW_SCTX_DONE_TX_DENY,
RTW_SCTX_DONE_CCX_PKT_FAIL,
RTW_SCTX_DONE_DRV_STOP,
RTW_SCTX_DONE_DEV_REMOVE,
};
void rtw_sctx_init23a(struct submit_ctx *sctx, int timeout_ms);
int rtw_sctx_wait23a(struct submit_ctx *sctx);
void rtw23a_sctx_done_err(struct submit_ctx **sctx, int status);
void rtw_sctx_done23a(struct submit_ctx **sctx);
struct xmit_buf {
struct list_head list, list2;
struct rtw_adapter *padapter;
u8 *pallocated_buf;
u8 *pbuf;
void *priv_data;
u16 ext_tag; /* 0: Normal xmitbuf, 1: extension xmitbuf. */
u16 flags;
u32 alloc_sz;
u32 len;
struct submit_ctx *sctx;
u32 ff_hwaddr;
struct urb *pxmit_urb[8];
u8 bpending[8];
int last[8];
#if defined(DBG_XMIT_BUF) || defined(DBG_XMIT_BUF_EXT)
u8 no;
#endif
};
struct xmit_frame {
struct list_head list;
struct pkt_attrib attrib;
struct sk_buff *pkt;
int frame_tag;
struct rtw_adapter *padapter;
u8 *buf_addr;
struct xmit_buf *pxmitbuf;
s8 pkt_offset;
u8 ack_report;
u8 ext_tag; /* 0:data, 1:mgmt */
};
struct tx_servq {
struct list_head tx_pending;
struct rtw_queue sta_pending;
int qcnt;
};
struct sta_xmit_priv {
spinlock_t lock;
int option;
int apsd_setting; /* When bit mask is on, the associated edca
* queue supports APSD.
*/
struct tx_servq be_q; /* priority == 0,3 */
struct tx_servq bk_q; /* priority == 1,2 */
struct tx_servq vi_q; /* priority == 4,5 */
struct tx_servq vo_q; /* priority == 6,7 */
struct list_head legacy_dz;
struct list_head apsd;
u16 txseq_tid[16];
};
struct hw_txqueue {
volatile int head;
volatile int tail;
volatile int free_sz; /* in units of 64 bytes */
volatile int free_cmdsz;
volatile int txsz[8];
uint ff_hwaddr;
uint cmd_hwaddr;
int ac_tag;
};
struct agg_pkt_info {
u16 offset;
u16 pkt_len;
};
struct xmit_priv {
spinlock_t lock;
struct semaphore xmit_sema;
struct semaphore terminate_xmitthread_sema;
struct rtw_queue be_pending;
struct rtw_queue bk_pending;
struct rtw_queue vi_pending;
struct rtw_queue vo_pending;
struct rtw_queue bm_pending;
u8 *pallocated_frame_buf;
u8 *pxmit_frame_buf;
uint free_xmitframe_cnt;
struct rtw_queue free_xmit_queue;
u8 *xframe_ext_alloc_addr;
u8 *xframe_ext;
uint free_xframe_ext_cnt;
struct rtw_queue free_xframe_ext_queue;
uint frag_len;
struct rtw_adapter *adapter;
u8 vcs_setting;
u8 vcs;
u8 vcs_type;
u64 tx_bytes;
u64 tx_pkts;
u64 tx_drop;
u64 last_tx_bytes;
u64 last_tx_pkts;
struct hw_xmit *hwxmits;
u8 hwxmit_entry;
u8 wmm_para_seq[4];/* sequence for wmm ac parameter strength from
* large to small. it's value is 0->vo, 1->vi,
* 2->be, 3->bk.
*/
struct semaphore tx_retevt;/* all tx return event; */
u8 txirp_cnt;/* */
struct tasklet_struct xmit_tasklet;
/* per AC pending irp */
int beq_cnt;
int bkq_cnt;
int viq_cnt;
int voq_cnt;
struct rtw_queue free_xmitbuf_queue;
struct list_head xmitbuf_list; /* track buffers for cleanup */
struct rtw_queue pending_xmitbuf_queue;
uint free_xmitbuf_cnt;
struct rtw_queue free_xmit_extbuf_queue;
struct list_head xmitextbuf_list; /* track buffers for cleanup */
uint free_xmit_extbuf_cnt;
u16 nqos_ssn;
int ack_tx;
struct mutex ack_tx_mutex;
struct submit_ctx ack_tx_ops;
spinlock_t lock_sctx;
};
struct xmit_buf *rtw_alloc_xmitbuf23a_ext(struct xmit_priv *pxmitpriv);
s32 rtw_free_xmitbuf_ext23a(struct xmit_priv *pxmitpriv,
struct xmit_buf *pxmitbuf);
struct xmit_buf *rtw_alloc_xmitbuf23a(struct xmit_priv *pxmitpriv);
s32 rtw_free_xmitbuf23a(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
void rtw_count_tx_stats23a(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe, int sz);
void rtw_update_protection23a(struct rtw_adapter *padapter, u8 *ie, uint ie_len);
s32 rtw_make_wlanhdr23a(struct rtw_adapter *padapter, u8 *hdr,
struct pkt_attrib *pattrib);
s32 rtw_put_snap23a(u8 *data, u16 h_proto);
struct xmit_frame *rtw_alloc_xmitframe23a(struct xmit_priv *pxmitpriv);
struct xmit_frame *rtw_alloc_xmitframe23a_ext(struct xmit_priv *pxmitpriv);
struct xmit_frame *rtw_alloc_xmitframe23a_once(struct xmit_priv *pxmitpriv);
s32 rtw_free_xmitframe23a(struct xmit_priv *pxmitpriv,
struct xmit_frame *pxmitframe);
void rtw_free_xmitframe_queue23a(struct xmit_priv *pxmitpriv, struct rtw_queue *pframequeue);
struct tx_servq *rtw_get_sta_pending23a(struct rtw_adapter *padapter,
struct sta_info *psta, int up, u8 *ac);
s32 rtw_xmitframe_enqueue23a(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe);
struct xmit_frame *rtw_dequeue_xframe23a(struct xmit_priv *pxmitpriv,
struct hw_xmit *phwxmit_i, int entry);
s32 rtw_xmit23a_classifier(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe);
u32 rtw_calculate_wlan_pkt_size_by_attribue23a(struct pkt_attrib *pattrib);
#define rtw_wlan_pkt_size(f) rtw_calculate_wlan_pkt_size_by_attribue23a(&f->attrib)
s32 rtw_xmitframe_coalesce23a(struct rtw_adapter *padapter, struct sk_buff *pkt,
struct xmit_frame *pxmitframe);
s32 _rtw_init_hw_txqueue(struct hw_txqueue *phw_txqueue, u8 ac_tag);
void _rtw_init_sta_xmit_priv23a(struct sta_xmit_priv *psta_xmitpriv);
s32 rtw_txframes_pending23a(struct rtw_adapter *padapter);
s32 rtw_txframes_sta_ac_pending23a(struct rtw_adapter *padapter,
struct pkt_attrib *pattrib);
void rtw_init_hwxmits23a(struct hw_xmit *phwxmit, int entry);
s32 _rtw_init_xmit_priv23a(struct xmit_priv *pxmitpriv,
struct rtw_adapter *padapter);
void _rtw_free_xmit_priv23a(struct xmit_priv *pxmitpriv);
void rtw_alloc_hwxmits23a(struct rtw_adapter *padapter);
void rtw_free_hwxmits23a(struct rtw_adapter *padapter);
int rtw_xmit23a(struct rtw_adapter *padapter, struct sk_buff *pkt);
#if defined(CONFIG_8723AU_AP_MODE)
int xmitframe_enqueue_for_sleeping_sta23a(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe);
void stop_sta_xmit23a(struct rtw_adapter *padapter, struct sta_info *psta);
void wakeup_sta_to_xmit23a(struct rtw_adapter *padapter, struct sta_info *psta);
void xmit_delivery_enabled_frames23a(struct rtw_adapter *padapter,
struct sta_info *psta);
#endif
u8 qos_acm23a(u8 acm_mask, u8 priority);
u32 rtw_get_ff_hwaddr23a(struct xmit_frame *pxmitframe);
int rtw_ack_tx_wait23a(struct xmit_priv *pxmitpriv, u32 timeout_ms);
void rtw_ack_tx_done23a(struct xmit_priv *pxmitpriv, int status);
/* include after declaring struct xmit_buf, in order to avoid warning */
#include <xmit_osdep.h>
#endif /* _RTL871X_XMIT_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __STA_INFO_H_
#define __STA_INFO_H_
#include <osdep_service.h>
#include <drv_types.h>
#include <wifi.h>
#define IBSS_START_MAC_ID 2
#define NUM_STA 32
#define NUM_ACL 16
/* if mode ==0, then the sta is allowed once the addr is hit. */
/* if mode ==1, then the sta is rejected once the addr is non-hit. */
struct rtw_wlan_acl_node {
struct list_head list;
u8 addr[ETH_ALEN];
u8 valid;
};
/* mode=0, disable */
/* mode=1, accept unless in deny list */
/* mode=2, deny unless in accept list */
struct wlan_acl_pool {
int mode;
int num;
struct rtw_wlan_acl_node aclnode[NUM_ACL];
struct rtw_queue acl_node_q;
};
struct rssi_sta {
s32 UndecoratedSmoothedPWDB;
s32 UndecoratedSmoothedCCK;
s32 UndecoratedSmoothedOFDM;
u64 PacketMap;
u8 ValidBit;
};
struct stainfo_stats {
u64 rx_mgnt_pkts;
u64 rx_beacon_pkts;
u64 rx_probereq_pkts;
u64 rx_probersp_pkts;
u64 rx_probersp_bm_pkts;
u64 rx_probersp_uo_pkts;
u64 rx_ctrl_pkts;
u64 rx_data_pkts;
u64 last_rx_mgnt_pkts;
u64 last_rx_beacon_pkts;
u64 last_rx_probereq_pkts;
u64 last_rx_probersp_pkts;
u64 last_rx_probersp_bm_pkts;
u64 last_rx_probersp_uo_pkts;
u64 last_rx_ctrl_pkts;
u64 last_rx_data_pkts;
u64 rx_bytes;
u64 rx_drops;
u64 tx_pkts;
u64 tx_bytes;
u64 tx_drops;
};
struct sta_info {
spinlock_t lock;
struct list_head list; /* free_sta_queue */
struct list_head hash_list; /* sta_hash */
struct rtw_adapter *padapter;
struct sta_xmit_priv sta_xmitpriv;
struct sta_recv_priv sta_recvpriv;
struct rtw_queue sleep_q;
unsigned int sleepq_len;
uint state;
uint aid;
uint mac_id;
uint qos_option;
u8 hwaddr[ETH_ALEN];
uint ieee8021x_blocked; /* 0: allowed, 1:blocked */
uint dot118021XPrivacy; /* aes, tkip... */
union Keytype dot11tkiptxmickey;
union Keytype dot11tkiprxmickey;
union Keytype dot118021x_UncstKey;
union pn48 dot11txpn; /* PN48 used for Unicast xmit. */
union pn48 dot11rxpn; /* PN48 used for Unicast recv. */
u8 bssrateset[16];
u32 bssratelen;
s32 rssi;
s32 signal_quality;
u8 cts2self;
u8 rtsen;
u8 raid;
u8 init_rate;
u32 ra_mask;
u8 wireless_mode; /* NETWORK_TYPE */
struct stainfo_stats sta_stats;
/* for A-MPDU TX, ADDBA timeout check */
struct timer_list addba_retry_timer;
/* for A-MPDU Rx reordering buffer control */
struct recv_reorder_ctrl recvreorder_ctrl[16];
/* for A-MPDU Tx */
/* unsigned char ampdu_txen_bitmap; */
u16 BA_starting_seqctrl[16];
struct ht_priv htpriv;
/* Notes: */
/* STA_Mode: */
/* curr_network(mlme_priv/security_priv/qos/ht) + sta_info: (STA & AP) CAP/INFO */
/* scan_q: AP CAP/INFO */
/* AP_Mode: */
/* curr_network(mlme_priv/security_priv/qos/ht) : AP CAP/INFO */
/* sta_info: (AP & STA) CAP/INFO */
#ifdef CONFIG_8723AU_AP_MODE
struct list_head asoc_list;
struct list_head auth_list;
unsigned int expire_to;
unsigned int auth_seq;
unsigned int authalg;
unsigned char chg_txt[128];
u16 capability;
int flags;
int dot8021xalg;/* 0:disable, 1:psk, 2:802.1x */
int wpa_psk;/* 0:disable, bit(0): WPA, bit(1):WPA2 */
int wpa_group_cipher;
int wpa2_group_cipher;
int wpa_pairwise_cipher;
int wpa2_pairwise_cipher;
u8 bpairwise_key_installed;
u8 wpa_ie[32];
u8 nonerp_set;
u8 no_short_slot_time_set;
u8 no_short_preamble_set;
u8 no_ht_gf_set;
u8 no_ht_set;
u8 ht_20mhz_set;
unsigned int tx_ra_bitmap;
u8 qos_info;
u8 max_sp_len;
u8 uapsd_bk;/* BIT(0): Delivery enabled, BIT(1): Trigger enabled */
u8 uapsd_be;
u8 uapsd_vi;
u8 uapsd_vo;
u8 has_legacy_ac;
unsigned int sleepq_ac_len;
#ifdef CONFIG_8723AU_P2P
/* p2p priv data */
u8 is_p2p_device;
u8 p2p_status_code;
/* p2p client info */
u8 dev_addr[ETH_ALEN];
u8 dev_cap;
u16 config_methods;
u8 primary_dev_type[8];
u8 num_of_secdev_type;
u8 secdev_types_list[32];/* 32/8 == 4; */
u16 dev_name_len;
u8 dev_name[32];
#endif /* CONFIG_8723AU_P2P */
u8 keep_alive_trycnt;
#endif /* CONFIG_8723AU_AP_MODE */
u8 *passoc_req;
u32 assoc_req_len;
/* for DM */
struct rssi_sta rssi_stat;
/* */
/* ================ODM Relative Info======================= */
/* Please be care, dont declare too much structure here. It will cost memory * STA support num. */
/* */
/* */
/* 2011/10/20 MH Add for ODM STA info. */
/* */
/* Driver Write */
u8 bValid; /* record the sta status link or not? */
u8 IOTPeer; /* Enum value. HT_IOT_PEER_E */
u8 rssi_level; /* for Refresh RA mask */
/* ODM Write */
/* 1 PHY_STATUS_INFO */
u8 RSSI_Path[4]; /* */
u8 RSSI_Ave;
u8 RXEVM[4];
u8 RXSNR[4];
/* ODM Write */
/* 1 TX_INFO (may changed by IC) */
/* ================ODM Relative Info======================= */
/* */
/* To store the sequence number of received management frame */
u16 RxMgmtFrameSeqNum;
};
#define sta_rx_pkts(sta) \
(sta->sta_stats.rx_mgnt_pkts \
+ sta->sta_stats.rx_ctrl_pkts \
+ sta->sta_stats.rx_data_pkts)
#define sta_last_rx_pkts(sta) \
(sta->sta_stats.last_rx_mgnt_pkts \
+ sta->sta_stats.last_rx_ctrl_pkts \
+ sta->sta_stats.last_rx_data_pkts)
#define sta_rx_data_pkts(sta) \
(sta->sta_stats.rx_data_pkts)
#define sta_last_rx_data_pkts(sta) \
(sta->sta_stats.last_rx_data_pkts)
#define sta_rx_mgnt_pkts(sta) \
(sta->sta_stats.rx_mgnt_pkts)
#define sta_last_rx_mgnt_pkts(sta) \
(sta->sta_stats.last_rx_mgnt_pkts)
#define sta_rx_beacon_pkts(sta) \
(sta->sta_stats.rx_beacon_pkts)
#define sta_last_rx_beacon_pkts(sta) \
(sta->sta_stats.last_rx_beacon_pkts)
#define sta_rx_probereq_pkts(sta) \
(sta->sta_stats.rx_probereq_pkts)
#define sta_last_rx_probereq_pkts(sta) \
(sta->sta_stats.last_rx_probereq_pkts)
#define sta_rx_probersp_pkts(sta) \
(sta->sta_stats.rx_probersp_pkts)
#define sta_last_rx_probersp_pkts(sta) \
(sta->sta_stats.last_rx_probersp_pkts)
#define sta_rx_probersp_bm_pkts(sta) \
(sta->sta_stats.rx_probersp_bm_pkts)
#define sta_last_rx_probersp_bm_pkts(sta) \
(sta->sta_stats.last_rx_probersp_bm_pkts)
#define sta_rx_probersp_uo_pkts(sta) \
(sta->sta_stats.rx_probersp_uo_pkts)
#define sta_last_rx_probersp_uo_pkts(sta) \
(sta->sta_stats.last_rx_probersp_uo_pkts)
#define sta_update_last_rx_pkts(sta) \
do { \
sta->sta_stats.last_rx_mgnt_pkts = sta->sta_stats.rx_mgnt_pkts; \
sta->sta_stats.last_rx_beacon_pkts = sta->sta_stats.rx_beacon_pkts; \
sta->sta_stats.last_rx_probereq_pkts = sta->sta_stats.rx_probereq_pkts; \
sta->sta_stats.last_rx_probersp_pkts = sta->sta_stats.rx_probersp_pkts; \
sta->sta_stats.last_rx_probersp_bm_pkts = sta->sta_stats.rx_probersp_bm_pkts; \
sta->sta_stats.last_rx_probersp_uo_pkts = sta->sta_stats.rx_probersp_uo_pkts; \
sta->sta_stats.last_rx_ctrl_pkts = sta->sta_stats.rx_ctrl_pkts; \
sta->sta_stats.last_rx_data_pkts = sta->sta_stats.rx_data_pkts; \
} while (0)
#define STA_RX_PKTS_ARG(sta) \
sta->sta_stats.rx_mgnt_pkts \
, sta->sta_stats.rx_ctrl_pkts \
, sta->sta_stats.rx_data_pkts
#define STA_LAST_RX_PKTS_ARG(sta) \
sta->sta_stats.last_rx_mgnt_pkts, \
sta->sta_stats.last_rx_ctrl_pkts, \
sta->sta_stats.last_rx_data_pkts
#define STA_RX_PKTS_DIFF_ARG(sta) \
sta->sta_stats.rx_mgnt_pkts - sta->sta_stats.last_rx_mgnt_pkts, \
sta->sta_stats.rx_ctrl_pkts - sta->sta_stats.last_rx_ctrl_pkts, \
sta->sta_stats.rx_data_pkts - sta->sta_stats.last_rx_data_pkts
#define STA_PKTS_FMT "(m:%llu, c:%llu, d:%llu)"
struct sta_priv {
u8 *pallocated_stainfo_buf;
u8 *pstainfo_buf;
struct rtw_queue free_sta_queue;
spinlock_t sta_hash_lock;
struct list_head sta_hash[NUM_STA];
int asoc_sta_count;
struct rtw_queue sleep_q;
struct rtw_queue wakeup_q;
struct rtw_adapter *padapter;
#ifdef CONFIG_8723AU_AP_MODE
struct list_head asoc_list;
struct list_head auth_list;
spinlock_t asoc_list_lock;
spinlock_t auth_list_lock;
u8 asoc_list_cnt;
u8 auth_list_cnt;
unsigned int auth_to; /* sec, time to expire in authenticating. */
unsigned int assoc_to; /* sec, time to expire before associating. */
unsigned int expire_to; /* sec , time to expire after associated. */
/* pointers to STA info; based on allocated AID or NULL if AID free
* AID is in the range 1-2007, so sta_aid[0] corresponders to AID 1
* and so on
*/
struct sta_info *sta_aid[NUM_STA];
u16 sta_dz_bitmap;/* only support 15 stations, staion aid bitmap
* for sleeping sta. */
u16 tim_bitmap;/* only support 15 stations,
* aid=0~15 mapping bit0~bit15 */
u16 max_num_sta;
struct wlan_acl_pool acl_list;
#endif
};
static inline u32 wifi_mac_hash(u8 *mac)
{
u32 x;
x = mac[0];
x = (x << 2) ^ mac[1];
x = (x << 2) ^ mac[2];
x = (x << 2) ^ mac[3];
x = (x << 2) ^ mac[4];
x = (x << 2) ^ mac[5];
x ^= x >> 8;
x = x & (NUM_STA - 1);
return x;
}
u32 _rtw_init_sta_priv23a(struct sta_priv *pstapriv);
u32 _rtw_free_sta_priv23a(struct sta_priv *pstapriv);
#define stainfo_offset_valid(offset) (offset < NUM_STA && offset >= 0)
int rtw_stainfo_offset23a(struct sta_priv *stapriv, struct sta_info *sta);
struct sta_info *rtw_get_stainfo23a_by_offset23a(struct sta_priv *stapriv,
int offset);
struct sta_info *rtw_alloc_stainfo23a(struct sta_priv *pstapriv, u8 *hwaddr);
u32 rtw_free_stainfo23a(struct rtw_adapter *padapter, struct sta_info *psta);
void rtw_free_all_stainfo23a(struct rtw_adapter *padapter);
struct sta_info *rtw_get_stainfo23a(struct sta_priv *pstapriv, u8 *hwaddr);
u32 rtw_init_bcmc_stainfo23a(struct rtw_adapter *padapter);
struct sta_info *rtw_get_bcmc_stainfo23a(struct rtw_adapter *padapter);
u8 rtw_access_ctrl23a(struct rtw_adapter *padapter, u8 *mac_addr);
#endif /* _STA_INFO_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __USB_HAL_H__
#define __USB_HAL_H__
int rtl8723au_set_hal_ops(struct rtw_adapter *padapter);
#endif /* __USB_HAL_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __USB_OPS_H_
#define __USB_OPS_H_
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#include <usb_ops_linux.h>
#define REALTEK_USB_VENQT_READ 0xC0
#define REALTEK_USB_VENQT_WRITE 0x40
#define REALTEK_USB_VENQT_CMD_REQ 0x05
#define REALTEK_USB_VENQT_CMD_IDX 0x00
enum {
VENDOR_WRITE = 0x00,
VENDOR_READ = 0x01,
};
#define ALIGNMENT_UNIT 16
#define MAX_VENDOR_REQ_CMD_SIZE 254 /* 8188cu SIE Support */
#define MAX_USB_IO_CTL_SIZE (MAX_VENDOR_REQ_CMD_SIZE +ALIGNMENT_UNIT)
#define rtw_usb_control_msg(dev, pipe, request, requesttype, value, \
index, data, size, timeout_ms) \
usb_control_msg((dev), (pipe), (request), (requesttype), \
(value), (index), (data), (size), (timeout_ms))
#define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \
usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), \
(timeout_ms))
void rtl8723au_set_hw_type(struct rtw_adapter *padapter);
#define hal_set_hw_type rtl8723au_set_hw_type
void rtl8723au_set_intf_ops(struct _io_ops *pops);
#define usb_set_intf_ops rtl8723au_set_intf_ops
void rtl8723au_recv_tasklet(void *priv);
void rtl8723au_xmit_tasklet(void *priv);
/* Increase and check if the continual_urb_error of this @param dvobjprive is
* larger than MAX_CONTINUAL_URB_ERR. Return result
*/
static inline int rtw_inc_and_chk_continual_urb_error(struct dvobj_priv *dvobj)
{
int ret = false;
int value;
value = atomic_inc_return(&dvobj->continual_urb_error);
if (value > MAX_CONTINUAL_URB_ERR) {
DBG_8723A("[dvobj:%p][ERROR] continual_urb_error:%d > %d\n",
dvobj, value, MAX_CONTINUAL_URB_ERR);
ret = true;
}
return ret;
}
/* Set the continual_urb_error of this @param dvobjprive to 0 */
static inline void rtw_reset_continual_urb_error(struct dvobj_priv *dvobj)
{
atomic_set(&dvobj->continual_urb_error, 0);
}
#define USB_HIGH_SPEED_BULK_SIZE 512
#define USB_FULL_SPEED_BULK_SIZE 64
static inline u8 rtw_usb_bulk_size_boundary(struct rtw_adapter *padapter,
int buf_len)
{
u8 rst = true;
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
if (pdvobjpriv->ishighspeed)
rst = (0 == (buf_len) % USB_HIGH_SPEED_BULK_SIZE) ?
true : false;
else
rst = (0 == (buf_len) % USB_FULL_SPEED_BULK_SIZE) ?
true : false;
return rst;
}
#endif /* __USB_OPS_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __USB_OPS_LINUX_H__
#define __USB_OPS_LINUX_H__
#define VENDOR_CMD_MAX_DATA_LEN 254
#define RTW_USB_CONTROL_MSG_TIMEOUT_TEST 10/* ms */
#define RTW_USB_CONTROL_MSG_TIMEOUT 500/* ms */
#define MAX_USBCTRL_VENDORREQ_TIMES 10
#define RTW_USB_BULKOUT_TIMEOUT 5000/* ms */
#define _usbctrl_vendorreq_async_callback(urb, regs) \
_usbctrl_vendorreq_async_callback(urb)
#define usb_write_mem23a_complete(purb, regs) usb_write_mem23a_complete(purb)
#define usb_write_port23a_complete(purb, regs) usb_write_port23a_complete(purb)
#define usb_read_port_complete(purb, regs) usb_read_port_complete(purb)
#define usb_read_interrupt_complete(purb, regs) \
usb_read_interrupt_complete(purb)
unsigned int ffaddr2pipehdl23a(struct dvobj_priv *pdvobj, u32 addr);
void usb_read_mem23a(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem);
void usb_write_mem23a(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem);
void usb_read_port_cancel23a(struct intf_hdl *pintfhdl);
u32 usb_write_port23a(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
struct xmit_buf *wmem);
void usb_write_port23a_cancel(struct intf_hdl *pintfhdl);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __USB_OSINTF_H
#define __USB_OSINTF_H
#include <osdep_service.h>
#include <drv_types.h>
#include <usb_vendor_req.h>
#define USBD_HALTED(_status) ((u32)(_status) >> 30 == 3)
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _USB_VENDOR_REQUEST_H_
#define _USB_VENDOR_REQUEST_H_
/* 4 Set/Get Register related wIndex/Data */
#define RT_USB_RESET_MASK_OFF 0
#define RT_USB_RESET_MASK_ON 1
#define RT_USB_SLEEP_MASK_OFF 0
#define RT_USB_SLEEP_MASK_ON 1
#define RT_USB_LDO_ON 1
#define RT_USB_LDO_OFF 0
/* 4 Set/Get SYSCLK related wValue or Data */
#define RT_USB_SYSCLK_32KHZ 0
#define RT_USB_SYSCLK_40MHZ 1
#define RT_USB_SYSCLK_60MHZ 2
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef _WIFI_H_
#define _WIFI_H_
#define P80211CAPTURE_VERSION 0x80211001
/* This value is tested by WiFi 11n Test Plan 5.2.3.
* This test verifies the WLAN NIC can update the NAV through sending
* the CTS with large duration.
*/
#define WiFiNavUpperUs 30000 /* 30 ms */
enum WIFI_FRAME_TYPE {
WIFI_MGT_TYPE = (0),
WIFI_CTRL_TYPE = (BIT(2)),
WIFI_DATA_TYPE = (BIT(3)),
WIFI_QOS_DATA_TYPE = (BIT(7)|BIT(3)), /* QoS Data */
};
enum WIFI_FRAME_SUBTYPE {
/* below is for mgt frame */
WIFI_ASSOCREQ = (0 | WIFI_MGT_TYPE),
WIFI_ASSOCRSP = (BIT(4) | WIFI_MGT_TYPE),
WIFI_REASSOCREQ = (BIT(5) | WIFI_MGT_TYPE),
WIFI_REASSOCRSP = (BIT(5) | BIT(4) | WIFI_MGT_TYPE),
WIFI_PROBEREQ = (BIT(6) | WIFI_MGT_TYPE),
WIFI_PROBERSP = (BIT(6) | BIT(4) | WIFI_MGT_TYPE),
WIFI_BEACON = (BIT(7) | WIFI_MGT_TYPE),
WIFI_ATIM = (BIT(7) | BIT(4) | WIFI_MGT_TYPE),
WIFI_DISASSOC = (BIT(7) | BIT(5) | WIFI_MGT_TYPE),
WIFI_AUTH = (BIT(7) | BIT(5) | BIT(4) | WIFI_MGT_TYPE),
WIFI_DEAUTH = (BIT(7) | BIT(6) | WIFI_MGT_TYPE),
WIFI_ACTION = (BIT(7) | BIT(6) | BIT(4) | WIFI_MGT_TYPE),
/* below is for control frame */
WIFI_PSPOLL = (BIT(7) | BIT(5) | WIFI_CTRL_TYPE),
WIFI_RTS = (BIT(7) | BIT(5) | BIT(4) | WIFI_CTRL_TYPE),
WIFI_CTS = (BIT(7) | BIT(6) | WIFI_CTRL_TYPE),
WIFI_ACK = (BIT(7) | BIT(6) | BIT(4) | WIFI_CTRL_TYPE),
WIFI_CFEND = (BIT(7) | BIT(6) | BIT(5) | WIFI_CTRL_TYPE),
WIFI_CFEND_CFACK = (BIT(7) | BIT(6) | BIT(5) | BIT(4) | WIFI_CTRL_TYPE),
/* below is for data frame */
WIFI_DATA = (0 | WIFI_DATA_TYPE),
WIFI_DATA_CFACK = (BIT(4) | WIFI_DATA_TYPE),
WIFI_DATA_CFPOLL = (BIT(5) | WIFI_DATA_TYPE),
WIFI_DATA_CFACKPOLL = (BIT(5) | BIT(4) | WIFI_DATA_TYPE),
WIFI_DATA_NULL = (BIT(6) | WIFI_DATA_TYPE),
WIFI_CF_ACK = (BIT(6) | BIT(4) | WIFI_DATA_TYPE),
WIFI_CF_POLL = (BIT(6) | BIT(5) | WIFI_DATA_TYPE),
WIFI_CF_ACKPOLL = (BIT(6) | BIT(5) | BIT(4) | WIFI_DATA_TYPE),
WIFI_QOS_DATA_NULL = (BIT(6) | WIFI_QOS_DATA_TYPE),
};
enum WIFI_REG_DOMAIN {
DOMAIN_FCC = 1,
DOMAIN_IC = 2,
DOMAIN_ETSI = 3,
DOMAIN_SPAIN = 4,
DOMAIN_FRANCE = 5,
DOMAIN_MKK = 6,
DOMAIN_ISRAEL = 7,
DOMAIN_MKK1 = 8,
DOMAIN_MKK2 = 9,
DOMAIN_MKK3 = 10,
DOMAIN_MAX
};
#define SetToDs(pbuf) \
(*(unsigned short *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_TODS))
#define SetFrDs(pbuf) \
(*(unsigned short *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_FROMDS))
#define get_tofr_ds(pframe) ((ieee80211_has_tods(pframe) << 1) | \
ieee80211_has_fromds(pframe))
#define SetMFrag(pbuf) \
(*(unsigned short *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_MOREFRAGS))
#define ClearMFrag(pbuf) \
(*(unsigned short *)(pbuf) &= (~cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)))
#define SetRetry(pbuf) \
(*(unsigned short *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_RETRY))
#define SetPwrMgt(pbuf) \
(*(unsigned short *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_PM))
#define SetMData(pbuf) \
(*(unsigned short *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_MOREDATA))
#define SetPrivacy(pbuf) \
(*(unsigned short *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_PROTECTED))
#define SetFrameType(pbuf, type) \
do { \
*(unsigned short *)(pbuf) &= __constant_cpu_to_le16(~(BIT(3) | BIT(2))); \
*(unsigned short *)(pbuf) |= __constant_cpu_to_le16(type); \
} while (0)
#define SetFrameSubType(pbuf, type) \
do { \
*(unsigned short *)(pbuf) &= cpu_to_le16(~(BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))); \
*(unsigned short *)(pbuf) |= cpu_to_le16(type); \
} while (0)
#define GetTupleCache(pbuf) (cpu_to_le16(*(unsigned short *)((unsigned long)(pbuf) + 22)))
#define SetFragNum(pbuf, num) \
do { \
*(unsigned short *)((unsigned long)(pbuf) + 22) = \
((*(unsigned short *)((unsigned long)(pbuf) + 22)) & le16_to_cpu(~(0x000f))) | \
cpu_to_le16(0x0f & (num)); \
} while (0)
#define SetSeqNum(pbuf, num) \
do { \
*(unsigned short *)((unsigned long)(pbuf) + 22) = \
((*(unsigned short *)((unsigned long)(pbuf) + 22)) & le16_to_cpu((unsigned short)0x000f)) | \
le16_to_cpu((unsigned short)(0xfff0 & (num << 4))); \
} while (0)
#define SetDuration(pbuf, dur) \
(*(unsigned short *)((unsigned long)(pbuf) + 2) = \
cpu_to_le16(0xffff & (dur)))
#define SetPriority(pbuf, tid) \
(*(unsigned short *)(pbuf) |= cpu_to_le16(tid & 0xf))
#define SetEOSP(pbuf, eosp) \
(*(unsigned short *)(pbuf) |= cpu_to_le16((eosp & 1) << 4))
#define SetAckpolicy(pbuf, ack) \
(*(unsigned short *)(pbuf) |= cpu_to_le16((ack & 3) << 5))
#define SetAMsdu(pbuf, amsdu) \
(*(unsigned short *)(pbuf) |= cpu_to_le16((amsdu & 1) << 7))
#define GetAid(pbuf) \
(cpu_to_le16(*(unsigned short *)((unsigned long)(pbuf) + 2)) & \
0x3fff)
#define GetTid(pbuf) \
(cpu_to_le16(*(unsigned short *)((unsigned long)(pbuf) + \
(((ieee80211_has_tods(pbuf)<<1) | \
ieee80211_has_fromds(pbuf)) == 3 ? 30 : 24))) & 0x000f)
static inline unsigned char *get_hdr_bssid(unsigned char *pframe)
{
unsigned char *sa;
unsigned int to_fr_ds;
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) pframe;
to_fr_ds = (ieee80211_has_tods(hdr->frame_control) << 1) |
ieee80211_has_fromds(hdr->frame_control);
switch (to_fr_ds) {
case 0x00: /* ToDs=0, FromDs=0 */
sa = hdr->addr3;
break;
case 0x01: /* ToDs=0, FromDs=1 */
sa = hdr->addr2;
break;
case 0x02: /* ToDs=1, FromDs=0 */
sa = hdr->addr1;
break;
case 0x03: /* ToDs=1, FromDs=1 */
sa = hdr->addr1;
break;
default:
sa = NULL; /* */
break;
}
return sa;
}
/*-----------------------------------------------------------------------------
Below is for the security related definition
------------------------------------------------------------------------------*/
#define _RESERVED_FRAME_TYPE_ 0
#define _SKB_FRAME_TYPE_ 2
#define _PRE_ALLOCMEM_ 1
#define _PRE_ALLOCHDR_ 3
#define _PRE_ALLOCLLCHDR_ 4
#define _PRE_ALLOCICVHDR_ 5
#define _PRE_ALLOCMICHDR_ 6
#define _SIFSTIME_ \
((priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) ? 16 : 10)
#define _ACKCTSLNG_ 14 /* 14 bytes long, including crclng */
#define _CRCLNG_ 4
#define _ASOCREQ_IE_OFFSET_ 4 /* excluding wlan_hdr */
#define _ASOCRSP_IE_OFFSET_ 6
#define _REASOCREQ_IE_OFFSET_ 10
#define _REASOCRSP_IE_OFFSET_ 6
#define _PROBEREQ_IE_OFFSET_ 0
#define _PROBERSP_IE_OFFSET_ 12
#define _AUTH_IE_OFFSET_ 6
#define _DEAUTH_IE_OFFSET_ 0
#define _BEACON_IE_OFFSET_ 12
#define _PUBLIC_ACTION_IE_OFFSET_ 8
#define _FIXED_IE_LENGTH_ _BEACON_IE_OFFSET_
#define _SSID_IE_ 0
#define _SUPPORTEDRATES_IE_ 1
#define _DSSET_IE_ 3
#define _TIM_IE_ 5
#define _IBSS_PARA_IE_ 6
#define _COUNTRY_IE_ 7
#define _CHLGETXT_IE_ 16
#define _SUPPORTED_CH_IE_ 36
#define _CH_SWTICH_ANNOUNCE_ 37 /* Secondary Channel Offset */
#define _RSN_IE_2_ 48
#define _SSN_IE_1_ 221
#define _ERPINFO_IE_ 42
#define _EXT_SUPPORTEDRATES_IE_ 50
#define _HT_CAPABILITY_IE_ 45
#define _FTIE_ 55
#define _TIMEOUT_ITVL_IE_ 56
#define _SRC_IE_ 59
#define _HT_EXTRA_INFO_IE_ 61
#define _HT_ADD_INFO_IE_ 61 /* _HT_EXTRA_INFO_IE_ */
#define EID_BSSCoexistence 72 /* 20/40 BSS Coexistence */
#define EID_BSSIntolerantChlReport 73
#define _RIC_Descriptor_IE_ 75
#define _LINK_ID_IE_ 101
#define _CH_SWITCH_TIMING_ 104
#define _PTI_BUFFER_STATUS_ 106
#define _EXT_CAP_IE_ 127
#define _VENDOR_SPECIFIC_IE_ 221
#define _RESERVED47_ 47
/* ---------------------------------------------------------------------------
Below is the fixed elements...
-----------------------------------------------------------------------------*/
#define _AUTH_ALGM_NUM_ 2
#define _AUTH_SEQ_NUM_ 2
#define _BEACON_ITERVAL_ 2
#define _CAPABILITY_ 2
#define _CURRENT_APADDR_ 6
#define _LISTEN_INTERVAL_ 2
#define _ASOC_ID_ 2
#define _STATUS_CODE_ 2
#define _TIMESTAMP_ 8
#define AUTH_ODD_TO 0
#define AUTH_EVEN_TO 1
#define WLAN_ETHCONV_ENCAP 1
#define WLAN_ETHCONV_RFC1042 2
#define WLAN_ETHCONV_8021h 3
#define cap_ESS BIT(0)
#define cap_IBSS BIT(1)
#define cap_CFPollable BIT(2)
#define cap_CFRequest BIT(3)
#define cap_Privacy BIT(4)
#define cap_ShortPremble BIT(5)
#define cap_PBCC BIT(6)
#define cap_ChAgility BIT(7)
#define cap_SpecMgmt BIT(8)
#define cap_QoS BIT(9)
#define cap_ShortSlot BIT(10)
/*-----------------------------------------------------------------------------
Below is the definition for 802.11i / 802.1x
------------------------------------------------------------------------------*/
#define _IEEE8021X_MGT_ 1 /* WPA */
#define _IEEE8021X_PSK_ 2 /* WPA with pre-shared key */
/*
#define _NO_PRIVACY_ 0
#define _WEP_40_PRIVACY_ 1
#define _TKIP_PRIVACY_ 2
#define _WRAP_PRIVACY_ 3
#define _CCMP_PRIVACY_ 4
#define _WEP_104_PRIVACY_ 5
#define _WEP_WPA_MIXED_PRIVACY_ 6 WEP + WPA
*/
/*-----------------------------------------------------------------------------
Below is the definition for WMM
------------------------------------------------------------------------------*/
#define _WMM_IE_Length_ 7 /* for WMM STA */
#define _WMM_Para_Element_Length_ 24
/*-----------------------------------------------------------------------------
Below is the definition for 802.11n
------------------------------------------------------------------------------*/
#define SetOrderBit(pbuf) \
(*(unsigned short *)(pbuf) |= cpu_to_le16(_ORDER_))
#define GetOrderBit(pbuf) \
(((*(unsigned short *)(pbuf)) & le16_to_cpu(_ORDER_)) != 0)
/* struct rtw_ieee80211_ht_cap - HT additional information
*
* This structure refers to "HT information element" as
* described in 802.11n draft section 7.3.2.53
*/
struct ieee80211_ht_addt_info {
unsigned char control_chan;
unsigned char ht_param;
unsigned short operation_mode;
unsigned short stbc_param;
unsigned char basic_set[16];
} __packed;
struct HT_caps_element {
union {
struct {
unsigned short HT_caps_info;
unsigned char AMPDU_para;
unsigned char MCS_rate[16];
unsigned short HT_ext_caps;
unsigned int Beamforming_caps;
unsigned char ASEL_caps;
} HT_cap_element;
unsigned char HT_cap[26];
} u;
} __packed;
struct HT_info_element {
unsigned char primary_channel;
unsigned char infos[5];
unsigned char MCS_rate[16];
} __packed;
struct AC_param {
unsigned char ACI_AIFSN;
unsigned char CW;
unsigned short TXOP_limit;
} __packed;
struct WMM_para_element {
unsigned char QoS_info;
unsigned char reserved;
struct AC_param ac_param[4];
} __packed;
struct ADDBA_request {
unsigned char dialog_token;
unsigned short BA_para_set;
unsigned short BA_timeout_value;
unsigned short BA_starting_seqctrl;
} __packed;
#define OP_MODE_PURE 0
#define OP_MODE_MAY_BE_LEGACY_STAS 1
#define OP_MODE_20MHZ_HT_STA_ASSOCED 2
#define OP_MODE_MIXED 3
#define HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK ((u8) BIT(0) | BIT(1))
#define HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE ((u8) BIT(0))
#define HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW ((u8) BIT(0) | BIT(1))
#define HT_INFO_HT_PARAM_REC_TRANS_CHNL_WIDTH ((u8) BIT(2))
#define HT_INFO_HT_PARAM_RIFS_MODE ((u8) BIT(3))
#define HT_INFO_HT_PARAM_CTRL_ACCESS_ONLY ((u8) BIT(4))
#define HT_INFO_HT_PARAM_SRV_INTERVAL_GRANULARITY ((u8) BIT(5))
#define HT_INFO_OPERATION_MODE_OP_MODE_MASK \
((u16) (0x0001 | 0x0002))
#define HT_INFO_OPERATION_MODE_OP_MODE_OFFSET 0
#define HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT ((u8) BIT(2))
#define HT_INFO_OPERATION_MODE_TRANSMIT_BURST_LIMIT ((u8) BIT(3))
#define HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT ((u8) BIT(4))
#define HT_INFO_STBC_PARAM_DUAL_BEACON ((u16) BIT(6))
#define HT_INFO_STBC_PARAM_DUAL_STBC_PROTECT ((u16) BIT(7))
#define HT_INFO_STBC_PARAM_SECONDARY_BCN ((u16) BIT(8))
#define HT_INFO_STBC_PARAM_LSIG_TXOP_PROTECT_ALLOWED ((u16) BIT(9))
#define HT_INFO_STBC_PARAM_PCO_ACTIVE ((u16) BIT(10))
#define HT_INFO_STBC_PARAM_PCO_PHASE ((u16) BIT(11))
/* ===============WPS Section=============== */
/* For WPSv1.0 */
#define WPSOUI 0x0050f204
/* WPS attribute ID */
#define WPS_ATTR_VER1 0x104A
#define WPS_ATTR_SIMPLE_CONF_STATE 0x1044
#define WPS_ATTR_RESP_TYPE 0x103B
#define WPS_ATTR_UUID_E 0x1047
#define WPS_ATTR_MANUFACTURER 0x1021
#define WPS_ATTR_MODEL_NAME 0x1023
#define WPS_ATTR_MODEL_NUMBER 0x1024
#define WPS_ATTR_SERIAL_NUMBER 0x1042
#define WPS_ATTR_PRIMARY_DEV_TYPE 0x1054
#define WPS_ATTR_SEC_DEV_TYPE_LIST 0x1055
#define WPS_ATTR_DEVICE_NAME 0x1011
#define WPS_ATTR_CONF_METHOD 0x1008
#define WPS_ATTR_RF_BANDS 0x103C
#define WPS_ATTR_DEVICE_PWID 0x1012
#define WPS_ATTR_REQUEST_TYPE 0x103A
#define WPS_ATTR_ASSOCIATION_STATE 0x1002
#define WPS_ATTR_CONFIG_ERROR 0x1009
#define WPS_ATTR_VENDOR_EXT 0x1049
#define WPS_ATTR_SELECTED_REGISTRAR 0x1041
/* Value of WPS attribute "WPS_ATTR_DEVICE_NAME */
#define WPS_MAX_DEVICE_NAME_LEN 32
/* Value of WPS Request Type Attribute */
#define WPS_REQ_TYPE_ENROLLEE_INFO_ONLY 0x00
#define WPS_REQ_TYPE_ENROLLEE_OPEN_8021X 0x01
#define WPS_REQ_TYPE_REGISTRAR 0x02
#define WPS_REQ_TYPE_WLAN_MANAGER_REGISTRAR 0x03
/* Value of WPS Response Type Attribute */
#define WPS_RESPONSE_TYPE_INFO_ONLY 0x00
#define WPS_RESPONSE_TYPE_8021X 0x01
#define WPS_RESPONSE_TYPE_REGISTRAR 0x02
#define WPS_RESPONSE_TYPE_AP 0x03
/* Value of WPS WiFi Simple Configuration State Attribute */
#define WPS_WSC_STATE_NOT_CONFIG 0x01
#define WPS_WSC_STATE_CONFIG 0x02
/* Value of WPS Version Attribute */
#define WPS_VERSION_1 0x10
/* Value of WPS Configuration Method Attribute */
#define WPS_CONFIG_METHOD_FLASH 0x0001
#define WPS_CONFIG_METHOD_ETHERNET 0x0002
#define WPS_CONFIG_METHOD_LABEL 0x0004
#define WPS_CONFIG_METHOD_DISPLAY 0x0008
#define WPS_CONFIG_METHOD_E_NFC 0x0010
#define WPS_CONFIG_METHOD_I_NFC 0x0020
#define WPS_CONFIG_METHOD_NFC 0x0040
#define WPS_CONFIG_METHOD_PBC 0x0080
#define WPS_CONFIG_METHOD_KEYPAD 0x0100
#define WPS_CONFIG_METHOD_VPBC 0x0280
#define WPS_CONFIG_METHOD_PPBC 0x0480
#define WPS_CONFIG_METHOD_VDISPLAY 0x2008
#define WPS_CONFIG_METHOD_PDISPLAY 0x4008
/* Value of Category ID of WPS Primary Device Type Attribute */
#define WPS_PDT_CID_DISPLAYS 0x0007
#define WPS_PDT_CID_MULIT_MEDIA 0x0008
#define WPS_PDT_CID_RTK_WIDI WPS_PDT_CID_MULIT_MEDIA
/* Value of Sub Category ID of WPS Primary Device Type Attribute */
#define WPS_PDT_SCID_MEDIA_SERVER 0x0005
#define WPS_PDT_SCID_RTK_DMP WPS_PDT_SCID_MEDIA_SERVER
/* Value of Device Password ID */
#define WPS_DPID_PIN 0x0000
#define WPS_DPID_USER_SPEC 0x0001
#define WPS_DPID_MACHINE_SPEC 0x0002
#define WPS_DPID_REKEY 0x0003
#define WPS_DPID_PBC 0x0004
#define WPS_DPID_REGISTRAR_SPEC 0x0005
/* Value of WPS RF Bands Attribute */
#define WPS_RF_BANDS_2_4_GHZ 0x01
#define WPS_RF_BANDS_5_GHZ 0x02
/* Value of WPS Association State Attribute */
#define WPS_ASSOC_STATE_NOT_ASSOCIATED 0x00
#define WPS_ASSOC_STATE_CONNECTION_SUCCESS 0x01
#define WPS_ASSOC_STATE_CONFIGURATION_FAILURE 0x02
#define WPS_ASSOC_STATE_ASSOCIATION_FAILURE 0x03
#define WPS_ASSOC_STATE_IP_FAILURE 0x04
/* =====================P2P Section===================== */
/* For P2P */
#define P2POUI 0x506F9A09
/* P2P Attribute ID */
#define P2P_ATTR_STATUS 0x00
#define P2P_ATTR_MINOR_REASON_CODE 0x01
#define P2P_ATTR_CAPABILITY 0x02
#define P2P_ATTR_DEVICE_ID 0x03
#define P2P_ATTR_GO_INTENT 0x04
#define P2P_ATTR_CONF_TIMEOUT 0x05
#define P2P_ATTR_LISTEN_CH 0x06
#define P2P_ATTR_GROUP_BSSID 0x07
#define P2P_ATTR_EX_LISTEN_TIMING 0x08
#define P2P_ATTR_INTENTED_IF_ADDR 0x09
#define P2P_ATTR_MANAGEABILITY 0x0A
#define P2P_ATTR_CH_LIST 0x0B
#define P2P_ATTR_NOA 0x0C
#define P2P_ATTR_DEVICE_INFO 0x0D
#define P2P_ATTR_GROUP_INFO 0x0E
#define P2P_ATTR_GROUP_ID 0x0F
#define P2P_ATTR_INTERFACE 0x10
#define P2P_ATTR_OPERATING_CH 0x11
#define P2P_ATTR_INVITATION_FLAGS 0x12
/* Value of Status Attribute */
#define P2P_STATUS_SUCCESS 0x00
#define P2P_STATUS_FAIL_INFO_UNAVAILABLE 0x01
#define P2P_STATUS_FAIL_INCOMPATIBLE_PARAM 0x02
#define P2P_STATUS_FAIL_LIMIT_REACHED 0x03
#define P2P_STATUS_FAIL_INVALID_PARAM 0x04
#define P2P_STATUS_FAIL_REQUEST_UNABLE 0x05
#define P2P_STATUS_FAIL_PREVOUS_PROTO_ERR 0x06
#define P2P_STATUS_FAIL_NO_COMMON_CH 0x07
#define P2P_STATUS_FAIL_UNKNOWN_P2PGROUP 0x08
#define P2P_STATUS_FAIL_BOTH_GOINTENT_15 0x09
#define P2P_STATUS_FAIL_INCOMPATIBLE_PROVSION 0x0A
#define P2P_STATUS_FAIL_USER_REJECT 0x0B
/* Value of Inviation Flags Attribute */
#define P2P_INVITATION_FLAGS_PERSISTENT BIT(0)
#define DMP_P2P_DEVCAP_SUPPORT (P2P_DEVCAP_SERVICE_DISCOVERY | \
P2P_DEVCAP_CLIENT_DISCOVERABILITY | \
P2P_DEVCAP_CONCURRENT_OPERATION | \
P2P_DEVCAP_INVITATION_PROC)
#define DMP_P2P_GRPCAP_SUPPORT (P2P_GRPCAP_INTRABSS)
/* Value of Device Capability Bitmap */
#define P2P_DEVCAP_SERVICE_DISCOVERY BIT(0)
#define P2P_DEVCAP_CLIENT_DISCOVERABILITY BIT(1)
#define P2P_DEVCAP_CONCURRENT_OPERATION BIT(2)
#define P2P_DEVCAP_INFRA_MANAGED BIT(3)
#define P2P_DEVCAP_DEVICE_LIMIT BIT(4)
#define P2P_DEVCAP_INVITATION_PROC BIT(5)
/* Value of Group Capability Bitmap */
#define P2P_GRPCAP_GO BIT(0)
#define P2P_GRPCAP_PERSISTENT_GROUP BIT(1)
#define P2P_GRPCAP_GROUP_LIMIT BIT(2)
#define P2P_GRPCAP_INTRABSS BIT(3)
#define P2P_GRPCAP_CROSS_CONN BIT(4)
#define P2P_GRPCAP_PERSISTENT_RECONN BIT(5)
#define P2P_GRPCAP_GROUP_FORMATION BIT(6)
/* P2P Public Action Frame ( Management Frame ) */
#define P2P_PUB_ACTION_ACTION 0x09
/* P2P Public Action Frame Type */
#define P2P_GO_NEGO_REQ 0
#define P2P_GO_NEGO_RESP 1
#define P2P_GO_NEGO_CONF 2
#define P2P_INVIT_REQ 3
#define P2P_INVIT_RESP 4
#define P2P_DEVDISC_REQ 5
#define P2P_DEVDISC_RESP 6
#define P2P_PROVISION_DISC_REQ 7
#define P2P_PROVISION_DISC_RESP 8
/* P2P Action Frame Type */
#define P2P_NOTICE_OF_ABSENCE 0
#define P2P_PRESENCE_REQUEST 1
#define P2P_PRESENCE_RESPONSE 2
#define P2P_GO_DISC_REQUEST 3
#define P2P_MAX_PERSISTENT_GROUP_NUM 10
#define P2P_PROVISIONING_SCAN_CNT 3
#define P2P_WILDCARD_SSID_LEN 7
#define P2P_FINDPHASE_EX_NONE 0 /* default value, used when: (1)p2p disabed or (2)p2p enabled but only do 1 scan phase */
#define P2P_FINDPHASE_EX_FULL 1 /* used when p2p enabled and want to do 1 scan phase and P2P_FINDPHASE_EX_MAX-1 find phase */
#define P2P_FINDPHASE_EX_SOCIAL_FIRST (P2P_FINDPHASE_EX_FULL+1)
#define P2P_FINDPHASE_EX_MAX 4
#define P2P_FINDPHASE_EX_SOCIAL_LAST P2P_FINDPHASE_EX_MAX
#define P2P_PROVISION_TIMEOUT 5000 /*5 sec timeout for sending the provision discovery request */
#define P2P_CONCURRENT_PROVISION_TIMEOUT 3000 /*3 sec timeout for sending the provision discovery request under concurrent mode */
#define P2P_GO_NEGO_TIMEOUT 5000 /*5 sec timeout for receiving the group negotation response */
#define P2P_CONCURRENT_GO_NEGO_TIMEOUT 3000 /*3 sec timeout for sending the negotiation request under concurrent mode */
#define P2P_TX_PRESCAN_TIMEOUT 100 /*100ms */
#define P2P_INVITE_TIMEOUT 5000 /*5 sec timeout for sending the invitation request */
#define P2P_CONCURRENT_INVITE_TIMEOUT 3000 /*3 sec timeout for sending the invitation request under concurrent mode */
#define P2P_RESET_SCAN_CH 25000 /*25 sec t/o to reset the scan channel ( based on channel plan ) */
#define P2P_MAX_INTENT 15
#define P2P_MAX_NOA_NUM 2
/* WPS Configuration Method */
#define WPS_CM_NONE 0x0000
#define WPS_CM_LABEL 0x0004
#define WPS_CM_DISPLYA 0x0008
#define WPS_CM_EXTERNAL_NFC_TOKEN 0x0010
#define WPS_CM_INTEGRATED_NFC_TOKEN 0x0020
#define WPS_CM_NFC_INTERFACE 0x0040
#define WPS_CM_PUSH_BUTTON 0x0080
#define WPS_CM_KEYPAD 0x0100
#define WPS_CM_SW_PUHS_BUTTON 0x0280
#define WPS_CM_HW_PUHS_BUTTON 0x0480
#define WPS_CM_SW_DISPLAY_PIN 0x2008
#define WPS_CM_LCD_DISPLAY_PIN 0x4008
enum P2P_ROLE {
P2P_ROLE_DISABLE = 0,
P2P_ROLE_DEVICE = 1,
P2P_ROLE_CLIENT = 2,
P2P_ROLE_GO = 3
};
enum P2P_STATE {
P2P_STATE_NONE = 0, /*P2P disable */
P2P_STATE_IDLE = 1, /*P2P had enabled and do nothing */
P2P_STATE_LISTEN = 2, /*In pure listen state */
P2P_STATE_SCAN = 3, /*In scan phase */
P2P_STATE_FIND_PHASE_LISTEN = 4, /*In the listen state of find phase */
P2P_STATE_FIND_PHASE_SEARCH = 5, /*In the search state of find phase */
P2P_STATE_TX_PROVISION_DIS_REQ = 6, /*In P2P provisioning discovery */
P2P_STATE_RX_PROVISION_DIS_RSP = 7,
P2P_STATE_RX_PROVISION_DIS_REQ = 8,
P2P_STATE_GONEGO_ING = 9, /*Doing the group owner negoitation handshake */
P2P_STATE_GONEGO_OK = 10, /*finish the group negoitation handshake with success */
P2P_STATE_GONEGO_FAIL = 11, /*finish the group negoitation handshake with failure */
P2P_STATE_RECV_INVITE_REQ_MATCH = 12, /*receiving the P2P Inviation request and match with the profile. */
P2P_STATE_PROVISIONING_ING = 13, /*Doing the P2P WPS */
P2P_STATE_PROVISIONING_DONE = 14, /*Finish the P2P WPS */
P2P_STATE_TX_INVITE_REQ = 15, /*Transmit the P2P Invitation request */
P2P_STATE_RX_INVITE_RESP_OK = 16, /*Receiving the P2P Invitation response */
P2P_STATE_RECV_INVITE_REQ_DISMATCH = 17,/*receiving the P2P Inviation request and dismatch with the profile. */
P2P_STATE_RECV_INVITE_REQ_GO = 18, /*receiving the P2P Inviation request and this wifi is GO. */
P2P_STATE_RECV_INVITE_REQ_JOIN = 19, /*receiving the P2P Inviation request to join an existing P2P Group. */
P2P_STATE_RX_INVITE_RESP_FAIL = 20, /*receiving the P2P Inviation response with failure */
P2P_STATE_RX_INFOR_NOREADY = 21, /*receiving p2p negotiation response with information is not available */
P2P_STATE_TX_INFOR_NOREADY = 22, /*sending p2p negotiation response with information is not available */
};
enum P2P_WPSINFO {
P2P_NO_WPSINFO = 0,
P2P_GOT_WPSINFO_PEER_DISPLAY_PIN = 1,
P2P_GOT_WPSINFO_SELF_DISPLAY_PIN = 2,
P2P_GOT_WPSINFO_PBC = 3,
};
#define P2P_PRIVATE_IOCTL_SET_LEN 64
enum P2P_PROTO_WK_ID {
P2P_FIND_PHASE_WK = 0,
P2P_RESTORE_STATE_WK = 1,
P2P_PRE_TX_PROVDISC_PROCESS_WK = 2,
P2P_PRE_TX_NEGOREQ_PROCESS_WK = 3,
P2P_PRE_TX_INVITEREQ_PROCESS_WK = 4,
P2P_AP_P2P_CH_SWITCH_PROCESS_WK = 5,
P2P_RO_CH_WK = 6,
};
#ifdef CONFIG_8723AU_P2P
enum P2P_PS_STATE {
P2P_PS_DISABLE = 0,
P2P_PS_ENABLE = 1,
P2P_PS_SCAN = 2,
P2P_PS_SCAN_DONE = 3,
P2P_PS_ALLSTASLEEP = 4, /* for P2P GO */
};
enum P2P_PS_MODE {
P2P_PS_NONE = 0,
P2P_PS_CTWINDOW = 1,
P2P_PS_NOA = 2,
P2P_PS_MIX = 3, /* CTWindow and NoA */
};
#endif /* CONFIG_8723AU_P2P */
/* =====================WFD Section===================== */
/* For Wi-Fi Display */
#define WFD_ATTR_DEVICE_INFO 0x00
#define WFD_ATTR_ASSOC_BSSID 0x01
#define WFD_ATTR_COUPLED_SINK_INFO 0x06
#define WFD_ATTR_LOCAL_IP_ADDR 0x08
#define WFD_ATTR_SESSION_INFO 0x09
#define WFD_ATTR_ALTER_MAC 0x0a
/* For WFD Device Information Attribute */
#define WFD_DEVINFO_SOURCE 0x0000
#define WFD_DEVINFO_PSINK 0x0001
#define WFD_DEVINFO_SSINK 0x0002
#define WFD_DEVINFO_DUAL 0x0003
#define WFD_DEVINFO_SESSION_AVAIL 0x0010
#define WFD_DEVINFO_WSD 0x0040
#define WFD_DEVINFO_PC_TDLS 0x0080
#define WFD_DEVINFO_HDCP_SUPPORT 0x0100
#endif /* _WIFI_H_ */

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drivers/staging/rtl8723au/include/wlan_bssdef.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __WLAN_BSSDEF_H__
#define __WLAN_BSSDEF_H__
#define MAX_IE_SZ 768
#define NDIS_802_11_LENGTH_RATES 8
#define NDIS_802_11_LENGTH_RATES_EX 16
enum ndis_802_11_net_type {
Ndis802_11FH,
Ndis802_11DS,
Ndis802_11OFDM5,
Ndis802_11OFDM24,
Ndis802_11NetworkTypeMax /* just an upper bound */
};
struct ndis_802_11_configuration_fh {
u32 Length; /* Length of structure */
u32 HopPattern; /* As defined by 802.11, MSB set */
u32 HopSet; /* to one if non-802.11 */
u32 DwellTime; /* units are Kusec */
};
/*
FW will only save the channel number in DSConfig.
ODI Handler will convert the channel number to freq. number.
*/
struct ndis_802_11_config {
u32 Length; /* Length of structure */
u32 BeaconPeriod; /* units are Kusec */
u32 ATIMWindow; /* units are Kusec */
u32 DSConfig; /* Frequency, units are kHz */
struct ndis_802_11_configuration_fh FHConfig;
};
enum ndis_802_11_net_infra {
Ndis802_11IBSS,
Ndis802_11Infrastructure,
Ndis802_11AutoUnknown,
Ndis802_11InfrastructureMax, /* Not a real value, defined as upper bound */
Ndis802_11APMode
};
struct ndis_802_11_fixed_ies {
u8 Timestamp[8];
u16 BeaconInterval;
u16 Capabilities;
};
struct ndis_802_11_var_ies {
u8 ElementID;
u8 Length;
u8 data[1];
};
/* Length is the 4 bytes multiples of the sum of
* sizeof(6 * sizeof(unsigned char)) + 2 + sizeof(struct ndis_802_11_ssid) +
* sizeof(u32) + sizeof(long) + sizeof(enum ndis_802_11_net_type) +
* sizeof(struct ndis_802_11_config) + sizeof(sizeof(unsigned char) *
* NDIS_802_11_LENGTH_RATES_EX) + IELength
*
* Except the IELength, all other fields are fixed length. Therefore,
* we can define a macro to present the partial sum.
*/
enum ndis_802_11_auth_mode {
Ndis802_11AuthModeOpen,
Ndis802_11AuthModeShared,
Ndis802_11AuthModeAutoSwitch,
Ndis802_11AuthModeWPA,
Ndis802_11AuthModeWPAPSK,
Ndis802_11AuthModeWPANone,
dis802_11AuthModeMax /* upper bound */
};
enum {
Ndis802_11WEPEnabled,
Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled,
Ndis802_11WEPDisabled,
Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled,
Ndis802_11WEPKeyAbsent,
Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent,
Ndis802_11WEPNotSupported,
Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported,
Ndis802_11Encryption2Enabled,
Ndis802_11Encryption2KeyAbsent,
Ndis802_11Encryption3Enabled,
Ndis802_11Encryption3KeyAbsent,
};
/* Key mapping keys require a BSSID */
struct ndis_802_11_key {
u32 Length; /* Length of this structure */
u32 KeyIndex;
u32 KeyLength; /* length of key in bytes */
unsigned char BSSID[6];
unsigned long long KeyRSC;
u8 KeyMaterial[32]; /* variable length depending on above field */
};
struct ndis_802_11_wep {
u32 Length; /* Length of this structure */
u32 KeyIndex; /* 0 is the per-client key, 1-N are global */
u32 KeyLength; /* length of key in bytes */
u8 KeyMaterial[16];/* variable length depending on above field */
};
enum NDIS_802_11_STATUS_TYPE {
Ndis802_11StatusType_Authentication,
Ndis802_11StatusType_MediaStreamMode,
Ndis802_11StatusType_PMKID_CandidateList,
Ndis802_11StatusTypeMax /* not a real type, just an upper bound */
};
/* mask for authentication/integrity fields */
#define NDIS_802_11_AUTH_REQUEST_AUTH_FIELDS 0x0f
#define NDIS_802_11_AUTH_REQUEST_REAUTH 0x01
#define NDIS_802_11_AUTH_REQUEST_KEYUPDATE 0x02
#define NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR 0x06
#define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR 0x0E
/* MIC check time, 60 seconds. */
#define MIC_CHECK_TIME 60000000
#ifndef Ndis802_11APMode
#define Ndis802_11APMode (Ndis802_11InfrastructureMax+1)
#endif
struct wlan_phy_info {
u8 SignalStrength;/* in percentage) */
u8 SignalQuality;/* in percentage) */
u8 Optimum_antenna; /* for Antenna diversity */
u8 Reserved_0;
};
struct wlan_bcn_info {
/* these infor get from rtw_get_encrypt_info when
* * translate scan to UI */
u8 encryp_protocol;/* ENCRYP_PROTOCOL_E: OPEN/WEP/WPA/WPA2 */
int group_cipher; /* WPA/WPA2 group cipher */
int pairwise_cipher;/* WPA/WPA2/WEP pairwise cipher */
int is_8021x;
/* bwmode 20/40 and ch_offset UP/LOW */
unsigned short ht_cap_info;
unsigned char ht_info_infos_0;
};
struct wlan_bssid_ex {
u32 Length;
u8 MacAddress[ETH_ALEN];
u16 reserved;
struct cfg80211_ssid Ssid;
u32 Privacy;
long Rssi;/* in dBM, raw data , get from PHY) */
enum ndis_802_11_net_type NetworkTypeInUse;
struct ndis_802_11_config Configuration;
enum ndis_802_11_net_infra InfrastructureMode;
unsigned char SupportedRates[NDIS_802_11_LENGTH_RATES_EX];
struct wlan_phy_info PhyInfo;
u32 IELength;
u8 IEs[MAX_IE_SZ]; /* timestamp, beacon interval, and capability info*/
} __packed;
static inline uint get_wlan_bssid_ex_sz(struct wlan_bssid_ex *bss)
{
return sizeof(struct wlan_bssid_ex) - MAX_IE_SZ + bss->IELength;
}
struct wlan_network {
struct list_head list;
int network_type; /* refer to ieee80211.h for 11A/B/G */
/* set to fixed when not to be removed as site-surveying */
int fixed;
unsigned long last_scanned; /* timestamp for the network */
int aid; /* will only be valid when a BSS is joined. */
int join_res;
struct wlan_bssid_ex network; /* must be the last item */
struct wlan_bcn_info BcnInfo;
};
enum VRTL_CARRIER_SENSE {
DISABLE_VCS,
ENABLE_VCS,
AUTO_VCS
};
enum VCS_TYPE {
NONE_VCS,
RTS_CTS,
CTS_TO_SELF
};
/* john */
#define NUM_PRE_AUTH_KEY 16
#define NUM_PMKID_CACHE NUM_PRE_AUTH_KEY
#endif /* ifndef WLAN_BSSDEF_H_ */

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drivers/staging/rtl8723au/include/xmit_osdep.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
******************************************************************************/
#ifndef __XMIT_OSDEP_H_
#define __XMIT_OSDEP_H_
#include <osdep_service.h>
#include <drv_types.h>
struct pkt_file {
struct sk_buff *pkt;
__kernel_size_t pkt_len; /* the remainder length of the open_file */
unsigned char *cur_buffer;
u8 *buf_start;
u8 *cur_addr;
__kernel_size_t buf_len;
};
#define NR_XMITFRAME 256
struct xmit_priv;
struct pkt_attrib;
struct sta_xmit_priv;
struct xmit_frame;
struct xmit_buf;
int rtw_xmit23a_entry23a(struct sk_buff *pkt, struct net_device *pnetdev);
void rtw_os_xmit_schedule23a(struct rtw_adapter *padapter);
int rtw_os_xmit_resource_alloc23a(struct rtw_adapter *padapter,
struct xmit_buf *pxmitbuf, u32 alloc_sz);
void rtw_os_xmit_resource_free23a(struct rtw_adapter *padapter,
struct xmit_buf *pxmitbuf);
uint rtw_remainder_len23a(struct pkt_file *pfile);
void _rtw_open_pktfile23a(struct sk_buff *pkt, struct pkt_file *pfile);
uint _rtw_pktfile_read23a(struct pkt_file *pfile, u8 *rmem, uint rlen);
int rtw_endofpktfile23a(struct pkt_file *pfile);
void rtw_os_pkt_complete23a(struct rtw_adapter *padapter, struct sk_buff *pkt);
void rtw_os_xmit_complete23a(struct rtw_adapter *padapter,
struct xmit_frame *pxframe);
int netdev_open23a(struct net_device *pnetdev);
#endif /* __XMIT_OSDEP_H_ */