hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

tty: xuartps: Refactor read-modify-writes 

A lot of read-modify-write sequences used a one-line statement which
nests a readl() within a writel(). Convert this into code sequences that
make the three steps more obvious.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Soren Brinkmann 2014-04-04 17:23:41 -07:00 committed by Greg Kroah-Hartman
parent 5ce15d2d1e
commit 35dc5a538f
1 changed files with 24 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

52
drivers/tty/serial/xilinx_uartps.c
View File

@ -437,9 +437,9 @@ static int xuartps_clk_notifier_cb(struct notifier_block *nb,
spin_lock_irqsave(&xuartps->port->lock, flags);
/* Disable the TX and RX to set baud rate */
xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS),
XUARTPS_CR_OFFSET);
ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
ctrl_reg |= XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS;
xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
spin_unlock_irqrestore(&xuartps->port->lock, flags);
@ -464,9 +464,9 @@ static int xuartps_clk_notifier_cb(struct notifier_block *nb,
spin_lock_irqsave(&xuartps->port->lock, flags);
/* Set TX/RX Reset */
xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST),
XUARTPS_CR_OFFSET);
ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST;
xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
while (xuartps_readl(XUARTPS_CR_OFFSET) &
(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST))
@ -479,10 +479,9 @@ static int xuartps_clk_notifier_cb(struct notifier_block *nb,
*/
xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
xuartps_writel(
(ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) |
(XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN),
XUARTPS_CR_OFFSET);
ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS);
ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN;
xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
spin_unlock_irqrestore(&xuartps->port->lock, flags);
@ -631,9 +630,9 @@ static void xuartps_set_termios(struct uart_port *port,
}
/* Disable the TX and RX to set baud rate */
xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS),
XUARTPS_CR_OFFSET);
ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
ctrl_reg |= XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS;
xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
/*
* Min baud rate = 6bps and Max Baud Rate is 10Mbps for 100Mhz clk
@ -651,20 +650,18 @@ static void xuartps_set_termios(struct uart_port *port,
uart_update_timeout(port, termios->c_cflag, baud);
/* Set TX/RX Reset */
xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST),
XUARTPS_CR_OFFSET);
ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST;
xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
/*
* Clear the RX disable and TX disable bits and then set the TX enable
* bit and RX enable bit to enable the transmitter and receiver.
*/
xuartps_writel(
(ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS))
| (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN),
XUARTPS_CR_OFFSET);
ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS);
ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN;
xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
@ -1248,9 +1245,9 @@ static int xuartps_resume(struct device *device)
spin_lock_irqsave(&port->lock, flags);
/* Set TX/RX Reset */
xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST),
XUARTPS_CR_OFFSET);
ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST;
xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
while (xuartps_readl(XUARTPS_CR_OFFSET) &
(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST))
cpu_relax();
@ -1259,10 +1256,9 @@ static int xuartps_resume(struct device *device)
xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
/* Enable Tx/Rx */
ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
xuartps_writel(
(ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) |
(XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN),
XUARTPS_CR_OFFSET);
ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS);
ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN;
xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
spin_unlock_irqrestore(&port->lock, flags);
} else {