spi: sh-msiof: Replace spi_master by spi_controller
As of commit 8caab75fd2 ('spi: Generalize SPI "master" to
"controller"'), the old master-centric names are compatibility wrappers
for the new controller-centric names.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Geert Uytterhoeven
Mark Brown
parent
5a0e577fc9
commit
35c35fd925
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* SuperH MSIOF SPI Master Interface
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* SuperH MSIOF SPI Controller Interface
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*
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* Copyright (c) 2009 Magnus Damm
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* Copyright (C) 2014 Renesas Electronics Corporation
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@ -34,12 +34,12 @@
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struct sh_msiof_chipdata {
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u16 tx_fifo_size;
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u16 rx_fifo_size;
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u16 master_flags;
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u16 ctlr_flags;
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u16 min_div_pow;
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};
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struct sh_msiof_spi_priv {
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struct spi_master *master;
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struct spi_controller *ctlr;
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void __iomem *mapbase;
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struct clk *clk;
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struct platform_device *pdev;
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@ -287,7 +287,7 @@ static void sh_msiof_spi_set_clk_regs(struct sh_msiof_spi_priv *p,
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scr = sh_msiof_spi_div_array[div_pow] | SCR_BRPS(brps);
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sh_msiof_write(p, TSCR, scr);
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if (!(p->master->flags & SPI_MASTER_MUST_TX))
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if (!(p->ctlr->flags & SPI_CONTROLLER_MUST_TX))
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sh_msiof_write(p, RSCR, scr);
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}
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@ -351,14 +351,14 @@ static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p, u32 ss,
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tmp |= !cs_high << MDR1_SYNCAC_SHIFT;
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tmp |= lsb_first << MDR1_BITLSB_SHIFT;
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tmp |= sh_msiof_spi_get_dtdl_and_syncdl(p);
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if (spi_controller_is_slave(p->master)) {
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if (spi_controller_is_slave(p->ctlr)) {
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sh_msiof_write(p, TMDR1, tmp | TMDR1_PCON);
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} else {
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sh_msiof_write(p, TMDR1,
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tmp | MDR1_TRMD | TMDR1_PCON |
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(ss < MAX_SS ? ss : 0) << TMDR1_SYNCCH_SHIFT);
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}
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if (p->master->flags & SPI_MASTER_MUST_TX) {
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if (p->ctlr->flags & SPI_CONTROLLER_MUST_TX) {
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/* These bits are reserved if RX needs TX */
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tmp &= ~0x0000ffff;
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}
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@ -382,7 +382,7 @@ static void sh_msiof_spi_set_mode_regs(struct sh_msiof_spi_priv *p,
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{
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u32 dr2 = MDR2_BITLEN1(bits) | MDR2_WDLEN1(words);
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if (tx_buf || (p->master->flags & SPI_MASTER_MUST_TX))
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if (tx_buf || (p->ctlr->flags & SPI_CONTROLLER_MUST_TX))
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sh_msiof_write(p, TMDR2, dr2);
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else
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sh_msiof_write(p, TMDR2, dr2 | MDR2_GRPMASK1);
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@ -539,8 +539,9 @@ static void sh_msiof_spi_read_fifo_s32u(struct sh_msiof_spi_priv *p,
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static int sh_msiof_spi_setup(struct spi_device *spi)
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{
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struct device_node *np = spi->master->dev.of_node;
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struct sh_msiof_spi_priv *p = spi_master_get_devdata(spi->master);
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struct device_node *np = spi->controller->dev.of_node;
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struct sh_msiof_spi_priv *p =
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spi_controller_get_devdata(spi->controller);
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u32 clr, set, tmp;
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if (!np) {
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@ -556,7 +557,7 @@ static int sh_msiof_spi_setup(struct spi_device *spi)
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return 0;
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}
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if (spi_controller_is_slave(p->master))
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if (spi_controller_is_slave(p->ctlr))
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return 0;
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if (p->native_cs_inited &&
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@ -581,10 +582,10 @@ static int sh_msiof_spi_setup(struct spi_device *spi)
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return 0;
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}
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static int sh_msiof_prepare_message(struct spi_master *master,
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static int sh_msiof_prepare_message(struct spi_controller *ctlr,
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struct spi_message *msg)
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{
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struct sh_msiof_spi_priv *p = spi_master_get_devdata(master);
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struct sh_msiof_spi_priv *p = spi_controller_get_devdata(ctlr);
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const struct spi_device *spi = msg->spi;
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u32 ss, cs_high;
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@ -605,7 +606,7 @@ static int sh_msiof_prepare_message(struct spi_master *master,
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static int sh_msiof_spi_start(struct sh_msiof_spi_priv *p, void *rx_buf)
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{
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bool slave = spi_controller_is_slave(p->master);
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bool slave = spi_controller_is_slave(p->ctlr);
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int ret = 0;
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/* setup clock and rx/tx signals */
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@ -625,7 +626,7 @@ static int sh_msiof_spi_start(struct sh_msiof_spi_priv *p, void *rx_buf)
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static int sh_msiof_spi_stop(struct sh_msiof_spi_priv *p, void *rx_buf)
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{
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bool slave = spi_controller_is_slave(p->master);
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bool slave = spi_controller_is_slave(p->ctlr);
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int ret = 0;
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/* shut down frame, rx/tx and clock signals */
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@ -641,9 +642,9 @@ static int sh_msiof_spi_stop(struct sh_msiof_spi_priv *p, void *rx_buf)
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return ret;
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}
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static int sh_msiof_slave_abort(struct spi_master *master)
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static int sh_msiof_slave_abort(struct spi_controller *ctlr)
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{
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struct sh_msiof_spi_priv *p = spi_master_get_devdata(master);
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struct sh_msiof_spi_priv *p = spi_controller_get_devdata(ctlr);
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p->slave_aborted = true;
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complete(&p->done);
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@ -654,7 +655,7 @@ static int sh_msiof_slave_abort(struct spi_master *master)
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static int sh_msiof_wait_for_completion(struct sh_msiof_spi_priv *p,
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struct completion *x)
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{
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if (spi_controller_is_slave(p->master)) {
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if (spi_controller_is_slave(p->ctlr)) {
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if (wait_for_completion_interruptible(x) ||
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p->slave_aborted) {
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dev_dbg(&p->pdev->dev, "interrupted\n");
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@ -754,7 +755,7 @@ static int sh_msiof_dma_once(struct sh_msiof_spi_priv *p, const void *tx,
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/* First prepare and submit the DMA request(s), as this may fail */
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if (rx) {
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ier_bits |= IER_RDREQE | IER_RDMAE;
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desc_rx = dmaengine_prep_slave_single(p->master->dma_rx,
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desc_rx = dmaengine_prep_slave_single(p->ctlr->dma_rx,
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p->rx_dma_addr, len, DMA_DEV_TO_MEM,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!desc_rx)
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@ -769,9 +770,9 @@ static int sh_msiof_dma_once(struct sh_msiof_spi_priv *p, const void *tx,
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if (tx) {
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ier_bits |= IER_TDREQE | IER_TDMAE;
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dma_sync_single_for_device(p->master->dma_tx->device->dev,
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dma_sync_single_for_device(p->ctlr->dma_tx->device->dev,
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p->tx_dma_addr, len, DMA_TO_DEVICE);
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desc_tx = dmaengine_prep_slave_single(p->master->dma_tx,
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desc_tx = dmaengine_prep_slave_single(p->ctlr->dma_tx,
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p->tx_dma_addr, len, DMA_MEM_TO_DEV,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!desc_tx) {
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@ -803,9 +804,9 @@ static int sh_msiof_dma_once(struct sh_msiof_spi_priv *p, const void *tx,
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/* Now start DMA */
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if (rx)
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dma_async_issue_pending(p->master->dma_rx);
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dma_async_issue_pending(p->ctlr->dma_rx);
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if (tx)
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dma_async_issue_pending(p->master->dma_tx);
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dma_async_issue_pending(p->ctlr->dma_tx);
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ret = sh_msiof_spi_start(p, rx);
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if (ret) {
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@ -845,9 +846,8 @@ static int sh_msiof_dma_once(struct sh_msiof_spi_priv *p, const void *tx,
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}
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if (rx)
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dma_sync_single_for_cpu(p->master->dma_rx->device->dev,
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p->rx_dma_addr, len,
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DMA_FROM_DEVICE);
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dma_sync_single_for_cpu(p->ctlr->dma_rx->device->dev,
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p->rx_dma_addr, len, DMA_FROM_DEVICE);
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return 0;
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@ -856,10 +856,10 @@ stop_reset:
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sh_msiof_spi_stop(p, rx);
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stop_dma:
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if (tx)
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dmaengine_terminate_all(p->master->dma_tx);
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dmaengine_terminate_all(p->ctlr->dma_tx);
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no_dma_tx:
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if (rx)
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dmaengine_terminate_all(p->master->dma_rx);
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dmaengine_terminate_all(p->ctlr->dma_rx);
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sh_msiof_write(p, IER, 0);
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return ret;
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}
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@ -907,11 +907,11 @@ static void copy_plain32(u32 *dst, const u32 *src, unsigned int words)
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memcpy(dst, src, words * 4);
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}
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static int sh_msiof_transfer_one(struct spi_master *master,
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static int sh_msiof_transfer_one(struct spi_controller *ctlr,
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struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct sh_msiof_spi_priv *p = spi_master_get_devdata(master);
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struct sh_msiof_spi_priv *p = spi_controller_get_devdata(ctlr);
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void (*copy32)(u32 *, const u32 *, unsigned int);
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void (*tx_fifo)(struct sh_msiof_spi_priv *, const void *, int, int);
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void (*rx_fifo)(struct sh_msiof_spi_priv *, void *, int, int);
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@ -926,10 +926,10 @@ static int sh_msiof_transfer_one(struct spi_master *master,
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int ret;
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/* setup clocks (clock already enabled in chipselect()) */
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if (!spi_controller_is_slave(p->master))
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if (!spi_controller_is_slave(p->ctlr))
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sh_msiof_spi_set_clk_regs(p, clk_get_rate(p->clk), t->speed_hz);
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while (master->dma_tx && len > 15) {
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while (ctlr->dma_tx && len > 15) {
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/*
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* DMA supports 32-bit words only, hence pack 8-bit and 16-bit
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* words, with byte resp. word swapping.
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@ -1050,21 +1050,21 @@ static int sh_msiof_transfer_one(struct spi_master *master,
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static const struct sh_msiof_chipdata sh_data = {
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.tx_fifo_size = 64,
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.rx_fifo_size = 64,
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.master_flags = 0,
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.ctlr_flags = 0,
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.min_div_pow = 0,
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};
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static const struct sh_msiof_chipdata rcar_gen2_data = {
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.tx_fifo_size = 64,
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.rx_fifo_size = 64,
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.master_flags = SPI_MASTER_MUST_TX,
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.ctlr_flags = SPI_CONTROLLER_MUST_TX,
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.min_div_pow = 0,
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};
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static const struct sh_msiof_chipdata rcar_gen3_data = {
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.tx_fifo_size = 64,
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.rx_fifo_size = 64,
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.master_flags = SPI_MASTER_MUST_TX,
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.ctlr_flags = SPI_CONTROLLER_MUST_TX,
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.min_div_pow = 1,
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};
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@ -1132,7 +1132,7 @@ static int sh_msiof_get_cs_gpios(struct sh_msiof_spi_priv *p)
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if (ret <= 0)
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return 0;
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num_cs = max_t(unsigned int, ret, p->master->num_chipselect);
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num_cs = max_t(unsigned int, ret, p->ctlr->num_chipselect);
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for (i = 0; i < num_cs; i++) {
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struct gpio_desc *gpiod;
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@ -1205,7 +1205,7 @@ static int sh_msiof_request_dma(struct sh_msiof_spi_priv *p)
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const struct sh_msiof_spi_info *info = p->info;
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unsigned int dma_tx_id, dma_rx_id;
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const struct resource *res;
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struct spi_master *master;
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struct spi_controller *ctlr;
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struct device *tx_dev, *rx_dev;
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if (dev->of_node) {
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@ -1225,17 +1225,15 @@ static int sh_msiof_request_dma(struct sh_msiof_spi_priv *p)
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if (!res)
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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master = p->master;
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master->dma_tx = sh_msiof_request_dma_chan(dev, DMA_MEM_TO_DEV,
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dma_tx_id,
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res->start + TFDR);
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if (!master->dma_tx)
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ctlr = p->ctlr;
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ctlr->dma_tx = sh_msiof_request_dma_chan(dev, DMA_MEM_TO_DEV,
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dma_tx_id, res->start + TFDR);
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if (!ctlr->dma_tx)
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return -ENODEV;
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master->dma_rx = sh_msiof_request_dma_chan(dev, DMA_DEV_TO_MEM,
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dma_rx_id,
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res->start + RFDR);
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if (!master->dma_rx)
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ctlr->dma_rx = sh_msiof_request_dma_chan(dev, DMA_DEV_TO_MEM,
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dma_rx_id, res->start + RFDR);
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if (!ctlr->dma_rx)
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goto free_tx_chan;
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p->tx_dma_page = (void *)__get_free_page(GFP_KERNEL | GFP_DMA);
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@ -1246,13 +1244,13 @@ static int sh_msiof_request_dma(struct sh_msiof_spi_priv *p)
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if (!p->rx_dma_page)
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goto free_tx_page;
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tx_dev = master->dma_tx->device->dev;
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tx_dev = ctlr->dma_tx->device->dev;
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p->tx_dma_addr = dma_map_single(tx_dev, p->tx_dma_page, PAGE_SIZE,
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DMA_TO_DEVICE);
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if (dma_mapping_error(tx_dev, p->tx_dma_addr))
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goto free_rx_page;
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rx_dev = master->dma_rx->device->dev;
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rx_dev = ctlr->dma_rx->device->dev;
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p->rx_dma_addr = dma_map_single(rx_dev, p->rx_dma_page, PAGE_SIZE,
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DMA_FROM_DEVICE);
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if (dma_mapping_error(rx_dev, p->rx_dma_addr))
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@ -1268,34 +1266,34 @@ free_rx_page:
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free_tx_page:
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free_page((unsigned long)p->tx_dma_page);
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free_rx_chan:
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dma_release_channel(master->dma_rx);
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dma_release_channel(ctlr->dma_rx);
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free_tx_chan:
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dma_release_channel(master->dma_tx);
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master->dma_tx = NULL;
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dma_release_channel(ctlr->dma_tx);
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ctlr->dma_tx = NULL;
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return -ENODEV;
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}
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static void sh_msiof_release_dma(struct sh_msiof_spi_priv *p)
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{
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struct spi_master *master = p->master;
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struct spi_controller *ctlr = p->ctlr;
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if (!master->dma_tx)
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if (!ctlr->dma_tx)
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return;
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dma_unmap_single(master->dma_rx->device->dev, p->rx_dma_addr,
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PAGE_SIZE, DMA_FROM_DEVICE);
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dma_unmap_single(master->dma_tx->device->dev, p->tx_dma_addr,
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PAGE_SIZE, DMA_TO_DEVICE);
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dma_unmap_single(ctlr->dma_rx->device->dev, p->rx_dma_addr, PAGE_SIZE,
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DMA_FROM_DEVICE);
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dma_unmap_single(ctlr->dma_tx->device->dev, p->tx_dma_addr, PAGE_SIZE,
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DMA_TO_DEVICE);
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free_page((unsigned long)p->rx_dma_page);
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free_page((unsigned long)p->tx_dma_page);
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dma_release_channel(master->dma_rx);
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dma_release_channel(master->dma_tx);
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dma_release_channel(ctlr->dma_rx);
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dma_release_channel(ctlr->dma_tx);
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}
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static int sh_msiof_spi_probe(struct platform_device *pdev)
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{
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struct resource *r;
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struct spi_master *master;
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struct spi_controller *ctlr;
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const struct sh_msiof_chipdata *chipdata;
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struct sh_msiof_spi_info *info;
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struct sh_msiof_spi_priv *p;
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@ -1316,18 +1314,18 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
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}
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if (info->mode == MSIOF_SPI_SLAVE)
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master = spi_alloc_slave(&pdev->dev,
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sizeof(struct sh_msiof_spi_priv));
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ctlr = spi_alloc_slave(&pdev->dev,
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sizeof(struct sh_msiof_spi_priv));
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else
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master = spi_alloc_master(&pdev->dev,
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sizeof(struct sh_msiof_spi_priv));
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if (master == NULL)
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ctlr = spi_alloc_master(&pdev->dev,
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sizeof(struct sh_msiof_spi_priv));
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if (ctlr == NULL)
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return -ENOMEM;
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p = spi_master_get_devdata(master);
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p = spi_controller_get_devdata(ctlr);
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platform_set_drvdata(pdev, p);
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p->master = master;
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p->ctlr = ctlr;
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p->info = info;
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p->min_div_pow = chipdata->min_div_pow;
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|
|
@ -1374,31 +1372,31 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
|
|||
p->rx_fifo_size = p->info->rx_fifo_override;
|
||||
|
||||
/* Setup GPIO chip selects */
|
||||
master->num_chipselect = p->info->num_chipselect;
|
||||
ctlr->num_chipselect = p->info->num_chipselect;
|
||||
ret = sh_msiof_get_cs_gpios(p);
|
||||
if (ret)
|
||||
goto err1;
|
||||
|
||||
/* init master code */
|
||||
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
|
||||
master->mode_bits |= SPI_LSB_FIRST | SPI_3WIRE;
|
||||
master->flags = chipdata->master_flags;
|
||||
master->bus_num = pdev->id;
|
||||
master->dev.of_node = pdev->dev.of_node;
|
||||
master->setup = sh_msiof_spi_setup;
|
||||
master->prepare_message = sh_msiof_prepare_message;
|
||||
master->slave_abort = sh_msiof_slave_abort;
|
||||
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);
|
||||
master->auto_runtime_pm = true;
|
||||
master->transfer_one = sh_msiof_transfer_one;
|
||||
/* init controller code */
|
||||
ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
|
||||
ctlr->mode_bits |= SPI_LSB_FIRST | SPI_3WIRE;
|
||||
ctlr->flags = chipdata->ctlr_flags;
|
||||
ctlr->bus_num = pdev->id;
|
||||
ctlr->dev.of_node = pdev->dev.of_node;
|
||||
ctlr->setup = sh_msiof_spi_setup;
|
||||
ctlr->prepare_message = sh_msiof_prepare_message;
|
||||
ctlr->slave_abort = sh_msiof_slave_abort;
|
||||
ctlr->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);
|
||||
ctlr->auto_runtime_pm = true;
|
||||
ctlr->transfer_one = sh_msiof_transfer_one;
|
||||
|
||||
ret = sh_msiof_request_dma(p);
|
||||
if (ret < 0)
|
||||
dev_warn(&pdev->dev, "DMA not available, using PIO\n");
|
||||
|
||||
ret = devm_spi_register_master(&pdev->dev, master);
|
||||
ret = devm_spi_register_controller(&pdev->dev, ctlr);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "spi_register_master error.\n");
|
||||
dev_err(&pdev->dev, "devm_spi_register_controller error.\n");
|
||||
goto err2;
|
||||
}
|
||||
|
||||
|
|
@ -1408,7 +1406,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
|
|||
sh_msiof_release_dma(p);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
err1:
|
||||
spi_master_put(master);
|
||||
spi_controller_put(ctlr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -1432,14 +1430,14 @@ static int sh_msiof_spi_suspend(struct device *dev)
|
|||
{
|
||||
struct sh_msiof_spi_priv *p = dev_get_drvdata(dev);
|
||||
|
||||
return spi_master_suspend(p->master);
|
||||
return spi_controller_suspend(p->ctlr);
|
||||
}
|
||||
|
||||
static int sh_msiof_spi_resume(struct device *dev)
|
||||
{
|
||||
struct sh_msiof_spi_priv *p = dev_get_drvdata(dev);
|
||||
|
||||
return spi_master_resume(p->master);
|
||||
return spi_controller_resume(p->ctlr);
|
||||
}
|
||||
|
||||
static SIMPLE_DEV_PM_OPS(sh_msiof_spi_pm_ops, sh_msiof_spi_suspend,
|
||||
|
|
@ -1461,7 +1459,7 @@ static struct platform_driver sh_msiof_spi_drv = {
|
|||
};
|
||||
module_platform_driver(sh_msiof_spi_drv);
|
||||
|
||||
MODULE_DESCRIPTION("SuperH MSIOF SPI Master Interface Driver");
|
||||
MODULE_DESCRIPTION("SuperH MSIOF SPI Controller Interface Driver");
|
||||
MODULE_AUTHOR("Magnus Damm");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_ALIAS("platform:spi_sh_msiof");
|
||||
|
|
|
|||
Loading…
Reference in New Issue