[PATCH] i386: Avoid overwriting the current pgd (V4, i386)
kexec: Avoid overwriting the current pgd (V4, i386) This patch upgrades the i386-specific kexec code to avoid overwriting the current pgd. Overwriting the current pgd is bad when CONFIG_CRASH_DUMP is used to start a secondary kernel that dumps the memory of the previous kernel. The code introduces a new set of page tables. These tables are used to provide an executable identity mapping without overwriting the current pgd. Signed-off-by: Magnus Damm <magnus@valinux.co.jp> Signed-off-by: Andi Kleen <ak@suse.de>
This commit is contained in:
Magnus Damm
Andi Kleen
parent
4bfaaef01a
commit
3566561bfa
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@ -21,70 +21,13 @@
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#include <asm/system.h>
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#define PAGE_ALIGNED __attribute__ ((__aligned__(PAGE_SIZE)))
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#define L0_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
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#define L1_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
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#define L2_ATTR (_PAGE_PRESENT)
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#define LEVEL0_SIZE (1UL << 12UL)
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#ifndef CONFIG_X86_PAE
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#define LEVEL1_SIZE (1UL << 22UL)
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static u32 pgtable_level1[1024] PAGE_ALIGNED;
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static void identity_map_page(unsigned long address)
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{
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unsigned long level1_index, level2_index;
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u32 *pgtable_level2;
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/* Find the current page table */
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pgtable_level2 = __va(read_cr3());
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/* Find the indexes of the physical address to identity map */
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level1_index = (address % LEVEL1_SIZE)/LEVEL0_SIZE;
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level2_index = address / LEVEL1_SIZE;
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/* Identity map the page table entry */
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pgtable_level1[level1_index] = address | L0_ATTR;
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pgtable_level2[level2_index] = __pa(pgtable_level1) | L1_ATTR;
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/* Flush the tlb so the new mapping takes effect.
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* Global tlb entries are not flushed but that is not an issue.
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*/
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load_cr3(pgtable_level2);
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}
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#else
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#define LEVEL1_SIZE (1UL << 21UL)
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#define LEVEL2_SIZE (1UL << 30UL)
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static u64 pgtable_level1[512] PAGE_ALIGNED;
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static u64 pgtable_level2[512] PAGE_ALIGNED;
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static void identity_map_page(unsigned long address)
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{
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unsigned long level1_index, level2_index, level3_index;
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u64 *pgtable_level3;
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/* Find the current page table */
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pgtable_level3 = __va(read_cr3());
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/* Find the indexes of the physical address to identity map */
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level1_index = (address % LEVEL1_SIZE)/LEVEL0_SIZE;
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level2_index = (address % LEVEL2_SIZE)/LEVEL1_SIZE;
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level3_index = address / LEVEL2_SIZE;
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/* Identity map the page table entry */
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pgtable_level1[level1_index] = address | L0_ATTR;
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pgtable_level2[level2_index] = __pa(pgtable_level1) | L1_ATTR;
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set_64bit(&pgtable_level3[level3_index],
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__pa(pgtable_level2) | L2_ATTR);
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/* Flush the tlb so the new mapping takes effect.
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* Global tlb entries are not flushed but that is not an issue.
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*/
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load_cr3(pgtable_level3);
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}
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static u32 kexec_pgd[1024] PAGE_ALIGNED;
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#ifdef CONFIG_X86_PAE
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static u32 kexec_pmd0[1024] PAGE_ALIGNED;
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static u32 kexec_pmd1[1024] PAGE_ALIGNED;
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#endif
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static u32 kexec_pte0[1024] PAGE_ALIGNED;
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static u32 kexec_pte1[1024] PAGE_ALIGNED;
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static void set_idt(void *newidt, __u16 limit)
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{
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@ -128,16 +71,6 @@ static void load_segments(void)
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#undef __STR
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}
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typedef asmlinkage NORET_TYPE void (*relocate_new_kernel_t)(
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unsigned long indirection_page,
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unsigned long reboot_code_buffer,
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unsigned long start_address,
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unsigned int has_pae) ATTRIB_NORET;
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extern const unsigned char relocate_new_kernel[];
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extern void relocate_new_kernel_end(void);
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extern const unsigned int relocate_new_kernel_size;
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/*
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* A architecture hook called to validate the
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* proposed image and prepare the control pages
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@ -170,25 +103,29 @@ void machine_kexec_cleanup(struct kimage *image)
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*/
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NORET_TYPE void machine_kexec(struct kimage *image)
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{
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unsigned long page_list;
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unsigned long reboot_code_buffer;
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relocate_new_kernel_t rnk;
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unsigned long page_list[PAGES_NR];
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void *control_page;
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/* Interrupts aren't acceptable while we reboot */
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local_irq_disable();
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/* Compute some offsets */
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reboot_code_buffer = page_to_pfn(image->control_code_page)
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<< PAGE_SHIFT;
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page_list = image->head;
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control_page = page_address(image->control_code_page);
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memcpy(control_page, relocate_kernel, PAGE_SIZE);
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/* Set up an identity mapping for the reboot_code_buffer */
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identity_map_page(reboot_code_buffer);
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/* copy it out */
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memcpy((void *)reboot_code_buffer, relocate_new_kernel,
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relocate_new_kernel_size);
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page_list[PA_CONTROL_PAGE] = __pa(control_page);
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page_list[VA_CONTROL_PAGE] = (unsigned long)relocate_kernel;
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page_list[PA_PGD] = __pa(kexec_pgd);
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page_list[VA_PGD] = (unsigned long)kexec_pgd;
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#ifdef CONFIG_X86_PAE
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page_list[PA_PMD_0] = __pa(kexec_pmd0);
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page_list[VA_PMD_0] = (unsigned long)kexec_pmd0;
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page_list[PA_PMD_1] = __pa(kexec_pmd1);
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page_list[VA_PMD_1] = (unsigned long)kexec_pmd1;
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#endif
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page_list[PA_PTE_0] = __pa(kexec_pte0);
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page_list[VA_PTE_0] = (unsigned long)kexec_pte0;
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page_list[PA_PTE_1] = __pa(kexec_pte1);
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page_list[VA_PTE_1] = (unsigned long)kexec_pte1;
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/* The segment registers are funny things, they have both a
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* visible and an invisible part. Whenever the visible part is
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@ -207,8 +144,8 @@ NORET_TYPE void machine_kexec(struct kimage *image)
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set_idt(phys_to_virt(0),0);
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/* now call it */
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rnk = (relocate_new_kernel_t) reboot_code_buffer;
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(*rnk)(page_list, reboot_code_buffer, image->start, cpu_has_pae);
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relocate_kernel((unsigned long)image->head, (unsigned long)page_list,
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image->start, cpu_has_pae);
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}
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/* crashkernel=size@addr specifies the location to reserve for
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@ -7,16 +7,138 @@
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*/
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#include <linux/linkage.h>
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#include <asm/page.h>
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#include <asm/kexec.h>
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/*
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* Must be relocatable PIC code callable as a C function
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*/
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#define PTR(x) (x << 2)
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#define PAGE_ALIGNED (1 << PAGE_SHIFT)
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#define PAGE_ATTR 0x63 /* _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY */
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#define PAE_PGD_ATTR 0x01 /* _PAGE_PRESENT */
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.text
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.align PAGE_ALIGNED
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.globl relocate_kernel
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relocate_kernel:
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movl 8(%esp), %ebp /* list of pages */
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#ifdef CONFIG_X86_PAE
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/* map the control page at its virtual address */
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movl PTR(VA_PGD)(%ebp), %edi
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movl PTR(VA_CONTROL_PAGE)(%ebp), %eax
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andl $0xc0000000, %eax
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shrl $27, %eax
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addl %edi, %eax
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movl PTR(PA_PMD_0)(%ebp), %edx
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orl $PAE_PGD_ATTR, %edx
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movl %edx, (%eax)
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movl PTR(VA_PMD_0)(%ebp), %edi
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movl PTR(VA_CONTROL_PAGE)(%ebp), %eax
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andl $0x3fe00000, %eax
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shrl $18, %eax
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addl %edi, %eax
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movl PTR(PA_PTE_0)(%ebp), %edx
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orl $PAGE_ATTR, %edx
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movl %edx, (%eax)
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movl PTR(VA_PTE_0)(%ebp), %edi
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movl PTR(VA_CONTROL_PAGE)(%ebp), %eax
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andl $0x001ff000, %eax
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shrl $9, %eax
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addl %edi, %eax
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movl PTR(PA_CONTROL_PAGE)(%ebp), %edx
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orl $PAGE_ATTR, %edx
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movl %edx, (%eax)
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/* identity map the control page at its physical address */
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movl PTR(VA_PGD)(%ebp), %edi
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movl PTR(PA_CONTROL_PAGE)(%ebp), %eax
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andl $0xc0000000, %eax
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shrl $27, %eax
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addl %edi, %eax
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movl PTR(PA_PMD_1)(%ebp), %edx
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orl $PAE_PGD_ATTR, %edx
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movl %edx, (%eax)
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movl PTR(VA_PMD_1)(%ebp), %edi
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movl PTR(PA_CONTROL_PAGE)(%ebp), %eax
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andl $0x3fe00000, %eax
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shrl $18, %eax
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addl %edi, %eax
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movl PTR(PA_PTE_1)(%ebp), %edx
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orl $PAGE_ATTR, %edx
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movl %edx, (%eax)
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movl PTR(VA_PTE_1)(%ebp), %edi
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movl PTR(PA_CONTROL_PAGE)(%ebp), %eax
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andl $0x001ff000, %eax
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shrl $9, %eax
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addl %edi, %eax
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movl PTR(PA_CONTROL_PAGE)(%ebp), %edx
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orl $PAGE_ATTR, %edx
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movl %edx, (%eax)
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#else
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/* map the control page at its virtual address */
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movl PTR(VA_PGD)(%ebp), %edi
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movl PTR(VA_CONTROL_PAGE)(%ebp), %eax
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andl $0xffc00000, %eax
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shrl $20, %eax
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addl %edi, %eax
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movl PTR(PA_PTE_0)(%ebp), %edx
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orl $PAGE_ATTR, %edx
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movl %edx, (%eax)
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movl PTR(VA_PTE_0)(%ebp), %edi
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movl PTR(VA_CONTROL_PAGE)(%ebp), %eax
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andl $0x003ff000, %eax
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shrl $10, %eax
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addl %edi, %eax
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movl PTR(PA_CONTROL_PAGE)(%ebp), %edx
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orl $PAGE_ATTR, %edx
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movl %edx, (%eax)
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/* identity map the control page at its physical address */
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movl PTR(VA_PGD)(%ebp), %edi
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movl PTR(PA_CONTROL_PAGE)(%ebp), %eax
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andl $0xffc00000, %eax
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shrl $20, %eax
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addl %edi, %eax
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movl PTR(PA_PTE_1)(%ebp), %edx
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orl $PAGE_ATTR, %edx
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movl %edx, (%eax)
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movl PTR(VA_PTE_1)(%ebp), %edi
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movl PTR(PA_CONTROL_PAGE)(%ebp), %eax
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andl $0x003ff000, %eax
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shrl $10, %eax
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addl %edi, %eax
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movl PTR(PA_CONTROL_PAGE)(%ebp), %edx
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orl $PAGE_ATTR, %edx
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movl %edx, (%eax)
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#endif
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/*
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* Must be relocatable PIC code callable as a C function, that once
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* it starts can not use the previous processes stack.
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*/
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.globl relocate_new_kernel
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relocate_new_kernel:
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/* read the arguments and say goodbye to the stack */
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movl 4(%esp), %ebx /* page_list */
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movl 8(%esp), %ebp /* reboot_code_buffer */
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movl 8(%esp), %ebp /* list of pages */
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movl 12(%esp), %edx /* start address */
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movl 16(%esp), %ecx /* cpu_has_pae */
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@ -24,11 +146,26 @@ relocate_new_kernel:
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pushl $0
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popfl
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/* set a new stack at the bottom of our page... */
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lea 4096(%ebp), %esp
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/* get physical address of control page now */
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/* this is impossible after page table switch */
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movl PTR(PA_CONTROL_PAGE)(%ebp), %edi
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/* store the parameters back on the stack */
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pushl %edx /* store the start address */
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/* switch to new set of page tables */
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movl PTR(PA_PGD)(%ebp), %eax
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movl %eax, %cr3
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/* setup a new stack at the end of the physical control page */
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lea 4096(%edi), %esp
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/* jump to identity mapped page */
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movl %edi, %eax
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addl $(identity_mapped - relocate_kernel), %eax
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pushl %eax
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ret
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identity_mapped:
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/* store the start address on the stack */
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pushl %edx
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/* Set cr0 to a known state:
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* 31 0 == Paging disabled
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@ -113,8 +250,3 @@ relocate_new_kernel:
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xorl %edi, %edi
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xorl %ebp, %ebp
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ret
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relocate_new_kernel_end:
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.globl relocate_new_kernel_size
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relocate_new_kernel_size:
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.long relocate_new_kernel_end - relocate_new_kernel
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@ -1,6 +1,26 @@
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#ifndef _I386_KEXEC_H
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#define _I386_KEXEC_H
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#define PA_CONTROL_PAGE 0
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#define VA_CONTROL_PAGE 1
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#define PA_PGD 2
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#define VA_PGD 3
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#define PA_PTE_0 4
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#define VA_PTE_0 5
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#define PA_PTE_1 6
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#define VA_PTE_1 7
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#ifdef CONFIG_X86_PAE
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#define PA_PMD_0 8
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#define VA_PMD_0 9
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#define PA_PMD_1 10
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#define VA_PMD_1 11
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#define PAGES_NR 12
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#else
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#define PAGES_NR 8
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#endif
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#ifndef __ASSEMBLY__
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#include <asm/fixmap.h>
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#include <asm/ptrace.h>
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#include <asm/string.h>
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@ -72,5 +92,12 @@ static inline void crash_setup_regs(struct pt_regs *newregs,
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newregs->eip = (unsigned long)current_text_addr();
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}
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}
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asmlinkage NORET_TYPE void
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relocate_kernel(unsigned long indirection_page,
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unsigned long control_page,
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unsigned long start_address,
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unsigned int has_pae) ATTRIB_NORET;
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#endif /* __ASSEMBLY__ */
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#endif /* _I386_KEXEC_H */
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