drm/amd/powerplay: commit get_performance_level API as DAL needed
This can suppress the error reported on driver loading. Also these are empty APIs as Vega12/Vega20 has no performance levels. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2356,6 +2356,13 @@ static int vega12_gfx_off_control(struct pp_hwmgr *hwmgr, bool enable)
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return vega12_disable_gfx_off(hwmgr);
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}
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static int vega12_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,
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PHM_PerformanceLevelDesignation designation, uint32_t index,
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PHM_PerformanceLevel *level)
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{
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return 0;
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}
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static const struct pp_hwmgr_func vega12_hwmgr_funcs = {
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.backend_init = vega12_hwmgr_backend_init,
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.backend_fini = vega12_hwmgr_backend_fini,
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@ -2406,6 +2413,7 @@ static const struct pp_hwmgr_func vega12_hwmgr_funcs = {
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.register_irq_handlers = smu9_register_irq_handlers,
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.start_thermal_controller = vega12_start_thermal_controller,
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.powergate_gfx = vega12_gfx_off_control,
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.get_performance_level = vega12_get_performance_level,
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};
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int vega12_hwmgr_init(struct pp_hwmgr *hwmgr)
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@ -2041,6 +2041,13 @@ int vega20_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
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return result;
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}
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static int vega20_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,
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PHM_PerformanceLevelDesignation designation, uint32_t index,
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PHM_PerformanceLevel *level)
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{
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return 0;
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}
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static int vega20_notify_smc_display_config_after_ps_adjustment(
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struct pp_hwmgr *hwmgr)
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{
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@ -3487,6 +3494,8 @@ static const struct pp_hwmgr_func vega20_hwmgr_funcs = {
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vega20_set_watermarks_for_clocks_ranges,
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.display_clock_voltage_request =
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vega20_display_clock_voltage_request,
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.get_performance_level =
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vega20_get_performance_level,
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/* UMD pstate, profile related */
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.force_dpm_level =
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vega20_dpm_force_dpm_level,
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