dt-bindings: mtd: Convert ingenic,jz4780-nand.txt to YAML
Convert the ingenic,jz4780-nand.txt doc file to ingenic,nand.yaml. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Rob Herring <robh@kernel.org>
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* Ingenic JZ4780 NAND/ECC
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This file documents the device tree bindings for NAND flash devices on the
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JZ4780. NAND devices are connected to the NEMC controller (described in
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memory-controllers/ingenic,jz4780-nemc.txt), and thus NAND device nodes must
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be children of the NEMC node.
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Required NAND controller device properties:
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- compatible: Should be one of:
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* ingenic,jz4740-nand
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* ingenic,jz4725b-nand
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* ingenic,jz4780-nand
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- reg: For each bank with a NAND chip attached, should specify a bank number,
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an offset of 0 and a size of 0x1000000 (i.e. the whole NEMC bank).
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Optional NAND controller device properties:
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- ecc-engine: To make use of the hardware ECC controller, this
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property must contain a phandle for the ECC controller node. The required
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properties for this node are described below. If this is not specified,
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software ECC will be used instead.
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Optional children nodes:
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- Individual NAND chips are children of the NAND controller node.
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Required children node properties:
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- reg: An integer ranging from 1 to 6 representing the CS line to use.
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Optional children node properties:
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- nand-ecc-step-size: ECC block size in bytes.
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- nand-ecc-strength: ECC strength (max number of correctable bits).
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- nand-ecc-mode: String, operation mode of the NAND ecc mode. "hw" by default
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- nand-on-flash-bbt: boolean to enable on flash bbt option, if not present false
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- rb-gpios: GPIO specifier for the busy pin.
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- wp-gpios: GPIO specifier for the write protect pin.
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Optional child node of NAND chip nodes:
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- partitions: see Documentation/devicetree/bindings/mtd/partition.txt
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Example:
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nemc: nemc@13410000 {
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...
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nandc: nand-controller@1 {
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compatible = "ingenic,jz4780-nand";
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reg = <1 0 0x1000000>; /* Bank 1 */
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#address-cells = <1>;
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#size-cells = <0>;
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ecc-engine = <&bch>;
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nand@1 {
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reg = <1>;
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nand-ecc-step-size = <1024>;
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nand-ecc-strength = <24>;
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nand-ecc-mode = "hw";
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nand-on-flash-bbt;
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rb-gpios = <&gpa 20 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpf 22 GPIO_ACTIVE_LOW>;
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partitions {
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#address-cells = <2>;
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#size-cells = <2>;
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...
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}
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};
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};
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};
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The ECC controller is a separate SoC component used for error correction on
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NAND devices. The following is a description of the device properties for a
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ECC controller.
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Required ECC properties:
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- compatible: Should be one of:
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* ingenic,jz4740-ecc
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* ingenic,jz4725b-bch
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* ingenic,jz4780-bch
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- reg: Should specify the ECC controller registers location and length.
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- clocks: Clock for the ECC controller.
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Example:
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bch: bch@134d0000 {
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compatible = "ingenic,jz4780-bch";
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reg = <0x134d0000 0x10000>;
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clocks = <&cgu JZ4780_CLK_BCH>;
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};
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@ -0,0 +1,132 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mtd/ingenic,nand.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Ingenic SoCs NAND controller devicetree bindings
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maintainers:
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- Paul Cercueil <paul@crapouillou.net>
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allOf:
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- $ref: nand-controller.yaml#
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properties:
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compatible:
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enum:
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- ingenic,jz4740-nand
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- ingenic,jz4725b-nand
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- ingenic,jz4780-nand
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reg:
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items:
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- description: Bank number, offset and size of first attached NAND chip
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- description: Bank number, offset and size of second attached NAND chip
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- description: Bank number, offset and size of third attached NAND chip
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- description: Bank number, offset and size of fourth attached NAND chip
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minItems: 1
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ecc-engine: true
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partitions:
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type: object
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description:
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Node containing description of fixed partitions.
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See Documentation/devicetree/bindings/mtd/partition.txt
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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properties:
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rb-gpios:
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description: GPIO specifier for the busy pin.
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maxItems: 1
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wp-gpios:
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description: GPIO specifier for the write-protect pin.
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maxItems: 1
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required:
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- compatible
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- reg
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examples:
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- |
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#include <dt-bindings/clock/jz4780-cgu.h>
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memory-controller@13410000 {
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compatible = "ingenic,jz4780-nemc";
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reg = <0x13410000 0x10000>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <1 0 0x1b000000 0x1000000>,
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<2 0 0x1a000000 0x1000000>,
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<3 0 0x19000000 0x1000000>,
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<4 0 0x18000000 0x1000000>,
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<5 0 0x17000000 0x1000000>,
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<6 0 0x16000000 0x1000000>;
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clocks = <&cgu JZ4780_CLK_NEMC>;
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nand-controller@1 {
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compatible = "ingenic,jz4780-nand";
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reg = <1 0 0x1000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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ecc-engine = <&bch>;
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ingenic,nemc-tAS = <10>;
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ingenic,nemc-tAH = <5>;
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ingenic,nemc-tBP = <10>;
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ingenic,nemc-tAW = <15>;
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ingenic,nemc-tSTRV = <100>;
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pinctrl-names = "default";
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pinctrl-0 = <&pins_nemc>;
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nand@1 {
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reg = <1>;
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nand-ecc-step-size = <1024>;
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nand-ecc-strength = <24>;
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nand-ecc-mode = "hw";
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nand-on-flash-bbt;
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pinctrl-names = "default";
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pinctrl-0 = <&pins_nemc_cs1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <2>;
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#size-cells = <2>;
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partition@0 {
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label = "u-boot-spl";
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reg = <0x0 0x0 0x0 0x800000>;
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};
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partition@800000 {
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label = "u-boot";
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reg = <0x0 0x800000 0x0 0x200000>;
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};
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partition@a00000 {
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label = "u-boot-env";
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reg = <0x0 0xa00000 0x0 0x200000>;
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};
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partition@c00000 {
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label = "boot";
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reg = <0x0 0xc00000 0x0 0x4000000>;
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};
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partition@4c00000 {
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label = "system";
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reg = <0x0 0x4c00000 0x1 0xfb400000>;
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};
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};
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};
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};
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};
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