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m68knommu: add definitions for the third interrupt controller on devices that don't have a third interrupt controller. 

Extending the interrupt controller code in  intc-simr.c to support the third
interrupt controller on the m5441x means we need to add defines (as 0) for the
third interrupt controller on devices that don't have a third interrupt
controller.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Steven King 2012-06-08 14:15:29 -07:00 committed by Greg Ungerer
parent bea8bcb12d
commit 32234328e2
2 changed files with 6 additions and 0 deletions
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3
arch/m68k/include/asm/m520xsim.h
View File

@ -42,6 +42,9 @@
#define MCFINTC1_SIMR (0)
#define MCFINTC1_CIMR (0)
#define MCFINTC1_ICR0 (0)
#define MCFINTC2_SIMR (0)
#define MCFINTC2_CIMR (0)
#define MCFINTC2_ICR0 (0)
#define MCFINT_VECBASE 64
#define MCFINT_UART0 26 /* Interrupt number for UART0 */

3
arch/m68k/include/asm/m532xsim.h
View File

@ -82,6 +82,9 @@
#define MCFINTC1_SIMR 0xFC04C01C
#define MCFINTC1_CIMR 0xFC04C01D
#define MCFINTC1_ICR0 0xFC04C040
#define MCFINTC2_SIMR (0)
#define MCFINTC2_CIMR (0)
#define MCFINTC2_ICR0 (0)
#define MCFSIM_ICR_TIMER1 (0xFC048040+32)
#define MCFSIM_ICR_TIMER2 (0xFC048040+33)