x86: unify native_init_IRQ() in irqinit_{32,64}.c
Impact: cleanup Reviewed-by Cyrill Gorcunov <gorcunov@openvz.org> Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -22,7 +22,7 @@
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#include <asm/i8259.h>
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#include <asm/traps.h>
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#ifdef CONFIG_X86_32
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/*
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* Note that on a 486, we don't want to do a SIGFPE on an irq13
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* as the irq is unreliable, and exception 16 works correctly
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@ -52,6 +52,7 @@ static struct irqaction fpu_irq = {
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.handler = math_error_irq,
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.name = "fpu",
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};
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#endif
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/*
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* IRQ2 is cascade interrupt to second interrupt controller
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@ -155,24 +156,6 @@ static void __init smp_intr_init(void)
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#endif /* CONFIG_SMP */
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}
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/**
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* x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors
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*
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* Description:
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* Perform any necessary interrupt initialisation prior to setting up
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* the "ordinary" interrupt call gates. For legacy reasons, the ISA
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* interrupts should be initialised here if the machine emulates a PC
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* in any way.
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**/
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static void __init x86_quirk_pre_intr_init(void)
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{
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if (x86_quirks->arch_pre_intr_init) {
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if (x86_quirks->arch_pre_intr_init())
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return;
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}
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init_ISA_irqs();
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}
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static void __init apic_intr_init(void)
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{
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smp_intr_init();
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@ -195,12 +178,36 @@ static void __init apic_intr_init(void)
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#endif
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}
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#ifdef CONFIG_X86_32
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/**
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* x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors
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*
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* Description:
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* Perform any necessary interrupt initialisation prior to setting up
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* the "ordinary" interrupt call gates. For legacy reasons, the ISA
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* interrupts should be initialised here if the machine emulates a PC
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* in any way.
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**/
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static void __init x86_quirk_pre_intr_init(void)
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{
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if (x86_quirks->arch_pre_intr_init) {
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if (x86_quirks->arch_pre_intr_init())
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return;
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}
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init_ISA_irqs();
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}
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#endif
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void __init native_init_IRQ(void)
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{
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int i;
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#ifdef CONFIG_X86_32
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/* Execute any quirks before the call gates are initialised: */
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x86_quirk_pre_intr_init();
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#else
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init_ISA_irqs();
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#endif
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/*
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* Cover the whole vector space, no vector can escape
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@ -208,9 +215,15 @@ void __init native_init_IRQ(void)
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* 'special' SMP interrupts)
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*/
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for (i = FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) {
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#ifdef CONFIG_X86_32
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/* SYSCALL_VECTOR was reserved in trap_init. */
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if (i != SYSCALL_VECTOR)
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set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
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#else
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/* IA32_SYSCALL_VECTOR was reserved in trap_init. */
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if (i != IA32_SYSCALL_VECTOR)
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set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
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#endif
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}
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apic_intr_init();
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@ -218,6 +231,7 @@ void __init native_init_IRQ(void)
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if (!acpi_ioapic)
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setup_irq(2, &irq2);
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#ifdef CONFIG_X86_32
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/*
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* Call quirks after call gates are initialised (usually add in
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* the architecture specific gates):
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@ -232,4 +246,5 @@ void __init native_init_IRQ(void)
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setup_irq(FPU_IRQ, &fpu_irq);
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irq_ctx_init(smp_processor_id());
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#endif
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}
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@ -39,14 +39,46 @@
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* (these are usually mapped into the 0x30-0xff vector range)
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*/
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#ifdef CONFIG_X86_32
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/*
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* Note that on a 486, we don't want to do a SIGFPE on an irq13
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* as the irq is unreliable, and exception 16 works correctly
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* (ie as explained in the intel literature). On a 386, you
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* can't use exception 16 due to bad IBM design, so we have to
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* rely on the less exact irq13.
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*
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* Careful.. Not only is IRQ13 unreliable, but it is also
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* leads to races. IBM designers who came up with it should
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* be shot.
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*/
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static irqreturn_t math_error_irq(int cpl, void *dev_id)
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{
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outb(0, 0xF0);
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if (ignore_fpu_irq || !boot_cpu_data.hard_math)
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return IRQ_NONE;
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math_error((void __user *)get_irq_regs()->ip);
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return IRQ_HANDLED;
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}
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/*
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* New motherboards sometimes make IRQ 13 be a PCI interrupt,
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* so allow interrupt sharing.
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*/
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static struct irqaction fpu_irq = {
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.handler = math_error_irq,
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.name = "fpu",
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};
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#endif
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/*
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* IRQ2 is cascade interrupt to second interrupt controller
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*/
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static struct irqaction irq2 = {
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.handler = no_action,
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.name = "cascade",
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};
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DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
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[0 ... IRQ0_VECTOR - 1] = -1,
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[IRQ0_VECTOR] = 0,
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@ -158,11 +190,36 @@ static void __init apic_intr_init(void)
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alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
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}
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#ifdef CONFIG_X86_32
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/**
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* x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors
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*
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* Description:
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* Perform any necessary interrupt initialisation prior to setting up
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* the "ordinary" interrupt call gates. For legacy reasons, the ISA
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* interrupts should be initialised here if the machine emulates a PC
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* in any way.
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**/
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static void __init x86_quirk_pre_intr_init(void)
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{
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if (x86_quirks->arch_pre_intr_init) {
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if (x86_quirks->arch_pre_intr_init())
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return;
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}
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init_ISA_irqs();
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}
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#endif
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void __init native_init_IRQ(void)
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{
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int i;
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#ifdef CONFIG_X86_32
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/* Execute any quirks before the call gates are initialised: */
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x86_quirk_pre_intr_init();
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#else
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init_ISA_irqs();
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#endif
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/*
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* Cover the whole vector space, no vector can escape
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@ -170,13 +227,36 @@ void __init native_init_IRQ(void)
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* 'special' SMP interrupts)
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*/
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for (i = FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) {
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#ifdef CONFIG_X86_32
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/* SYSCALL_VECTOR was reserved in trap_init. */
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if (i != SYSCALL_VECTOR)
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set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
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#else
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/* IA32_SYSCALL_VECTOR was reserved in trap_init. */
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if (i != IA32_SYSCALL_VECTOR)
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set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
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#endif
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}
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apic_intr_init();
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if (!acpi_ioapic)
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setup_irq(2, &irq2);
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#ifdef CONFIG_X86_32
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/*
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* Call quirks after call gates are initialised (usually add in
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* the architecture specific gates):
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*/
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x86_quirk_intr_init();
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/*
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* External FPU? Set up irq13 if so, for
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* original braindamaged IBM FERR coupling.
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*/
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if (boot_cpu_data.hard_math && !cpu_has_fpu)
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setup_irq(FPU_IRQ, &fpu_irq);
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irq_ctx_init(smp_processor_id());
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#endif
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}
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