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arm64: dts: r8a7795: Add CAN support 

Adds CAN controller nodes for r8a7795.

Note: CAN channel register base address mentioned in R-Car Gen3 Hardware
User Manual v0.5E is incorrect. The corrected base addresses are:

CAN Channel 0 - 0xe6c30000
CAN Channel 1 - 0xe6c38000

Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Ramesh Shanmugasundaram 2016-02-29 14:22:39 +00:00 committed by Simon Horman
parent 7811482f0e
commit 308b7e4ba6
1 changed files with 30 additions and 0 deletions
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30
arch/arm64/boot/dts/renesas/r8a7795.dtsi
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@ -523,6 +523,36 @@
#size-cells = <0>; #size-cells = <0>;
}; };
can0: can@e6c30000 {
compatible = "renesas,can-r8a7795",
"renesas,rcar-gen3-can";
reg = <0 0xe6c30000 0 0x1000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 916>,
<&cpg CPG_CORE R8A7795_CLK_CANFD>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
assigned-clock-rates = <40000000>;
power-domains = <&cpg>;
status = "disabled";
};
can1: can@e6c38000 {
compatible = "renesas,can-r8a7795",
"renesas,rcar-gen3-can";
reg = <0 0xe6c38000 0 0x1000>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 915>,
<&cpg CPG_CORE R8A7795_CLK_CANFD>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
assigned-clock-rates = <40000000>;
power-domains = <&cpg>;
status = "disabled";
};
hscif0: serial@e6540000 { hscif0: serial@e6540000 {
compatible = "renesas,hscif-r8a7795", compatible = "renesas,hscif-r8a7795",
"renesas,rcar-gen3-hscif", "renesas,rcar-gen3-hscif",