hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

RISC-V: Move spinwait booting method to its own config 

The spinwait booting method should only be used for platforms with older
firmware without SBI HSM extension or M-mode firmware because spinwait
method can't support cpu hotplug, kexec or sparse hartid. It is better
to move the entire spinwait implementation to its own config which can
be disabled if required. It is enabled by default to maintain backward
compatibility and M-mode Linux.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Atish Patra 2022-01-20 01:09:17 -08:00 committed by Palmer Dabbelt
parent 0b39eb38f8
commit 2ffc48fc70
No known key found for this signature in database
GPG Key ID: 2E1319F35FBB1889
5 changed files with 30 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
arch/riscv/Kconfig
View File

@ -374,6 +374,20 @@ config RISCV_SBI_V01
This config allows kernel to use SBI v0.1 APIs. This will be
deprecated in future once legacy M-mode software are no longer in use.
config RISCV_BOOT_SPINWAIT
bool "Spinwait booting method"
depends on SMP
default y
help
This enables support for booting Linux via spinwait method. In the
spinwait method, all cores randomly jump to Linux. One of the cores
gets chosen via lottery and all other keep spinning on a percpu
variable. This method cannot support CPU hotplug and sparse hartid
scheme. It should be only enabled for M-mode Linux or platforms relying
on older firmware without SBI HSM extension. All other platforms should
rely on ordered booting via SBI HSM extension which gets chosen
dynamically at runtime if the firmware supports it.
config KEXEC
bool "Kexec system call"
select KEXEC_CORE

3
arch/riscv/kernel/Makefile
View File

@ -43,7 +43,8 @@ obj-$(CONFIG_FPU) += fpu.o
obj-$(CONFIG_SMP) += smpboot.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_SMP) += cpu_ops.o
obj-$(CONFIG_SMP) += cpu_ops_spinwait.o
obj-$(CONFIG_RISCV_BOOT_SPINWAIT) += cpu_ops_spinwait.o
obj-$(CONFIG_MODULES) += module.o
obj-$(CONFIG_MODULE_SECTIONS) += module-sections.o

8
arch/riscv/kernel/cpu_ops.c
View File

@ -15,7 +15,15 @@
const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init;
extern const struct cpu_operations cpu_ops_sbi;
#ifdef CONFIG_RISCV_BOOT_SPINWAIT
extern const struct cpu_operations cpu_ops_spinwait;
#else
const struct cpu_operations cpu_ops_spinwait = {
.name = "",
.cpu_prepare = NULL,
.cpu_start = NULL,
};
#endif
void __init cpu_set_ops(int cpuid)
{

8
arch/riscv/kernel/head.S
View File

@ -259,7 +259,7 @@ pmp_done:
li t0, SR_FS
csrc CSR_STATUS, t0
#ifdef CONFIG_SMP
#ifdef CONFIG_RISCV_BOOT_SPINWAIT
li t0, CONFIG_NR_CPUS
blt a0, t0, .Lgood_cores
tail .Lsecondary_park
@ -285,7 +285,7 @@ pmp_done:
beq t0, t1, .Lsecondary_start
#endif /* CONFIG_XIP */
#endif /* CONFIG_SMP */
#endif /* CONFIG_RISCV_BOOT_SPINWAIT */
#ifdef CONFIG_XIP_KERNEL
la sp, _end + THREAD_SIZE
@ -344,7 +344,7 @@ clear_bss_done:
call soc_early_init
tail start_kernel
#ifdef CONFIG_SMP
#if CONFIG_RISCV_BOOT_SPINWAIT
.Lsecondary_start:
/* Set trap vector to spin forever to help debug */
la a3, .Lsecondary_park
@ -371,7 +371,7 @@ clear_bss_done:
fence
tail .Lsecondary_start_common
#endif
#endif /* CONFIG_RISCV_BOOT_SPINWAIT */
END(_start_kernel)

2
arch/riscv/kernel/head.h
View File

@ -16,7 +16,9 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa);
asmlinkage void __init __copy_data(void);
#endif
#ifdef CONFIG_RISCV_BOOT_SPINWAIT
extern void *__cpu_spinwait_stack_pointer[];
extern void *__cpu_spinwait_task_pointer[];
#endif
#endif /* __ASM_HEAD_H */