PCI: augment bus resource table with a list
Previously we used a table of size PCI_BUS_NUM_RESOURCES (16) for resources forwarded to a bus by its upstream bridge. We've increased this size several times when the table overflowed. But there's no good limit on the number of resources because host bridges and subtractive decode bridges can forward any number of ranges to their secondary buses. This patch reduces the table to only PCI_BRIDGE_RESOURCE_NUM (4) entries, which corresponds to the number of windows a PCI-to-PCI (3) or CardBus (4) bridge can positively decode. Any additional resources, e.g., PCI host bridge windows or subtractively-decoded regions, are kept in a list. I'd prefer a single list rather than this split table/list approach, but that requires simultaneous changes to every architecture. This approach only requires immediate changes where we set up (a) host bridges with more than four windows and (b) subtractive-decode P2P bridges, and we can incrementally change other architectures to use the list. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -320,9 +320,9 @@ static __devinit acpi_status add_window(struct acpi_resource *res, void *data)
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static void __devinit
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pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl)
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{
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int i, j;
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int i;
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j = 0;
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pci_bus_remove_resources(bus);
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for (i = 0; i < ctrl->windows; i++) {
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struct resource *res = &ctrl->window[i].resource;
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/* HP's firmware has a hack to work around a Windows bug.
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@ -330,13 +330,7 @@ pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl)
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if ((res->flags & IORESOURCE_MEM) &&
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(res->end - res->start < 16))
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continue;
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if (j >= PCI_BUS_NUM_RESOURCES) {
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dev_warn(&bus->dev,
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"ignoring host bridge window %pR (no space)\n",
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res);
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continue;
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}
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bus->resource[j++] = res;
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pci_bus_add_resource(bus, res, 0);
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}
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}
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@ -45,20 +45,6 @@ count_resource(struct acpi_resource *acpi_res, void *data)
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return AE_OK;
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}
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static int
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bus_has_transparent_bridge(struct pci_bus *bus)
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{
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struct pci_dev *dev;
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list_for_each_entry(dev, &bus->devices, bus_list) {
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u16 class = dev->class >> 8;
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if (class == PCI_CLASS_BRIDGE_PCI && dev->transparent)
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return true;
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}
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return false;
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}
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static void
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align_resource(struct acpi_device *bridge, struct resource *res)
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{
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@ -92,12 +78,8 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
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acpi_status status;
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unsigned long flags;
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struct resource *root;
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int max_root_bus_resources = PCI_BUS_NUM_RESOURCES;
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u64 start, end;
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if (bus_has_transparent_bridge(info->bus))
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max_root_bus_resources -= 3;
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status = resource_to_addr(acpi_res, &addr);
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if (!ACPI_SUCCESS(status))
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return AE_OK;
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@ -115,15 +97,6 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
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start = addr.minimum + addr.translation_offset;
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end = start + addr.address_length - 1;
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if (info->res_num >= max_root_bus_resources) {
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if (pci_probe & PCI_USE__CRS)
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printk(KERN_WARNING "PCI: Failed to allocate "
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"0x%lx-0x%lx from %s for %s due to _CRS "
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"returning more than %d resource descriptors\n",
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(unsigned long) start, (unsigned long) end,
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root->name, info->name, max_root_bus_resources);
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return AE_OK;
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}
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res = &info->res[info->res_num];
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res->name = info->name;
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@ -143,7 +116,7 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
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dev_err(&info->bridge->dev,
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"can't allocate host bridge window %pR\n", res);
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} else {
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info->bus->resource[info->res_num] = res;
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pci_bus_add_resource(info->bus, res, 0);
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info->res_num++;
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if (addr.translation_offset)
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dev_info(&info->bridge->dev, "host bridge window %pR "
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@ -164,7 +137,9 @@ get_current_resources(struct acpi_device *device, int busnum,
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struct pci_root_info info;
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size_t size;
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if (!(pci_probe & PCI_USE__CRS))
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if (pci_probe & PCI_USE__CRS)
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pci_bus_remove_resources(bus);
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else
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dev_info(&device->dev,
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"ignoring host bridge windows from ACPI; "
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"boot with \"pci=use_crs\" to use them\n");
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@ -36,13 +36,14 @@ void x86_pci_root_bus_res_quirks(struct pci_bus *b)
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printk(KERN_DEBUG "PCI: peer root bus %02x res updated from pci conf\n",
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b->number);
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pci_bus_remove_resources(b);
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info = &pci_root_info[i];
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for (j = 0; j < info->res_num; j++) {
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struct resource *res;
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struct resource *root;
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res = &info->res[j];
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b->resource[j] = res;
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pci_bus_add_resource(b, res, 0);
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if (res->flags & IORESOURCE_IO)
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root = &ioport_resource;
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else
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@ -2,8 +2,7 @@
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/*
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* sub bus (transparent) will use entres from 3 to store extra from
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* root, so need to make sure we have enough slot there, Should we
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* increase PCI_BUS_NUM_RESOURCES?
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* root, so need to make sure we have enough slot there.
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*/
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#define RES_NUM 16
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struct pci_root_info {
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@ -17,6 +17,52 @@
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#include "pci.h"
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void pci_bus_add_resource(struct pci_bus *bus, struct resource *res,
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unsigned int flags)
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{
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struct pci_bus_resource *bus_res;
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bus_res = kzalloc(sizeof(struct pci_bus_resource), GFP_KERNEL);
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if (!bus_res) {
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dev_err(&bus->dev, "can't add %pR resource\n", res);
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return;
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}
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bus_res->res = res;
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bus_res->flags = flags;
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list_add_tail(&bus_res->list, &bus->resources);
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}
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struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n)
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{
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struct pci_bus_resource *bus_res;
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if (n < PCI_BRIDGE_RESOURCE_NUM)
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return bus->resource[n];
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n -= PCI_BRIDGE_RESOURCE_NUM;
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list_for_each_entry(bus_res, &bus->resources, list) {
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if (n-- == 0)
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return bus_res->res;
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}
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return NULL;
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}
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EXPORT_SYMBOL_GPL(pci_bus_resource_n);
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void pci_bus_remove_resources(struct pci_bus *bus)
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{
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struct pci_bus_resource *bus_res, *tmp;
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int i;
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for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++)
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bus->resource[i] = 0;
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list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) {
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list_del(&bus_res->list);
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kfree(bus_res);
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}
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}
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/**
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* pci_bus_alloc_resource - allocate a resource from a parent bus
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* @bus: PCI bus
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@ -89,6 +89,7 @@ static void release_pcibus_dev(struct device *dev)
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if (pci_bus->bridge)
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put_device(pci_bus->bridge);
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pci_bus_remove_resources(pci_bus);
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kfree(pci_bus);
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}
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@ -394,6 +395,7 @@ static void __devinit pci_read_bridge_mmio_pref(struct pci_bus *child)
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void __devinit pci_read_bridge_bases(struct pci_bus *child)
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{
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struct pci_dev *dev = child->self;
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struct resource *res;
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int i;
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if (pci_is_root_bus(child)) /* It's a host bus, nothing to read */
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@ -403,17 +405,23 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
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child->secondary, child->subordinate,
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dev->transparent ? " (subtractive decode)" : "");
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pci_bus_remove_resources(child);
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for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++)
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child->resource[i] = &dev->resource[PCI_BRIDGE_RESOURCES+i];
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pci_read_bridge_io(child);
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pci_read_bridge_mmio(child);
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pci_read_bridge_mmio_pref(child);
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if (dev->transparent) {
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for (i = 3; i < PCI_BUS_NUM_RESOURCES; i++) {
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child->resource[i] = child->parent->resource[i - 3];
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if (child->resource[i])
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pci_bus_for_each_resource(child->parent, res, i) {
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if (res) {
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pci_bus_add_resource(child, res,
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PCI_SUBTRACTIVE_DECODE);
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dev_printk(KERN_DEBUG, &dev->dev,
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" bridge window %pR (subtractive decode)\n",
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child->resource[i]);
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res);
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}
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}
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}
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}
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@ -428,6 +436,7 @@ static struct pci_bus * pci_alloc_bus(void)
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INIT_LIST_HEAD(&b->children);
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INIT_LIST_HEAD(&b->devices);
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INIT_LIST_HEAD(&b->slots);
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INIT_LIST_HEAD(&b->resources);
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b->max_bus_speed = PCI_SPEED_UNKNOWN;
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b->cur_bus_speed = PCI_SPEED_UNKNOWN;
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}
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@ -364,9 +364,26 @@ static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
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hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
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}
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#ifndef PCI_BUS_NUM_RESOURCES
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#define PCI_BUS_NUM_RESOURCES 16
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#endif
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/*
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* The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond
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* to P2P or CardBus bridge windows) go in a table. Additional ones (for
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* buses below host bridges or subtractive decode bridges) go in the list.
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* Use pci_bus_for_each_resource() to iterate through all the resources.
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*/
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/*
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* PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly
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* and there's no way to program the bridge with the details of the window.
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* This does not apply to ACPI _CRS windows, even with the _DEC subtractive-
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* decode bit set, because they are explicit and can be programmed with _SRS.
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*/
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#define PCI_SUBTRACTIVE_DECODE 0x1
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struct pci_bus_resource {
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struct list_head list;
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struct resource *res;
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unsigned int flags;
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};
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#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
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struct list_head devices; /* list of devices on this bus */
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struct pci_dev *self; /* bridge device as seen by parent */
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struct list_head slots; /* list of slots on this bus */
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struct resource *resource[PCI_BUS_NUM_RESOURCES];
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/* address space routed to this bus */
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struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
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struct list_head resources; /* address space routed to this bus */
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struct pci_ops *ops; /* configuration access functions */
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void *sysdata; /* hook for sys-specific extension */
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void pci_release_selected_regions(struct pci_dev *, int);
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/* drivers/pci/bus.c */
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void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags);
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struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
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void pci_bus_remove_resources(struct pci_bus *bus);
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#define pci_bus_for_each_resource(bus, res, i) \
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for (i = 0; res = bus->resource[i], i < PCI_BUS_NUM_RESOURCES; i++)
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for (i = 0; \
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(res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \
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i++)
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int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
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struct resource *res, resource_size_t size,
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