net: dsa: mv88e6xxx: expose switch time as a PTP hardware clock
This patch adds basic support for exposing the 32-bit timestamp counter inside the mv88e6xxx switch as a ptp_clock. Adjfine implemented by Richard Cochran. Andrew Lunn: fix return value of PTP stub function. Signed-off-by: Brandon Streiff <brandon.streiff@ni.com> Signed-off-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
0d632c3d6f
commit
2fa8d3af4b
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@ -18,3 +18,13 @@ config NET_DSA_MV88E6XXX_GLOBAL2
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It is required on most chips. If the chip you compile the support for
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doesn't have such registers set, say N here. In doubt, say Y.
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config NET_DSA_MV88E6XXX_PTP
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bool "PTP support for Marvell 88E6xxx"
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default n
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depends on NET_DSA_MV88E6XXX_GLOBAL2
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imply NETWORK_PHY_TIMESTAMPING
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imply PTP_1588_CLOCK
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help
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Say Y to enable PTP hardware timestamping on Marvell 88E6xxx switch
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chips that support it.
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@ -8,4 +8,5 @@ mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_GLOBAL2) += global2.o
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mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_GLOBAL2) += global2_avb.o
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mv88e6xxx-objs += phy.o
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mv88e6xxx-objs += port.o
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mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_PTP) += ptp.o
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mv88e6xxx-objs += serdes.o
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@ -38,6 +38,7 @@
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#include "global2.h"
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#include "phy.h"
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#include "port.h"
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#include "ptp.h"
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#include "serdes.h"
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static void assert_reg_lock(struct mv88e6xxx_chip *chip)
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@ -2092,6 +2093,13 @@ static int mv88e6xxx_setup(struct dsa_switch *ds)
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if (err)
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goto unlock;
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/* Setup PTP Hardware Clock */
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if (chip->info->ptp_support) {
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err = mv88e6xxx_ptp_setup(chip);
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if (err)
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goto unlock;
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}
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unlock:
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mutex_unlock(&chip->reg_lock);
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@ -3484,6 +3492,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
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.pvt = true,
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.multi_chip = true,
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.tag_protocol = DSA_TAG_PROTO_DSA,
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.ptp_support = true,
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.ops = &mv88e6191_ops,
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},
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@ -3504,6 +3513,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
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.pvt = true,
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.multi_chip = true,
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.tag_protocol = DSA_TAG_PROTO_EDSA,
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.ptp_support = true,
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.ops = &mv88e6240_ops,
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},
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@ -3524,6 +3534,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
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.pvt = true,
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.multi_chip = true,
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.tag_protocol = DSA_TAG_PROTO_DSA,
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.ptp_support = true,
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.ops = &mv88e6290_ops,
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},
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@ -3543,6 +3554,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
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.pvt = true,
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.multi_chip = true,
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.tag_protocol = DSA_TAG_PROTO_EDSA,
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.ptp_support = true,
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.ops = &mv88e6320_ops,
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},
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@ -3561,6 +3573,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
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.atu_move_port_mask = 0xf,
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.multi_chip = true,
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.tag_protocol = DSA_TAG_PROTO_EDSA,
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.ptp_support = true,
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.ops = &mv88e6321_ops,
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},
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@ -3580,6 +3593,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
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.pvt = true,
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.multi_chip = true,
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.tag_protocol = DSA_TAG_PROTO_EDSA,
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.ptp_support = true,
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.ops = &mv88e6341_ops,
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},
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@ -3640,6 +3654,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
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.pvt = true,
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.multi_chip = true,
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.tag_protocol = DSA_TAG_PROTO_EDSA,
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.ptp_support = true,
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.ops = &mv88e6352_ops,
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},
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[MV88E6390] = {
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@ -3659,6 +3674,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
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.pvt = true,
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.multi_chip = true,
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.tag_protocol = DSA_TAG_PROTO_DSA,
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.ptp_support = true,
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.ops = &mv88e6390_ops,
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},
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[MV88E6390X] = {
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@ -3678,6 +3694,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
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.pvt = true,
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.multi_chip = true,
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.tag_protocol = DSA_TAG_PROTO_DSA,
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.ptp_support = true,
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.ops = &mv88e6390x_ops,
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},
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};
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@ -4031,6 +4048,9 @@ static void mv88e6xxx_remove(struct mdio_device *mdiodev)
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struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev);
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struct mv88e6xxx_chip *chip = ds->priv;
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if (chip->info->ptp_support)
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mv88e6xxx_ptp_free(chip);
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mv88e6xxx_phy_destroy(chip);
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mv88e6xxx_unregister_switch(chip);
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mv88e6xxx_mdios_unregister(chip);
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@ -16,6 +16,8 @@
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#include <linux/irq.h>
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#include <linux/gpio/consumer.h>
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#include <linux/phy.h>
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#include <linux/ptp_clock_kernel.h>
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#include <linux/timecounter.h>
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#include <net/dsa.h>
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#ifndef UINT64_MAX
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@ -126,6 +128,9 @@ struct mv88e6xxx_info {
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*/
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u8 atu_move_port_mask;
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const struct mv88e6xxx_ops *ops;
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/* Supports PTP */
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bool ptp_support;
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};
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struct mv88e6xxx_atu_entry {
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@ -210,6 +215,16 @@ struct mv88e6xxx_chip {
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int watchdog_irq;
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int atu_prob_irq;
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int vtu_prob_irq;
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/* This cyclecounter abstracts the switch PTP time.
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* reg_lock must be held for any operation that read()s.
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*/
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struct cyclecounter tstamp_cc;
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struct timecounter tstamp_tc;
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struct delayed_work overflow_work;
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struct ptp_clock *ptp_clock;
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struct ptp_clock_info ptp_clock_info;
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};
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struct mv88e6xxx_bus_ops {
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@ -0,0 +1,197 @@
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/*
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* Marvell 88E6xxx Switch PTP support
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*
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* Copyright (c) 2008 Marvell Semiconductor
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*
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* Copyright (c) 2017 National Instruments
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* Erik Hons <erik.hons@ni.com>
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* Brandon Streiff <brandon.streiff@ni.com>
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* Dane Wagner <dane.wagner@ni.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include "chip.h"
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#include "global2.h"
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#include "ptp.h"
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/* Raw timestamps are in units of 8-ns clock periods. */
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#define CC_SHIFT 28
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#define CC_MULT (8 << CC_SHIFT)
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#define CC_MULT_NUM (1 << 9)
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#define CC_MULT_DEM 15625ULL
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#define TAI_EVENT_WORK_INTERVAL msecs_to_jiffies(100)
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#define cc_to_chip(cc) container_of(cc, struct mv88e6xxx_chip, tstamp_cc)
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#define ptp_to_chip(ptp) container_of(ptp, struct mv88e6xxx_chip, \
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ptp_clock_info)
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#define dw_overflow_to_chip(dw) container_of(dw, struct mv88e6xxx_chip, \
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overflow_work)
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static int mv88e6xxx_tai_read(struct mv88e6xxx_chip *chip, int addr,
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u16 *data, int len)
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{
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if (!chip->info->ops->avb_ops->tai_read)
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return -EOPNOTSUPP;
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return chip->info->ops->avb_ops->tai_read(chip, addr, data, len);
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}
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static u64 mv88e6xxx_ptp_clock_read(const struct cyclecounter *cc)
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{
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struct mv88e6xxx_chip *chip = cc_to_chip(cc);
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u16 phc_time[2];
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int err;
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err = mv88e6xxx_tai_read(chip, MV88E6XXX_TAI_TIME_LO, phc_time,
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ARRAY_SIZE(phc_time));
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if (err)
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return 0;
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else
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return ((u32)phc_time[1] << 16) | phc_time[0];
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}
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static int mv88e6xxx_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
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{
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struct mv88e6xxx_chip *chip = ptp_to_chip(ptp);
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int neg_adj = 0;
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u32 diff, mult;
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u64 adj;
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if (scaled_ppm < 0) {
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neg_adj = 1;
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scaled_ppm = -scaled_ppm;
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}
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mult = CC_MULT;
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adj = CC_MULT_NUM;
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adj *= scaled_ppm;
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diff = div_u64(adj, CC_MULT_DEM);
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mutex_lock(&chip->reg_lock);
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timecounter_read(&chip->tstamp_tc);
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chip->tstamp_cc.mult = neg_adj ? mult - diff : mult + diff;
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mutex_unlock(&chip->reg_lock);
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return 0;
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}
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static int mv88e6xxx_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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struct mv88e6xxx_chip *chip = ptp_to_chip(ptp);
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mutex_lock(&chip->reg_lock);
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timecounter_adjtime(&chip->tstamp_tc, delta);
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mutex_unlock(&chip->reg_lock);
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return 0;
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}
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static int mv88e6xxx_ptp_gettime(struct ptp_clock_info *ptp,
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struct timespec64 *ts)
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{
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struct mv88e6xxx_chip *chip = ptp_to_chip(ptp);
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u64 ns;
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mutex_lock(&chip->reg_lock);
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ns = timecounter_read(&chip->tstamp_tc);
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mutex_unlock(&chip->reg_lock);
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*ts = ns_to_timespec64(ns);
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return 0;
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}
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static int mv88e6xxx_ptp_settime(struct ptp_clock_info *ptp,
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const struct timespec64 *ts)
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{
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struct mv88e6xxx_chip *chip = ptp_to_chip(ptp);
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u64 ns;
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ns = timespec64_to_ns(ts);
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mutex_lock(&chip->reg_lock);
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timecounter_init(&chip->tstamp_tc, &chip->tstamp_cc, ns);
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mutex_unlock(&chip->reg_lock);
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return 0;
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}
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static int mv88e6xxx_ptp_enable(struct ptp_clock_info *ptp,
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struct ptp_clock_request *rq, int on)
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{
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return -EOPNOTSUPP;
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}
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static int mv88e6xxx_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,
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enum ptp_pin_function func, unsigned int chan)
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{
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return -EOPNOTSUPP;
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}
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/* With a 125MHz input clock, the 32-bit timestamp counter overflows in ~34.3
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* seconds; this task forces periodic reads so that we don't miss any.
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*/
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#define MV88E6XXX_TAI_OVERFLOW_PERIOD (HZ * 16)
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static void mv88e6xxx_ptp_overflow_check(struct work_struct *work)
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{
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struct delayed_work *dw = to_delayed_work(work);
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struct mv88e6xxx_chip *chip = dw_overflow_to_chip(dw);
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struct timespec64 ts;
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mv88e6xxx_ptp_gettime(&chip->ptp_clock_info, &ts);
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schedule_delayed_work(&chip->overflow_work,
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MV88E6XXX_TAI_OVERFLOW_PERIOD);
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}
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int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip)
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{
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/* Set up the cycle counter */
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memset(&chip->tstamp_cc, 0, sizeof(chip->tstamp_cc));
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chip->tstamp_cc.read = mv88e6xxx_ptp_clock_read;
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chip->tstamp_cc.mask = CYCLECOUNTER_MASK(32);
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chip->tstamp_cc.mult = CC_MULT;
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chip->tstamp_cc.shift = CC_SHIFT;
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timecounter_init(&chip->tstamp_tc, &chip->tstamp_cc,
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ktime_to_ns(ktime_get_real()));
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INIT_DELAYED_WORK(&chip->overflow_work, mv88e6xxx_ptp_overflow_check);
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chip->ptp_clock_info.owner = THIS_MODULE;
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snprintf(chip->ptp_clock_info.name, sizeof(chip->ptp_clock_info.name),
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dev_name(chip->dev));
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chip->ptp_clock_info.max_adj = 1000000;
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chip->ptp_clock_info.adjfine = mv88e6xxx_ptp_adjfine;
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chip->ptp_clock_info.adjtime = mv88e6xxx_ptp_adjtime;
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chip->ptp_clock_info.gettime64 = mv88e6xxx_ptp_gettime;
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chip->ptp_clock_info.settime64 = mv88e6xxx_ptp_settime;
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chip->ptp_clock_info.enable = mv88e6xxx_ptp_enable;
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chip->ptp_clock_info.verify = mv88e6xxx_ptp_verify;
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chip->ptp_clock = ptp_clock_register(&chip->ptp_clock_info, chip->dev);
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if (IS_ERR(chip->ptp_clock))
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return PTR_ERR(chip->ptp_clock);
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schedule_delayed_work(&chip->overflow_work,
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MV88E6XXX_TAI_OVERFLOW_PERIOD);
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return 0;
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}
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void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip)
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{
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if (chip->ptp_clock) {
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cancel_delayed_work_sync(&chip->overflow_work);
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ptp_clock_unregister(chip->ptp_clock);
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chip->ptp_clock = NULL;
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}
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}
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@ -0,0 +1,83 @@
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/*
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* Marvell 88E6xxx Switch PTP support
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*
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* Copyright (c) 2008 Marvell Semiconductor
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*
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* Copyright (c) 2017 National Instruments
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* Erik Hons <erik.hons@ni.com>
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* Brandon Streiff <brandon.streiff@ni.com>
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* Dane Wagner <dane.wagner@ni.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef _MV88E6XXX_PTP_H
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#define _MV88E6XXX_PTP_H
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#include "chip.h"
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/* Offset 0x00: TAI Global Config */
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#define MV88E6XXX_TAI_CFG 0x00
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/* Offset 0x01: Timestamp Clock Period (ps) */
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#define MV88E6XXX_TAI_CLOCK_PERIOD 0x01
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/* Offset 0x02/0x03: Trigger Generation Amount */
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#define MV88E6XXX_TAI_TRIG_GEN_AMOUNT_LO 0x02
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#define MV88E6XXX_TAI_TRIG_GEN_AMOUNT_HI 0x03
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/* Offset 0x04: Clock Compensation */
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#define MV88E6XXX_TAI_TRIG_CLOCK_COMP 0x04
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/* Offset 0x05: Trigger Configuration */
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#define MV88E6XXX_TAI_TRIG_CFG 0x05
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/* Offset 0x06: Ingress Rate Limiter Clock Generation Amount */
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#define MV88E6XXX_TAI_IRL_AMOUNT 0x06
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/* Offset 0x07: Ingress Rate Limiter Compensation */
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#define MV88E6XXX_TAI_IRL_COMP 0x07
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/* Offset 0x08: Ingress Rate Limiter Compensation */
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#define MV88E6XXX_TAI_IRL_COMP_PS 0x08
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/* Offset 0x09: Event Status */
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#define MV88E6XXX_TAI_EVENT_STATUS 0x09
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/* Offset 0x0A/0x0B: Event Time */
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#define MV88E6XXX_TAI_EVENT_TIME_LO 0x0a
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#define MV88E6XXX_TAI_EVENT_TYPE_HI 0x0b
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/* Offset 0x0E/0x0F: PTP Global Time */
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#define MV88E6XXX_TAI_TIME_LO 0x0e
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#define MV88E6XXX_TAI_TIME_HI 0x0f
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/* Offset 0x10/0x11: Trig Generation Time */
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#define MV88E6XXX_TAI_TRIG_TIME_LO 0x10
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#define MV88E6XXX_TAI_TRIG_TIME_HI 0x11
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/* Offset 0x12: Lock Status */
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#define MV88E6XXX_TAI_LOCK_STATUS 0x12
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#ifdef CONFIG_NET_DSA_MV88E6XXX_PTP
|
||||
|
||||
int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip);
|
||||
void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip);
|
||||
|
||||
#else /* !CONFIG_NET_DSA_MV88E6XXX_PTP */
|
||||
|
||||
static inline int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip)
|
||||
{
|
||||
}
|
||||
|
||||
#endif /* CONFIG_NET_DSA_MV88E6XXX_PTP */
|
||||
|
||||
#endif /* _MV88E6XXX_PTP_H */
|
Loading…
Reference in New Issue