hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

arm/tegra: pcie: fix return value of function 

In previous patch (arm/tegra: add timeout to PCIe PLL lock detection loop)
tegra_pcie_enable_controller() function type has been changed from
void to int, but the last return statement wasn't converted, so
function returns undefined value. Fix it.

Also while at it, address couple of minor concerns raised by reviewers:
use usleep_range for delay, and lower the value of timeout to 300ms
to be consistent with Nvidia Vibrante kernel.

Signed-off-by: Dmitry Artamonow <mad_soft@inbox.ru>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Dmitry Artamonow 2012-03-13 09:46:27 +04:00 committed by Olof Johansson
parent 795d5fd4b8
commit 2f926eecdf
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/mach-tegra/pcie.c
View File

@ -639,10 +639,10 @@ static int tegra_pcie_enable_controller(void)
pads_writel(0xfa5cfa5c, 0xc8);
/* Wait for the PLL to lock */
timeout = 2000;
timeout = 300;
do {
val = pads_readl(PADS_PLL_CTL);
mdelay(1);
usleep_range(1000, 1000);
if (--timeout == 0) {
pr_err("Tegra PCIe error: timeout waiting for PLL\n");
return -EBUSY;
@ -677,7 +677,7 @@ static int tegra_pcie_enable_controller(void)
/* Disable all execptions */
afi_writel(0, AFI_FPCI_ERROR_MASKS);
return;
return 0;
}
static void tegra_pcie_xclk_clamp(bool clamp)