[PATCH] v4l: 719: implement some differences in video output port
- Implement some differences in video output port Signed-off-by: Robert W. Boone <rboone@rtd.com> Signed-off-by: Nickolay V. Shmyrev <nshmyrev@yandex.ru> Signed-off-by: Mauro Carvalho Chehab <mchehab@brturbo.com.br> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -2285,6 +2285,10 @@ struct saa7134_board saa7134_boards[] = {
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}},
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}},
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.mpeg = SAA7134_MPEG_EMPRESS,
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.mpeg = SAA7134_MPEG_EMPRESS,
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.video_out = CCIR656,
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.video_out = CCIR656,
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.vid_port_opts = ( SET_T_CODE_POLARITY_NON_INVERTED |
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SET_CLOCK_NOT_DELAYED |
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SET_CLOCK_INVERTED |
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SET_VSYNC_OFF ),
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},
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},
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[SAA7134_BOARD_RTD_VFG7330] = {
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[SAA7134_BOARD_RTD_VFG7330] = {
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.name = "RTD Embedded Technologies VFG7330",
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.name = "RTD Embedded Technologies VFG7330",
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@ -47,6 +47,43 @@ MODULE_PARM_DESC(noninterlaced,"video input is noninterlaced");
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#define dprintk(fmt, arg...) if (video_debug) \
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#define dprintk(fmt, arg...) if (video_debug) \
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printk(KERN_DEBUG "%s/video: " fmt, dev->name , ## arg)
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printk(KERN_DEBUG "%s/video: " fmt, dev->name , ## arg)
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/* ------------------------------------------------------------------ */
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/* Defines for Video Output Port Register at address 0x191 */
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/* Bit 0: VIP code T bit polarity */
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#define VP_T_CODE_P_NON_INVERTED 0x00
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#define VP_T_CODE_P_INVERTED 0x01
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/* ------------------------------------------------------------------ */
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/* Defines for Video Output Port Register at address 0x195 */
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/* Bit 2: Video output clock delay control */
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#define VP_CLK_CTRL2_NOT_DELAYED 0x00
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#define VP_CLK_CTRL2_DELAYED 0x04
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/* Bit 1: Video output clock invert control */
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#define VP_CLK_CTRL1_NON_INVERTED 0x00
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#define VP_CLK_CTRL1_INVERTED 0x02
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/* ------------------------------------------------------------------ */
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/* Defines for Video Output Port Register at address 0x196 */
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/* Bits 2 to 0: VSYNC pin video vertical sync type */
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#define VP_VS_TYPE_MASK 0x07
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#define VP_VS_TYPE_OFF 0x00
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#define VP_VS_TYPE_V123 0x01
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#define VP_VS_TYPE_V_ITU 0x02
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#define VP_VS_TYPE_VGATE_L 0x03
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#define VP_VS_TYPE_RESERVED1 0x04
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#define VP_VS_TYPE_RESERVED2 0x05
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#define VP_VS_TYPE_F_ITU 0x06
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#define VP_VS_TYPE_SC_FID 0x07
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/* ------------------------------------------------------------------ */
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/* ------------------------------------------------------------------ */
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/* data structs for video */
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/* data structs for video */
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@ -2294,13 +2331,28 @@ int saa7134_video_init1(struct saa7134_dev *dev)
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if (saa7134_boards[dev->board].video_out) {
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if (saa7134_boards[dev->board].video_out) {
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/* enable video output */
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/* enable video output */
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int vo = saa7134_boards[dev->board].video_out;
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int vo = saa7134_boards[dev->board].video_out;
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int video_reg;
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unsigned int vid_port_opts = saa7134_boards[dev->board].vid_port_opts;
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saa_writeb(SAA7134_VIDEO_PORT_CTRL0, video_out[vo][0]);
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saa_writeb(SAA7134_VIDEO_PORT_CTRL0, video_out[vo][0]);
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saa_writeb(SAA7134_VIDEO_PORT_CTRL1, video_out[vo][1]);
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video_reg = video_out[vo][1];
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if (vid_port_opts & SET_T_CODE_POLARITY_NON_INVERTED)
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video_reg &= ~VP_T_CODE_P_INVERTED;
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saa_writeb(SAA7134_VIDEO_PORT_CTRL1, video_reg);
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saa_writeb(SAA7134_VIDEO_PORT_CTRL2, video_out[vo][2]);
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saa_writeb(SAA7134_VIDEO_PORT_CTRL2, video_out[vo][2]);
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saa_writeb(SAA7134_VIDEO_PORT_CTRL3, video_out[vo][3]);
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saa_writeb(SAA7134_VIDEO_PORT_CTRL3, video_out[vo][3]);
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saa_writeb(SAA7134_VIDEO_PORT_CTRL4, video_out[vo][4]);
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saa_writeb(SAA7134_VIDEO_PORT_CTRL4, video_out[vo][4]);
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saa_writeb(SAA7134_VIDEO_PORT_CTRL5, video_out[vo][5]);
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video_reg = video_out[vo][5];
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saa_writeb(SAA7134_VIDEO_PORT_CTRL6, video_out[vo][6]);
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if (vid_port_opts & SET_CLOCK_NOT_DELAYED)
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video_reg &= ~VP_CLK_CTRL2_DELAYED;
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if (vid_port_opts & SET_CLOCK_INVERTED)
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video_reg |= VP_CLK_CTRL1_INVERTED;
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saa_writeb(SAA7134_VIDEO_PORT_CTRL5, video_reg);
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video_reg = video_out[vo][6];
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if (vid_port_opts & SET_VSYNC_OFF) {
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video_reg &= ~VP_VS_TYPE_MASK;
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video_reg |= VP_VS_TYPE_OFF;
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}
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saa_writeb(SAA7134_VIDEO_PORT_CTRL6, video_reg);
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saa_writeb(SAA7134_VIDEO_PORT_CTRL7, video_out[vo][7]);
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saa_writeb(SAA7134_VIDEO_PORT_CTRL7, video_out[vo][7]);
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saa_writeb(SAA7134_VIDEO_PORT_CTRL8, video_out[vo][8]);
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saa_writeb(SAA7134_VIDEO_PORT_CTRL8, video_out[vo][8]);
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}
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}
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@ -199,6 +199,14 @@ struct saa7134_format {
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#define SAA7134_MAXBOARDS 8
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#define SAA7134_MAXBOARDS 8
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#define SAA7134_INPUT_MAX 8
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#define SAA7134_INPUT_MAX 8
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/* ----------------------------------------------------------- */
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/* Video Output Port Register Initialization Options */
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#define SET_T_CODE_POLARITY_NON_INVERTED (1 << 0)
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#define SET_CLOCK_NOT_DELAYED (1 << 1)
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#define SET_CLOCK_INVERTED (1 << 2)
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#define SET_VSYNC_OFF (1 << 3)
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struct saa7134_input {
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struct saa7134_input {
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char *name;
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char *name;
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unsigned int vmux;
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unsigned int vmux;
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@ -234,6 +242,7 @@ struct saa7134_board {
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/* peripheral I/O */
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/* peripheral I/O */
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enum saa7134_video_out video_out;
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enum saa7134_video_out video_out;
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enum saa7134_mpeg_type mpeg;
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enum saa7134_mpeg_type mpeg;
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unsigned int vid_port_opts;
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};
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};
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#define card_has_radio(dev) (NULL != saa7134_boards[dev->board].radio.name)
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#define card_has_radio(dev) (NULL != saa7134_boards[dev->board].radio.name)
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