sfc: RX buffer allocation takes prefix size into account in IP header alignment
rx_prefix_size is 4-bytes aligned on Falcon/Siena (16 bytes), but it is equal
to 14 on EF10. So, it should be taken into account if arch requires IP header
to be 4-bytes aligned (via NET_IP_ALIGN).
Fixes: 8127d661e7
('sfc: Add support for Solarflare SFC9100 family')
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
This commit is contained in:
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@ -585,7 +585,7 @@ static void efx_start_datapath(struct efx_nic *efx)
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EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
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efx->type->rx_buffer_padding);
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rx_buf_len = (sizeof(struct efx_rx_page_state) +
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NET_IP_ALIGN + efx->rx_dma_len);
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efx->rx_ip_align + efx->rx_dma_len);
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if (rx_buf_len <= PAGE_SIZE) {
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efx->rx_scatter = efx->type->always_rx_scatter;
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efx->rx_buffer_order = 0;
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@ -2544,6 +2544,8 @@ static int efx_init_struct(struct efx_nic *efx,
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efx->net_dev = net_dev;
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efx->rx_prefix_size = efx->type->rx_prefix_size;
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efx->rx_ip_align =
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NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
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efx->rx_packet_hash_offset =
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efx->type->rx_hash_offset - efx->type->rx_prefix_size;
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spin_lock_init(&efx->stats_lock);
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@ -683,6 +683,8 @@ struct vfdi_status;
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* @n_channels: Number of channels in use
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* @n_rx_channels: Number of channels used for RX (= number of RX queues)
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* @n_tx_channels: Number of channels used for TX
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* @rx_ip_align: RX DMA address offset to have IP header aligned in
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* in accordance with NET_IP_ALIGN
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* @rx_dma_len: Current maximum RX DMA length
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* @rx_buffer_order: Order (log2) of number of pages for each RX buffer
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* @rx_buffer_truesize: Amortised allocation size of an RX buffer,
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@ -816,6 +818,7 @@ struct efx_nic {
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unsigned rss_spread;
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unsigned tx_channel_offset;
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unsigned n_tx_channels;
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unsigned int rx_ip_align;
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unsigned int rx_dma_len;
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unsigned int rx_buffer_order;
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unsigned int rx_buffer_truesize;
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@ -94,7 +94,7 @@ static inline void efx_sync_rx_buffer(struct efx_nic *efx,
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void efx_rx_config_page_split(struct efx_nic *efx)
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{
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efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + NET_IP_ALIGN,
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efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + efx->rx_ip_align,
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EFX_RX_BUF_ALIGNMENT);
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efx->rx_bufs_per_page = efx->rx_buffer_order ? 1 :
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((PAGE_SIZE - sizeof(struct efx_rx_page_state)) /
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@ -189,9 +189,9 @@ static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue)
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do {
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index = rx_queue->added_count & rx_queue->ptr_mask;
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rx_buf = efx_rx_buffer(rx_queue, index);
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rx_buf->dma_addr = dma_addr + NET_IP_ALIGN;
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rx_buf->dma_addr = dma_addr + efx->rx_ip_align;
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rx_buf->page = page;
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rx_buf->page_offset = page_offset + NET_IP_ALIGN;
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rx_buf->page_offset = page_offset + efx->rx_ip_align;
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rx_buf->len = efx->rx_dma_len;
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rx_buf->flags = 0;
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++rx_queue->added_count;
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