ARM: SoC updates for 3.16 (part 2)
This is a small follow-up to the larger ARM SoC updates merged last week, almost entirely for the keystone platform. The main change here is to use the new dma-ranges parsing code that came in through Russell's ARM tree. This allows the keystone platform to do cache-coherent DMA and to finally support all the available physical memory when LPAE is enabled. Aside from this, the keystone reset driver has been rewritten, and there is a small bug fix to allow building the orion5x platform again. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAU5harmCrR//JCVInAQJuXhAA2v+IVK4HqkIric4Hj/7monhv/Gxm+7Fj +3GYX9QHncSnILQm0ke+OYKYoLNPDbDVyvsY5JWbewLC3TbvnKZoM25Q4Aj6Fcj5 GAVgggMtc7dkk8VIDfUvjyYZsiiWcvhATvwlQg70oOC0LmRjPwQnBvyP+zvUiBUJ ++xBGiVsfScIRhbjB+cYZl7dhLXA+GKzaCw9sKVCS+ExmlAYBSy4cUkRCkw4AQI6 s4udVuPtFi7++rNTdn2MBeyLyk0pOjQu+jepo/bwmKGaKS88KwZjTCPI1YRtrkrv ZjF4AY0kjUenoJuN9Dj9q6I6Ivc8YFDr411hF/LwiBF7+QUk0EnAEeAhDGan/ZCG 1+xZbY54tQk+TNNgR2V/RzUWilhPmG3rdtq9MnvYrmQnyGeF07MCCAIqoH+B+hDm AvApocOT9sReD4yTNIBHYPKsp04jLXR5XKRZ98QkAOInEQaYTpFOU3LyrdgFLLB3 fIfDf2ZHCc6cmp/wXKk83LVxFQqYbyw0Q93xB/X/8yqb/NyJ8hVaKWgAcofUuj3t M87I+XcljA/dx8FsELM3B+qSZXakdDUgXBkfNePkm7GGlq5NziBTMJnhbXiIVMe+ 4kZIyxRD3OZj0d1K3mHMSvoX/FY/98AJWk2eizwwIx64PskatiKQTkX9XFnYPXLb AtdWv8t3Ozc= =AqkT -----END PGP SIGNATURE----- Merge tag 'soc2-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull part two of ARM SoC updates from Arnd Bergmann: "This is a small follow-up to the larger ARM SoC updates merged last week, almost entirely for the keystone platform. The main change here is to use the new dma-ranges parsing code that came in through Russell's ARM tree. This allows the keystone platform to do cache-coherent DMA and to finally support all the available physical memory when LPAE is enabled. Aside from this, the keystone reset driver has been rewritten, and there is a small bug fix to allow building the orion5x platform again" * tag 'soc2-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: keystone: Drop use of meminfo since its not available anymore ARM: orion5x: fix mvebu_mbus_dt_init call ARM: configs: keystone: enable reset driver support ARM: dts: keystone: update reset node to work with reset driver ARM: keystone: remove redundant reset stuff ARM: keystone: Update the dma offset for non-dt platform devices ARM: keystone: Switch over to coherent memory address space ARM: configs: keystone: add MTD_SPI_NOR (new dependency for M25P80) ARM: configs: keystone: drop CONFIG_COMMON_CLK_DEBUG
This commit is contained in:
Linus Torvalds
commit
2dc24b0d06
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@ -66,9 +66,21 @@
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ranges = <0x0 0x0 0x0 0xc0000000>;
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dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
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pllctrl: pll-controller@02310000 {
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compatible = "ti,keystone-pllctrl", "syscon";
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reg = <0x02310000 0x200>;
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};
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devctrl: device-state-control@02620000 {
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compatible = "ti,keystone-devctrl", "syscon";
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reg = <0x02620000 0x1000>;
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};
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rstctrl: reset-controller {
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compatible = "ti,keystone-reset";
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reg = <0x023100e8 4>; /* pll reset control reg */
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ti,syscon-pll = <&pllctrl 0xe4>;
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ti,syscon-dev = <&devctrl 0x328>;
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ti,wdt-list = <0>;
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};
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/include/ "keystone-clocks.dtsi"
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@ -73,7 +73,6 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
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CONFIG_LEDS_TRIGGER_CPU=y
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CONFIG_RTC_CLASS=y
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CONFIG_RTC_DRV_PL030=y
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CONFIG_COMMON_CLK_DEBUG=y
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CONFIG_EXT2_FS=y
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CONFIG_VFAT_FS=y
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CONFIG_TMPFS=y
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@ -112,6 +112,7 @@ CONFIG_MTD_PLATRAM=y
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CONFIG_MTD_M25P80=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_DAVINCI=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_UBI=y
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CONFIG_PROC_DEVICETREE=y
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CONFIG_BLK_DEV_LOOP=y
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@ -131,6 +132,9 @@ CONFIG_SPI=y
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CONFIG_SPI_DAVINCI=y
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CONFIG_SPI_SPIDEV=y
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# CONFIG_HWMON is not set
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CONFIG_POWER_SUPPLY=y
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CONFIG_POWER_RESET=y
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CONFIG_POWER_RESET_KEYSTONE=y
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CONFIG_WATCHDOG=y
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CONFIG_WATCHDOG_CORE=y
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CONFIG_DAVINCI_WATCHDOG=y
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@ -145,7 +149,6 @@ CONFIG_USB_DWC3_VERBOSE=y
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CONFIG_KEYSTONE_USB_PHY=y
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CONFIG_DMADEVICES=y
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CONFIG_TI_EDMA=y
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CONFIG_COMMON_CLK_DEBUG=y
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CONFIG_MEMORY=y
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CONFIG_TI_AEMIF=y
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CONFIG_EXT4_FS=y
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@ -73,7 +73,6 @@ CONFIG_LEDS_TRIGGERS=y
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CONFIG_RTC_CLASS=y
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CONFIG_RTC_DRV_VT8500=y
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CONFIG_DMADEVICES=y
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CONFIG_COMMON_CLK_DEBUG=y
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# CONFIG_IOMMU_SUPPORT is not set
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CONFIG_PWM=y
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CONFIG_PWM_VT8500=y
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@ -14,60 +14,100 @@
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#include <linux/init.h>
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#include <linux/of_platform.h>
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#include <linux/of_address.h>
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#include <linux/memblock.h>
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#include <asm/setup.h>
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#include <asm/mach/map.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/smp_plat.h>
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#include <asm/memory.h>
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#include "memory.h"
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#include "keystone.h"
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#define PLL_RESET_WRITE_KEY_MASK 0xffff0000
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#define PLL_RESET_WRITE_KEY 0x5a69
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#define PLL_RESET BIT(16)
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static struct notifier_block platform_nb;
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static unsigned long keystone_dma_pfn_offset __read_mostly;
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static void __iomem *keystone_rstctrl;
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static int keystone_platform_notifier(struct notifier_block *nb,
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unsigned long event, void *data)
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{
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struct device *dev = data;
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if (event != BUS_NOTIFY_ADD_DEVICE)
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return NOTIFY_DONE;
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if (!dev)
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return NOTIFY_BAD;
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if (!dev->of_node) {
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dev->dma_pfn_offset = keystone_dma_pfn_offset;
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dev_err(dev, "set dma_pfn_offset%08lx\n",
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dev->dma_pfn_offset);
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}
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return NOTIFY_OK;
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}
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static void __init keystone_init(void)
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{
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struct device_node *node;
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node = of_find_compatible_node(NULL, NULL, "ti,keystone-reset");
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if (WARN_ON(!node))
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pr_warn("ti,keystone-reset node undefined\n");
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keystone_rstctrl = of_iomap(node, 0);
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if (WARN_ON(!keystone_rstctrl))
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pr_warn("ti,keystone-reset iomap error\n");
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keystone_pm_runtime_init();
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if (platform_nb.notifier_call)
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bus_register_notifier(&platform_bus_type, &platform_nb);
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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static phys_addr_t keystone_virt_to_idmap(unsigned long x)
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{
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return (phys_addr_t)(x) - CONFIG_PAGE_OFFSET + KEYSTONE_LOW_PHYS_START;
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}
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static void __init keystone_init_meminfo(void)
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{
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bool lpae = IS_ENABLED(CONFIG_ARM_LPAE);
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bool pvpatch = IS_ENABLED(CONFIG_ARM_PATCH_PHYS_VIRT);
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phys_addr_t offset = PHYS_OFFSET - KEYSTONE_LOW_PHYS_START;
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phys_addr_t mem_start, mem_end;
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mem_start = memblock_start_of_DRAM();
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mem_end = memblock_end_of_DRAM();
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/* nothing to do if we are running out of the <32-bit space */
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if (mem_start >= KEYSTONE_LOW_PHYS_START &&
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mem_end <= KEYSTONE_LOW_PHYS_END)
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return;
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if (!lpae || !pvpatch) {
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pr_crit("Enable %s%s%s to run outside 32-bit space\n",
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!lpae ? __stringify(CONFIG_ARM_LPAE) : "",
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(!lpae && !pvpatch) ? " and " : "",
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!pvpatch ? __stringify(CONFIG_ARM_PATCH_PHYS_VIRT) : "");
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}
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if (mem_start < KEYSTONE_HIGH_PHYS_START ||
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mem_end > KEYSTONE_HIGH_PHYS_END) {
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pr_crit("Invalid address space for memory (%08llx-%08llx)\n",
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(u64)mem_start, (u64)mem_end);
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}
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offset += KEYSTONE_HIGH_PHYS_START;
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__pv_phys_pfn_offset = PFN_DOWN(offset);
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__pv_offset = (offset - PAGE_OFFSET);
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/* Populate the arch idmap hook */
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arch_virt_to_idmap = keystone_virt_to_idmap;
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platform_nb.notifier_call = keystone_platform_notifier;
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keystone_dma_pfn_offset = PFN_DOWN(KEYSTONE_HIGH_PHYS_START -
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KEYSTONE_LOW_PHYS_START);
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pr_info("Switching to high address space at 0x%llx\n", (u64)offset);
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}
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static const char *keystone_match[] __initconst = {
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"ti,keystone",
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NULL,
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};
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void keystone_restart(enum reboot_mode mode, const char *cmd)
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{
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u32 val;
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BUG_ON(!keystone_rstctrl);
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/* Enable write access to RSTCTRL */
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val = readl(keystone_rstctrl);
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val &= PLL_RESET_WRITE_KEY_MASK;
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val |= PLL_RESET_WRITE_KEY;
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writel(val, keystone_rstctrl);
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/* Reset the SOC */
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val = readl(keystone_rstctrl);
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val &= ~PLL_RESET;
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writel(val, keystone_rstctrl);
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}
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DT_MACHINE_START(KEYSTONE, "Keystone")
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#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
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.dma_zone_size = SZ_2G,
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@ -75,5 +115,5 @@ DT_MACHINE_START(KEYSTONE, "Keystone")
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.smp = smp_ops(keystone_smp_ops),
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.init_machine = keystone_init,
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.dt_compat = keystone_match,
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.restart = keystone_restart,
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.init_meminfo = keystone_init_meminfo,
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MACHINE_END
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@ -0,0 +1,24 @@
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/*
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* Copyright 2014 Texas Instruments, Inc.
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* Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*/
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#ifndef __MEMORY_H
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#define __MEMORY_H
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#define MAX_PHYSMEM_BITS 36
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#define SECTION_SIZE_BITS 34
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#define KEYSTONE_LOW_PHYS_START 0x80000000ULL
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#define KEYSTONE_LOW_PHYS_SIZE 0x80000000ULL /* 2G */
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#define KEYSTONE_LOW_PHYS_END (KEYSTONE_LOW_PHYS_START + \
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KEYSTONE_LOW_PHYS_SIZE - 1)
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#define KEYSTONE_HIGH_PHYS_START 0x800000000ULL
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#define KEYSTONE_HIGH_PHYS_SIZE 0x400000000ULL /* 16G */
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#define KEYSTONE_HIGH_PHYS_END (KEYSTONE_HIGH_PHYS_START + \
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KEYSTONE_HIGH_PHYS_SIZE - 1)
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#endif /* __MEMORY_H */
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@ -17,13 +17,16 @@
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#include <linux/io.h>
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#include <asm/smp_plat.h>
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#include <asm/prom.h>
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#include <asm/tlbflush.h>
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#include <asm/pgtable.h>
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#include "keystone.h"
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static int keystone_smp_boot_secondary(unsigned int cpu,
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struct task_struct *idle)
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{
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unsigned long start = virt_to_phys(&secondary_startup);
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unsigned long start = virt_to_idmap(&secondary_startup);
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int error;
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pr_debug("keystone-smp: booting cpu %d, vector %08lx\n",
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@ -36,6 +39,19 @@ static int keystone_smp_boot_secondary(unsigned int cpu,
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return error;
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}
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#ifdef CONFIG_ARM_LPAE
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static void __cpuinit keystone_smp_secondary_initmem(unsigned int cpu)
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{
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pgd_t *pgd0 = pgd_offset_k(0);
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cpu_set_ttbr(1, __pa(pgd0) + TTBR1_OFFSET);
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local_flush_tlb_all();
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}
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#else
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static inline void __cpuinit keystone_smp_secondary_initmem(unsigned int cpu)
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{}
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#endif
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struct smp_operations keystone_smp_ops __initdata = {
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.smp_boot_secondary = keystone_smp_boot_secondary,
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.smp_secondary_init = keystone_smp_secondary_initmem,
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};
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@ -45,7 +45,7 @@ static void __init orion5x_dt_init(void)
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orion5x_id(&dev, &rev, &dev_name);
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printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
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BUG_ON(mvebu_mbus_dt_init());
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BUG_ON(mvebu_mbus_dt_init(false));
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/*
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* Setup Orion address map
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