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drm/nve0/fb/gddr5: fix behaviour of lp3 setting 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2013-11-26 14:31:18 +10:00
parent cb1567c286
commit 2daaf5b0e4
2 changed files with 5 additions and 2 deletions
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3
drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c
View File

@ -78,6 +78,9 @@ nouveau_gddr5_calc(struct nouveau_ram *ram)
ram->mr[3] &= ~0x020; ram->mr[3] &= ~0x020;
ram->mr[3] |= (rq & 0x01) << 5; ram->mr[3] |= (rq & 0x01) << 5;
/*XXX: LP3, where's the bit? Let's hardcode to off for now */
ram->mr[5] &= ~0x004;
if (!vo) if (!vo)
vo = (ram->mr[6] & 0xff0) >> 4; vo = (ram->mr[6] & 0xff0) >> 4;
if (ram->mr[6] & 0x001) if (ram->mr[6] & 0x001)

4
drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
View File

@ -528,7 +528,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
ram_mask(fuc, mr[8], 0xfff, ram->base.mr[8]); ram_mask(fuc, mr[8], 0xfff, ram->base.mr[8]);
ram_nsec(fuc, 1000); ram_nsec(fuc, 1000);
ram_mask(fuc, mr[1], 0xfff, ram->base.mr[1]); ram_mask(fuc, mr[1], 0xfff, ram->base.mr[1]);
ram_mask(fuc, mr[5], 0xfff, ram->base.mr[5]); ram_mask(fuc, mr[5], 0xfff, ram->base.mr[5] & ~0x004); /* LP3 later */
ram_mask(fuc, mr[6], 0xfff, ram->base.mr[6]); ram_mask(fuc, mr[6], 0xfff, ram->base.mr[6]);
ram_mask(fuc, mr[7], 0xfff, ram->base.mr[7]); ram_mask(fuc, mr[7], 0xfff, ram->base.mr[7]);
@ -582,7 +582,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
/* MR5: (re)enable LP3 if necessary /* MR5: (re)enable LP3 if necessary
* XXX: need to find the switch, keeping off for now * XXX: need to find the switch, keeping off for now
*/ */
ram_mask(fuc, mr[5], 0x00000004, 0x00000000); ram_mask(fuc, mr[5], 0xfff, ram->base.mr[5]);
if (ram->mode != 2) { if (ram->mode != 2) {
ram_mask(fuc, 0x10f830, 0x01000000, 0x01000000); ram_mask(fuc, 0x10f830, 0x01000000, 0x01000000);