hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Merge remote branch 'remotes/origin/hwmod_a_2.6.39' into tmp-integration-2.6.39-20110310-024 

Conflicts:
	arch/arm/mach-omap2/omap_hwmod_2430_data.c
	arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
	arch/arm/plat-omap/include/plat/omap_hwmod.h
This commit is contained in:
Paul Walmsley 2011-03-10 22:43:05 -07:00
parent 21ace5452c cc1226e763
commit 2d403fe030
7 changed files with 82 additions and 60 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

79
arch/arm/mach-omap2/omap_hwmod.c
View File

@ -370,7 +370,7 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
} }
autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift; autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
autoidle_mask = (0x3 << autoidle_shift); autoidle_mask = (0x1 << autoidle_shift);
*v &= ~autoidle_mask; *v &= ~autoidle_mask;
*v |= autoidle << autoidle_shift; *v |= autoidle << autoidle_shift;
@ -929,7 +929,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data)
if (!ret) if (!ret)
oh->_state = _HWMOD_STATE_CLKS_INITED; oh->_state = _HWMOD_STATE_CLKS_INITED;
return 0; return ret;
} }
/** /**
@ -975,25 +975,29 @@ static int _wait_target_ready(struct omap_hwmod *oh)
} }
/** /**
* _lookup_hardreset - return the register bit shift for this hwmod/reset line * _lookup_hardreset - fill register bit info for this hwmod/reset line
* @oh: struct omap_hwmod * * @oh: struct omap_hwmod *
* @name: name of the reset line in the context of this hwmod * @name: name of the reset line in the context of this hwmod
* @ohri: struct omap_hwmod_rst_info * that this function will fill in
* *
* Return the bit position of the reset line that match the * Return the bit position of the reset line that match the
* input name. Return -ENOENT if not found. * input name. Return -ENOENT if not found.
*/ */
static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name) static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
struct omap_hwmod_rst_info *ohri)
{ {
int i; int i;
for (i = 0; i < oh->rst_lines_cnt; i++) { for (i = 0; i < oh->rst_lines_cnt; i++) {
const char *rst_line = oh->rst_lines[i].name; const char *rst_line = oh->rst_lines[i].name;
if (!strcmp(rst_line, name)) { if (!strcmp(rst_line, name)) {
u8 shift = oh->rst_lines[i].rst_shift; ohri->rst_shift = oh->rst_lines[i].rst_shift;
pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n", ohri->st_shift = oh->rst_lines[i].st_shift;
oh->name, rst_line, shift); pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
oh->name, __func__, rst_line, ohri->rst_shift,
ohri->st_shift);
return shift; return 0;
} }
} }
@ -1012,21 +1016,22 @@ static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
*/ */
static int _assert_hardreset(struct omap_hwmod *oh, const char *name) static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
{ {
u8 shift; struct omap_hwmod_rst_info ohri;
u8 ret;
if (!oh) if (!oh)
return -EINVAL; return -EINVAL;
shift = _lookup_hardreset(oh, name); ret = _lookup_hardreset(oh, name, &ohri);
if (IS_ERR_VALUE(shift)) if (IS_ERR_VALUE(ret))
return shift; return ret;
if (cpu_is_omap24xx() || cpu_is_omap34xx()) if (cpu_is_omap24xx() || cpu_is_omap34xx())
return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
shift); ohri.rst_shift);
else if (cpu_is_omap44xx()) else if (cpu_is_omap44xx())
return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg, return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
shift); ohri.rst_shift);
else else
return -EINVAL; return -EINVAL;
} }
@ -1043,29 +1048,34 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
*/ */
static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
{ {
u8 shift; struct omap_hwmod_rst_info ohri;
int r; int ret;
if (!oh) if (!oh)
return -EINVAL; return -EINVAL;
shift = _lookup_hardreset(oh, name); ret = _lookup_hardreset(oh, name, &ohri);
if (IS_ERR_VALUE(shift)) if (IS_ERR_VALUE(ret))
return shift; return ret;
if (cpu_is_omap24xx() || cpu_is_omap34xx()) if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs, ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
shift); ohri.rst_shift,
else if (cpu_is_omap44xx()) ohri.st_shift);
r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg, } else if (cpu_is_omap44xx()) {
shift); if (ohri.st_shift)
else pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
oh->name, name);
ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
ohri.rst_shift);
} else {
return -EINVAL; return -EINVAL;
}
if (r == -EBUSY) if (ret == -EBUSY)
pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name); pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
return r; return ret;
} }
/** /**
@ -1078,21 +1088,22 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
*/ */
static int _read_hardreset(struct omap_hwmod *oh, const char *name) static int _read_hardreset(struct omap_hwmod *oh, const char *name)
{ {
u8 shift; struct omap_hwmod_rst_info ohri;
u8 ret;
if (!oh) if (!oh)
return -EINVAL; return -EINVAL;
shift = _lookup_hardreset(oh, name); ret = _lookup_hardreset(oh, name, &ohri);
if (IS_ERR_VALUE(shift)) if (IS_ERR_VALUE(ret))
return shift; return ret;
if (cpu_is_omap24xx() || cpu_is_omap34xx()) { if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
shift); ohri.st_shift);
} else if (cpu_is_omap44xx()) { } else if (cpu_is_omap44xx()) {
return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg, return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
shift); ohri.rst_shift);
} else { } else {
return -EINVAL; return -EINVAL;
} }

11
arch/arm/mach-omap2/omap_hwmod_2420_data.c
View File

@ -988,7 +988,7 @@ static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = {
.sysc_offs = 0x0010, .sysc_offs = 0x0010,
.syss_offs = 0x0014, .syss_offs = 0x0014,
.sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
SYSC_HAS_AUTOIDLE), SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
@ -1029,7 +1029,7 @@ static struct omap_hwmod_class_sysconfig uart_sysc = {
.syss_offs = 0x58, .syss_offs = 0x58,
.sysc_flags = (SYSC_HAS_SIDLEMODE | .sysc_flags = (SYSC_HAS_SIDLEMODE |
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
SYSC_HAS_AUTOIDLE), SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
@ -1441,7 +1441,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
.rev_offs = 0x00, .rev_offs = 0x00,
.sysc_offs = 0x20, .sysc_offs = 0x20,
.syss_offs = 0x10, .syss_offs = 0x10,
.sysc_flags = SYSC_HAS_SOFTRESET, .sysc_flags = (SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
@ -1613,7 +1613,8 @@ static struct omap_hwmod_class_sysconfig omap242x_gpio_sysc = {
.sysc_offs = 0x0010, .sysc_offs = 0x0010,
.syss_offs = 0x0014, .syss_offs = 0x0014,
.sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
@ -1755,7 +1756,7 @@ static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = {
.syss_offs = 0x0028, .syss_offs = 0x0028,
.sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
SYSC_HAS_AUTOIDLE), SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
.idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };

12
arch/arm/mach-omap2/omap_hwmod_2430_data.c
View File

@ -1088,7 +1088,7 @@ static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = {
.sysc_offs = 0x0010, .sysc_offs = 0x0010,
.syss_offs = 0x0014, .syss_offs = 0x0014,
.sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
SYSC_HAS_AUTOIDLE), SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
@ -1129,7 +1129,7 @@ static struct omap_hwmod_class_sysconfig uart_sysc = {
.syss_offs = 0x58, .syss_offs = 0x58,
.sysc_flags = (SYSC_HAS_SIDLEMODE | .sysc_flags = (SYSC_HAS_SIDLEMODE |
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
SYSC_HAS_AUTOIDLE), SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
@ -1516,7 +1516,8 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
.rev_offs = 0x00, .rev_offs = 0x00,
.sysc_offs = 0x20, .sysc_offs = 0x20,
.syss_offs = 0x10, .syss_offs = 0x10,
.sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
SYSS_HAS_RESET_STATUS),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
@ -1714,7 +1715,8 @@ static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = {
.sysc_offs = 0x0010, .sysc_offs = 0x0010,
.syss_offs = 0x0014, .syss_offs = 0x0014,
.sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
@ -1886,7 +1888,7 @@ static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = {
.syss_offs = 0x0028, .syss_offs = 0x0028,
.sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
SYSC_HAS_AUTOIDLE), SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
.idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };

13
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
View File

@ -1240,7 +1240,8 @@ static struct omap_hwmod_class_sysconfig omap3xxx_wd_timer_sysc = {
.syss_offs = 0x0014, .syss_offs = 0x0014,
.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE |
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY), SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
@ -1252,7 +1253,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
.syss_offs = 0x10, .syss_offs = 0x10,
.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
SYSC_HAS_AUTOIDLE), SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
@ -1299,7 +1300,7 @@ static struct omap_hwmod_class_sysconfig uart_sysc = {
.syss_offs = 0x58, .syss_offs = 0x58,
.sysc_flags = (SYSC_HAS_SIDLEMODE | .sysc_flags = (SYSC_HAS_SIDLEMODE |
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
SYSC_HAS_AUTOIDLE), SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
@ -2105,7 +2106,8 @@ static struct omap_hwmod_class_sysconfig omap3xxx_gpio_sysc = {
.sysc_offs = 0x0010, .sysc_offs = 0x0010,
.syss_offs = 0x0014, .syss_offs = 0x0014,
.sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
@ -2359,7 +2361,8 @@ static struct omap_hwmod_class_sysconfig omap3xxx_dma_sysc = {
.syss_offs = 0x0028, .syss_offs = 0x0028,
.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE), SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE |
SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,

18
arch/arm/mach-omap2/prm2xxx_3xxx.c
View File

@ -118,7 +118,8 @@ int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
/** /**
* omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait
* @prm_mod: PRM submodule base (e.g. CORE_MOD) * @prm_mod: PRM submodule base (e.g. CORE_MOD)
* @shift: register bit shift corresponding to the reset line to deassert * @rst_shift: register bit shift corresponding to the reset line to deassert
* @st_shift: register bit shift for the status of the deasserted submodule
* *
* Some IPs like dsp or iva contain processors that require an HW * Some IPs like dsp or iva contain processors that require an HW
* reset line to be asserted / deasserted in order to fully enable the * reset line to be asserted / deasserted in order to fully enable the
@ -129,27 +130,28 @@ int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
* -EINVAL upon an argument error, -EEXIST if the submodule was already out * -EINVAL upon an argument error, -EEXIST if the submodule was already out
* of reset, or -EBUSY if the submodule did not exit reset promptly. * of reset, or -EBUSY if the submodule did not exit reset promptly.
*/ */
int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift) int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
{ {
u32 mask; u32 rst, st;
int c; int c;
if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) if (!(cpu_is_omap24xx() || cpu_is_omap34xx()))
return -EINVAL; return -EINVAL;
mask = 1 << shift; rst = 1 << rst_shift;
st = 1 << st_shift;
/* Check the current status to avoid de-asserting the line twice */ /* Check the current status to avoid de-asserting the line twice */
if (omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, mask) == 0) if (omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, rst) == 0)
return -EEXIST; return -EEXIST;
/* Clear the reset status by writing 1 to the status bit */ /* Clear the reset status by writing 1 to the status bit */
omap2_prm_rmw_mod_reg_bits(0xffffffff, mask, prm_mod, OMAP2_RM_RSTST); omap2_prm_rmw_mod_reg_bits(0xffffffff, st, prm_mod, OMAP2_RM_RSTST);
/* de-assert the reset control line */ /* de-assert the reset control line */
omap2_prm_rmw_mod_reg_bits(mask, 0, prm_mod, OMAP2_RM_RSTCTRL); omap2_prm_rmw_mod_reg_bits(rst, 0, prm_mod, OMAP2_RM_RSTCTRL);
/* wait the status to be set */ /* wait the status to be set */
omap_test_timeout(omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTST, omap_test_timeout(omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTST,
mask), st),
MAX_MODULE_HARDRESET_WAIT, c); MAX_MODULE_HARDRESET_WAIT, c);
return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;

5
arch/arm/mach-omap2/prm2xxx_3xxx.h
View File

@ -282,7 +282,8 @@ static inline int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
"not suppose to be used on omap4\n"); "not suppose to be used on omap4\n");
return 0; return 0;
} }
static inline int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift) static inline int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift,
u8 st_shift)
{ {
WARN(1, "prm: omap2xxx/omap3xxx specific function and " WARN(1, "prm: omap2xxx/omap3xxx specific function and "
"not suppose to be used on omap4\n"); "not suppose to be used on omap4\n");
@ -300,7 +301,7 @@ extern u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask);
/* These omap2_ PRM functions apply to both OMAP2 and 3 */ /* These omap2_ PRM functions apply to both OMAP2 and 3 */
extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift);
extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift); extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
#endif /* CONFIG_ARCH_OMAP4 */ #endif /* CONFIG_ARCH_OMAP4 */
#endif #endif

4
arch/arm/plat-omap/include/plat/omap_hwmod.h
View File

@ -125,6 +125,7 @@ struct omap_hwmod_dma_info {
* struct omap_hwmod_rst_info - IPs reset lines use by hwmod * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
* @name: name of the reset line (module local name) * @name: name of the reset line (module local name)
* @rst_shift: Offset of the reset bit * @rst_shift: Offset of the reset bit
* @st_shift: Offset of the reset status bit (OMAP2/3 only)
* *
* @name should be something short, e.g., "cpu0" or "rst". It is defined * @name should be something short, e.g., "cpu0" or "rst". It is defined
* locally to the hwmod. * locally to the hwmod.
@ -132,6 +133,7 @@ struct omap_hwmod_dma_info {
struct omap_hwmod_rst_info { struct omap_hwmod_rst_info {
const char *name; const char *name;
u8 rst_shift; u8 rst_shift;
u8 st_shift;
}; };
/** /**
@ -377,7 +379,7 @@ struct omap_hwmod_omap4_prcm {
* HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
* controller, etc. XXX probably belongs outside the main hwmod file * controller, etc. XXX probably belongs outside the main hwmod file
* XXX Should be HWMOD_SETUP_NO_IDLE * XXX Should be HWMOD_SETUP_NO_IDLE
* HWMOD_NO_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE) * HWMOD_NO_OCP_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
* when module is enabled, rather than the default, which is to * when module is enabled, rather than the default, which is to
* enable autoidle * enable autoidle
* HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup