ALSA: dice: Add new functions for constraints of PCM parameters
This commit adds a new functions and some arrangement for PCM restriction. This arrangement is due to the number of channels which each Dice device has. I note that minimum number for period becomes 2, instead of 1 because its PCM functionality has SNDRV_PCM_INFO_BATCH, this means that the driver uses double (or more) buffering so the minimum number for period should be 2. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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04d426a039
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2c2416c83e
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@ -67,71 +67,92 @@ static int dice_channels_constraint(struct snd_pcm_hw_params *params,
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return snd_interval_refine(c, &channels);
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}
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static int pcm_open(struct snd_pcm_substream *substream)
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static void limit_channels_and_rates(struct snd_dice *dice,
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struct snd_pcm_runtime *runtime,
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unsigned int *pcm_channels)
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{
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static const struct snd_pcm_hardware hardware = {
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.info = SNDRV_PCM_INFO_MMAP |
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struct snd_pcm_hardware *hw = &runtime->hw;
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unsigned int i, rate, mode;
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hw->channels_min = UINT_MAX;
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hw->channels_max = 0;
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for (i = 0; i < ARRAY_SIZE(snd_dice_rates); ++i) {
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rate = snd_dice_rates[i];
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if (snd_dice_stream_get_rate_mode(dice, rate, &mode) < 0)
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continue;
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hw->rates |= snd_pcm_rate_to_rate_bit(rate);
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if (pcm_channels[mode] == 0)
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continue;
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hw->channels_min = min(hw->channels_min, pcm_channels[mode]);
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hw->channels_max = max(hw->channels_max, pcm_channels[mode]);
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}
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snd_pcm_limit_hw_rates(runtime);
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}
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static void limit_period_and_buffer(struct snd_pcm_hardware *hw)
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{
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hw->periods_min = 2; /* SNDRV_PCM_INFO_BATCH */
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hw->periods_max = UINT_MAX;
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hw->period_bytes_min = 4 * hw->channels_max; /* byte for a frame */
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/* Just to prevent from allocating much pages. */
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hw->period_bytes_max = hw->period_bytes_min * 2048;
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hw->buffer_bytes_max = hw->period_bytes_max * hw->periods_min;
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}
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static int init_hw_info(struct snd_dice *dice,
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struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct snd_pcm_hardware *hw = &runtime->hw;
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int err;
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hw->info = SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_BATCH |
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SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BLOCK_TRANSFER,
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.formats = AMDTP_OUT_PCM_FORMAT_BITS,
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.channels_min = UINT_MAX,
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.channels_max = 0,
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.buffer_bytes_max = 16 * 1024 * 1024,
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.period_bytes_min = 1,
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.period_bytes_max = UINT_MAX,
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.periods_min = 1,
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.periods_max = UINT_MAX,
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};
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struct snd_dice *dice = substream->private_data;
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struct snd_pcm_runtime *runtime = substream->runtime;
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unsigned int i;
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int err;
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SNDRV_PCM_INFO_BLOCK_TRANSFER;
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hw->formats = AMDTP_OUT_PCM_FORMAT_BITS;
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err = snd_dice_stream_lock_try(dice);
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if (err < 0)
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goto error;
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runtime->hw = hardware;
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for (i = 0; i < ARRAY_SIZE(snd_dice_rates); ++i) {
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if (dice->clock_caps & (1 << i))
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runtime->hw.rates |=
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snd_pcm_rate_to_rate_bit(snd_dice_rates[i]);
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}
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snd_pcm_limit_hw_rates(runtime);
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for (i = 0; i < 3; ++i) {
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if (dice->rx_channels[i]) {
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runtime->hw.channels_min = min(runtime->hw.channels_min,
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dice->rx_channels[i]);
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runtime->hw.channels_max = max(runtime->hw.channels_max,
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dice->rx_channels[i]);
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}
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}
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limit_channels_and_rates(dice, runtime, dice->rx_channels);
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limit_period_and_buffer(hw);
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err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
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dice_rate_constraint, dice,
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SNDRV_PCM_HW_PARAM_CHANNELS, -1);
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if (err < 0)
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goto err_lock;
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goto end;
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err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
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dice_channels_constraint, dice,
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SNDRV_PCM_HW_PARAM_RATE, -1);
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if (err < 0)
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goto err_lock;
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goto end;
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err = amdtp_stream_add_pcm_hw_constraints(&dice->rx_stream, runtime);
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end:
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return err;
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}
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static int pcm_open(struct snd_pcm_substream *substream)
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{
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struct snd_dice *dice = substream->private_data;
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int err;
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err = snd_dice_stream_lock_try(dice);
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if (err < 0)
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goto err_lock;
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goto end;
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return 0;
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err_lock:
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err = init_hw_info(dice, substream);
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if (err < 0)
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goto err_locked;
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end:
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return err;
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err_locked:
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snd_dice_stream_lock_release(dice);
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error:
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return err;
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}
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