UniPhier ARM SoC DT updates for v5.3
- Migrate to the new binding for the Denali NAND controller -----BEGIN PGP SIGNATURE----- iQJSBAABCgA8FiEEbmPs18K1szRHjPqEPYsBB53g2wYFAl0SOlAeHHlhbWFkYS5t YXNhaGlyb0Bzb2Npb25leHQuY29tAAoJED2LAQed4NsGYr8P+gM/RghlOZf93sDT 2C0rgzly2ZdwB9aZMAqYjxl+YIujWSuws/W+p/Kvl5xKJLHVkrWZ2x8AZkrAuaQK q3yV0HGRQUnuzIMU+nrK8Regwf4L1oOOB+qXVJPS3ZG/9K0lBumUq3rM0FlEh9pu UCVhvPa85u5dICH1PxQRW8oXSaVdAFil8FJpKu8lvdJt/qJkgR2bYwO88Y3lBTzD K3+B+ywmsGAKY6rl6iVs1tJNAotGAffsF55ULnepG+y2eFnJ2tzCYJe56E1SqIvo VWmOTz0c2pM5jPSq6lz89ao5nTed2yaIrlx39PnROykXZ/hOhMilFudayMj8+v/e rjWFNQRPEkFdpDxHJtIXtzvWgAOAdZ/Dkc6TDUGG3F8c1s4VjHvVx2Gxvnq+KkPT fn5JqB0JqMDAX97jEmsUqGfB6k2PMSjZvhCPt6GnqpbibayzhccPL7DZUbqSf3UG 74ugMoliZFhwUcKHnAehALuSOiWA87amZ+ycg1ji6fPsr8XI1vNvR/WeJHl+3Zzf la7IvVn0TxefWugkmntnYQlRETB8wx9fv8hyFWi+f4f6m+XceemBedGcNNEorHL4 cIV5z6lCNN3kQbslJedcwn3XHb1u4Na0GL7htH9ryi156/XG6lFjT1VifAhT6jlX RMovjZFNsjxUKCa0QO3zgDwVOkp+ =Ezcw -----END PGP SIGNATURE----- Merge tag 'uniphier-dt-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt UniPhier ARM SoC DT updates for v5.3 - Migrate to the new binding for the Denali NAND controller * tag 'uniphier-dt-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: ARM: dts: uniphier: update to new Denali NAND binding Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
2bfd84b3a5
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@ -77,4 +77,8 @@
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&nand {
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status = "okay";
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nand@0 {
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reg = <0>;
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};
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};
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@ -403,9 +403,11 @@
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status = "disabled";
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reg-names = "nand_data", "denali_reg";
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reg = <0x68000000 0x20>, <0x68100000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0 65 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand2cs>;
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pinctrl-0 = <&pinctrl_nand>;
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clock-names = "nand", "nand_x", "ecc";
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clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
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resets = <&sys_rst 2>;
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@ -90,4 +90,8 @@
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&nand {
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status = "okay";
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nand@0 {
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reg = <0>;
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};
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};
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@ -98,4 +98,8 @@
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&nand {
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status = "okay";
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nand@0 {
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reg = <0>;
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};
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};
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@ -593,6 +593,8 @@
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status = "disabled";
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reg-names = "nand_data", "denali_reg";
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reg = <0x68000000 0x20>, <0x68100000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0 65 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand>;
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@ -458,9 +458,11 @@
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status = "disabled";
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reg-names = "nand_data", "denali_reg";
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reg = <0x68000000 0x20>, <0x68100000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0 65 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand2cs>;
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pinctrl-0 = <&pinctrl_nand>;
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clock-names = "nand", "nand_x", "ecc";
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clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
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resets = <&sys_rst 2>;
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@ -766,9 +766,11 @@
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status = "disabled";
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reg-names = "nand_data", "denali_reg";
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reg = <0x68000000 0x20>, <0x68100000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0 65 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand2cs>;
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pinctrl-0 = <&pinctrl_nand>;
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clock-names = "nand", "nand_x", "ecc";
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clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
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resets = <&sys_rst 2>;
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@ -81,4 +81,8 @@
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&nand {
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status = "okay";
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nand@0 {
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reg = <0>;
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};
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};
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@ -407,9 +407,11 @@
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status = "disabled";
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reg-names = "nand_data", "denali_reg";
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reg = <0x68000000 0x20>, <0x68100000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0 65 4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand2cs>;
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pinctrl-0 = <&pinctrl_nand>;
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clock-names = "nand", "nand_x", "ecc";
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clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
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resets = <&sys_rst 2>;
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