ahci: qoriq: add lx2160 platforms support
Lx2160a is a new introduced soc which supports ATA3.0 Signed-off-by: Peng Ma <peng.ma@nxp.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
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15ade5d2e7
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@ -58,6 +58,7 @@ enum ahci_qoriq_type {
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AHCI_LS1046A,
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AHCI_LS1088A,
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AHCI_LS2088A,
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AHCI_LX2160A,
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};
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struct ahci_qoriq_priv {
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@ -67,6 +68,8 @@ struct ahci_qoriq_priv {
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bool is_dmacoherent;
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};
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static bool ecc_initialized;
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static const struct of_device_id ahci_qoriq_of_match[] = {
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{ .compatible = "fsl,ls1021a-ahci", .data = (void *)AHCI_LS1021A},
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{ .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A},
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@ -74,6 +77,7 @@ static const struct of_device_id ahci_qoriq_of_match[] = {
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{ .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A},
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{ .compatible = "fsl,ls1088a-ahci", .data = (void *)AHCI_LS1088A},
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{ .compatible = "fsl,ls2088a-ahci", .data = (void *)AHCI_LS2088A},
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{ .compatible = "fsl,lx2160a-ahci", .data = (void *)AHCI_LX2160A},
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{},
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};
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MODULE_DEVICE_TABLE(of, ahci_qoriq_of_match);
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@ -165,9 +169,10 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
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switch (qpriv->type) {
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case AHCI_LS1021A:
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if (!qpriv->ecc_addr)
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if (!(qpriv->ecc_addr || ecc_initialized))
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return -EINVAL;
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writel(SATA_ECC_DISABLE, qpriv->ecc_addr);
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else if (qpriv->ecc_addr && !ecc_initialized)
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writel(SATA_ECC_DISABLE, qpriv->ecc_addr);
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writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
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writel(LS1021A_PORT_PHY2, reg_base + PORT_PHY2);
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writel(LS1021A_PORT_PHY3, reg_base + PORT_PHY3);
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@ -180,10 +185,12 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
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break;
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case AHCI_LS1043A:
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if (!qpriv->ecc_addr)
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if (!(qpriv->ecc_addr || ecc_initialized))
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return -EINVAL;
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writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2,
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qpriv->ecc_addr);
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else if (qpriv->ecc_addr && !ecc_initialized)
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writel(readl(qpriv->ecc_addr) |
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ECC_DIS_ARMV8_CH2,
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qpriv->ecc_addr);
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writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
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writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);
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writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);
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@ -202,10 +209,12 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
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break;
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case AHCI_LS1046A:
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if (!qpriv->ecc_addr)
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if (!(qpriv->ecc_addr || ecc_initialized))
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return -EINVAL;
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writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2,
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qpriv->ecc_addr);
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else if (qpriv->ecc_addr && !ecc_initialized)
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writel(readl(qpriv->ecc_addr) |
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ECC_DIS_ARMV8_CH2,
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qpriv->ecc_addr);
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writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
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writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);
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writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);
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@ -215,10 +224,13 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
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break;
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case AHCI_LS1088A:
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if (!qpriv->ecc_addr)
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case AHCI_LX2160A:
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if (!(qpriv->ecc_addr || ecc_initialized))
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return -EINVAL;
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writel(readl(qpriv->ecc_addr) | ECC_DIS_LS1088A,
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qpriv->ecc_addr);
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else if (qpriv->ecc_addr && !ecc_initialized)
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writel(readl(qpriv->ecc_addr) |
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ECC_DIS_LS1088A,
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qpriv->ecc_addr);
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writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
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writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);
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writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);
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@ -237,6 +249,7 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
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break;
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}
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ecc_initialized = true;
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return 0;
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}
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@ -264,13 +277,18 @@ static int ahci_qoriq_probe(struct platform_device *pdev)
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qoriq_priv->type = (enum ahci_qoriq_type)of_id->data;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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"sata-ecc");
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if (res) {
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qoriq_priv->ecc_addr = devm_ioremap_resource(dev, res);
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if (IS_ERR(qoriq_priv->ecc_addr))
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return PTR_ERR(qoriq_priv->ecc_addr);
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if (unlikely(!ecc_initialized)) {
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res = platform_get_resource_byname(pdev,
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IORESOURCE_MEM,
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"sata-ecc");
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if (res) {
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qoriq_priv->ecc_addr =
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devm_ioremap_resource(dev, res);
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if (IS_ERR(qoriq_priv->ecc_addr))
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return PTR_ERR(qoriq_priv->ecc_addr);
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}
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}
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qoriq_priv->is_dmacoherent = of_dma_is_coherent(np);
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rc = ahci_platform_enable_resources(hpriv);
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