Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer updates from Thomas Gleixner: "Yet another big pile of changes: - More year 2038 work from Arnd slowly reaching the point where we need to think about the syscalls themself. - A new timer function which allows to conditionally (re)arm a timer only when it's either not running or the new expiry time is sooner than the armed expiry time. This allows to use a single timer for multiple timeout requirements w/o caring about the first expiry time at the call site. - A new NMI safe accessor to clock real time for the printk timestamp work. Can be used by tracing, perf as well if required. - A large number of timer setup conversions from Kees which got collected here because either maintainers requested so or they simply got ignored. As Kees pointed out already there are a few trivial merge conflicts and some redundant commits which was unavoidable due to the size of this conversion effort. - Avoid a redundant iteration in the timer wheel softirq processing. - Provide a mechanism to treat RTC implementations depending on their hardware properties, i.e. don't inflict the write at the 0.5 seconds boundary which originates from the PC CMOS RTC to all RTCs. No functional change as drivers need to be updated separately. - The usual small updates to core code clocksource drivers. Nothing really exciting" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (111 commits) timers: Add a function to start/reduce a timer pstore: Use ktime_get_real_fast_ns() instead of __getnstimeofday() timer: Prepare to change all DEFINE_TIMER() callbacks netfilter: ipvs: Convert timers to use timer_setup() scsi: qla2xxx: Convert timers to use timer_setup() block/aoe: discover_timer: Convert timers to use timer_setup() ide: Convert timers to use timer_setup() drbd: Convert timers to use timer_setup() mailbox: Convert timers to use timer_setup() crypto: Convert timers to use timer_setup() drivers/pcmcia: omap1: Fix error in automated timer conversion ARM: footbridge: Fix typo in timer conversion drivers/sgi-xp: Convert timers to use timer_setup() drivers/pcmcia: Convert timers to use timer_setup() drivers/memstick: Convert timers to use timer_setup() drivers/macintosh: Convert timers to use timer_setup() hwrng/xgene-rng: Convert timers to use timer_setup() auxdisplay: Convert timers to use timer_setup() sparc/led: Convert timers to use timer_setup() mips: ip22/32: Convert timers to use timer_setup() ...
This commit is contained in:
commit
2bcc673101
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@ -20,16 +20,16 @@ Required Properties:
|
|||
(CMT1 on sh73a0 and r8a7740)
|
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This is a fallback for the above renesas,cmt-48-* entries.
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||||
|
||||
- "renesas,cmt0-r8a73a4" for the 32-bit CMT0 device included in r8a73a4.
|
||||
- "renesas,cmt1-r8a73a4" for the 48-bit CMT1 device included in r8a73a4.
|
||||
- "renesas,cmt0-r8a7790" for the 32-bit CMT0 device included in r8a7790.
|
||||
- "renesas,cmt1-r8a7790" for the 48-bit CMT1 device included in r8a7790.
|
||||
- "renesas,cmt0-r8a7791" for the 32-bit CMT0 device included in r8a7791.
|
||||
- "renesas,cmt1-r8a7791" for the 48-bit CMT1 device included in r8a7791.
|
||||
- "renesas,cmt0-r8a7793" for the 32-bit CMT0 device included in r8a7793.
|
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- "renesas,cmt1-r8a7793" for the 48-bit CMT1 device included in r8a7793.
|
||||
- "renesas,cmt0-r8a7794" for the 32-bit CMT0 device included in r8a7794.
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- "renesas,cmt1-r8a7794" for the 48-bit CMT1 device included in r8a7794.
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- "renesas,r8a73a4-cmt0" for the 32-bit CMT0 device included in r8a73a4.
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- "renesas,r8a73a4-cmt1" for the 48-bit CMT1 device included in r8a73a4.
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- "renesas,r8a7790-cmt0" for the 32-bit CMT0 device included in r8a7790.
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- "renesas,r8a7790-cmt1" for the 48-bit CMT1 device included in r8a7790.
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- "renesas,r8a7791-cmt0" for the 32-bit CMT0 device included in r8a7791.
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- "renesas,r8a7791-cmt1" for the 48-bit CMT1 device included in r8a7791.
|
||||
- "renesas,r8a7793-cmt0" for the 32-bit CMT0 device included in r8a7793.
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- "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793.
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- "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794.
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- "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794.
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- "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2.
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- "renesas,rcar-gen2-cmt1" for 48-bit CMT1 devices included in R-Car Gen2.
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@ -46,7 +46,7 @@ Required Properties:
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Example: R8A7790 (R-Car H2) CMT0 and CMT1 nodes
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cmt0: timer@ffca0000 {
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compatible = "renesas,cmt0-r8a7790", "renesas,rcar-gen2-cmt0";
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compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
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reg = <0 0xffca0000 0 0x1004>;
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interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
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<0 142 IRQ_TYPE_LEVEL_HIGH>;
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|
@ -55,7 +55,7 @@ Example: R8A7790 (R-Car H2) CMT0 and CMT1 nodes
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};
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cmt1: timer@e6130000 {
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compatible = "renesas,cmt1-r8a7790", "renesas,rcar-gen2-cmt1";
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compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
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reg = <0 0xe6130000 0 0x1004>;
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interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>,
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<0 121 IRQ_TYPE_LEVEL_HIGH>,
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|
|
|
@ -3444,7 +3444,8 @@ M: Thomas Gleixner <tglx@linutronix.de>
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L: linux-kernel@vger.kernel.org
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core
|
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S: Supported
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F: drivers/clocksource
|
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F: drivers/clocksource/
|
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F: Documentation/devicetree/bindings/timer/
|
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|
||||
CMPC ACPI DRIVER
|
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M: Thadeu Lima de Souza Cascardo <cascardo@holoscopio.com>
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|
|
|
@ -136,19 +136,14 @@ struct pci_ops dc21285_ops = {
|
|||
static struct timer_list serr_timer;
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static struct timer_list perr_timer;
|
||||
|
||||
static void dc21285_enable_error(unsigned long __data)
|
||||
static void dc21285_enable_error(struct timer_list *timer)
|
||||
{
|
||||
switch (__data) {
|
||||
case IRQ_PCI_SERR:
|
||||
del_timer(&serr_timer);
|
||||
break;
|
||||
del_timer(timer);
|
||||
|
||||
case IRQ_PCI_PERR:
|
||||
del_timer(&perr_timer);
|
||||
break;
|
||||
}
|
||||
|
||||
enable_irq(__data);
|
||||
if (timer == &serr_timer)
|
||||
enable_irq(IRQ_PCI_SERR);
|
||||
else if (timer == &perr_timer)
|
||||
enable_irq(IRQ_PCI_PERR);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -323,13 +318,8 @@ void __init dc21285_preinit(void)
|
|||
*CSR_PCICMD = (*CSR_PCICMD & 0xffff) | PCICMD_ERROR_BITS;
|
||||
}
|
||||
|
||||
init_timer(&serr_timer);
|
||||
init_timer(&perr_timer);
|
||||
|
||||
serr_timer.data = IRQ_PCI_SERR;
|
||||
serr_timer.function = dc21285_enable_error;
|
||||
perr_timer.data = IRQ_PCI_PERR;
|
||||
perr_timer.function = dc21285_enable_error;
|
||||
timer_setup(&serr_timer, dc21285_enable_error, 0);
|
||||
timer_setup(&perr_timer, dc21285_enable_error, 0);
|
||||
|
||||
/*
|
||||
* We don't care if these fail.
|
||||
|
|
|
@ -175,7 +175,7 @@ static int power_button_countdown;
|
|||
#define PBUTTON_HOLDDOWN_COUNT 4 /* 2 secs */
|
||||
|
||||
static void dsmg600_power_handler(unsigned long data);
|
||||
static DEFINE_TIMER(dsmg600_power_timer, dsmg600_power_handler, 0, 0);
|
||||
static DEFINE_TIMER(dsmg600_power_timer, dsmg600_power_handler);
|
||||
|
||||
static void dsmg600_power_handler(unsigned long data)
|
||||
{
|
||||
|
|
|
@ -198,7 +198,7 @@ static int power_button_countdown;
|
|||
#define PBUTTON_HOLDDOWN_COUNT 4 /* 2 secs */
|
||||
|
||||
static void nas100d_power_handler(unsigned long data);
|
||||
static DEFINE_TIMER(nas100d_power_timer, nas100d_power_handler, 0, 0);
|
||||
static DEFINE_TIMER(nas100d_power_timer, nas100d_power_handler);
|
||||
|
||||
static void nas100d_power_handler(unsigned long data)
|
||||
{
|
||||
|
|
|
@ -381,14 +381,11 @@ static struct pxafb_mach_info sharp_lm8v31 = {
|
|||
|
||||
#define MMC_POLL_RATE msecs_to_jiffies(1000)
|
||||
|
||||
static void lubbock_mmc_poll(unsigned long);
|
||||
static irq_handler_t mmc_detect_int;
|
||||
static void *mmc_detect_int_data;
|
||||
static struct timer_list mmc_timer;
|
||||
|
||||
static struct timer_list mmc_timer = {
|
||||
.function = lubbock_mmc_poll,
|
||||
};
|
||||
|
||||
static void lubbock_mmc_poll(unsigned long data)
|
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static void lubbock_mmc_poll(struct timer_list *unused)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
|
@ -401,7 +398,7 @@ static void lubbock_mmc_poll(unsigned long data)
|
|||
if (LUB_IRQ_SET_CLR & (1 << 0))
|
||||
mod_timer(&mmc_timer, jiffies + MMC_POLL_RATE);
|
||||
else {
|
||||
(void) mmc_detect_int(LUBBOCK_SD_IRQ, (void *)data);
|
||||
(void) mmc_detect_int(LUBBOCK_SD_IRQ, mmc_detect_int_data);
|
||||
enable_irq(LUBBOCK_SD_IRQ);
|
||||
}
|
||||
}
|
||||
|
@ -421,8 +418,8 @@ static int lubbock_mci_init(struct device *dev,
|
|||
{
|
||||
/* detect card insert/eject */
|
||||
mmc_detect_int = detect_int;
|
||||
init_timer(&mmc_timer);
|
||||
mmc_timer.data = (unsigned long) data;
|
||||
mmc_detect_int_data = data;
|
||||
timer_setup(&mmc_timer, lubbock_mmc_poll, 0);
|
||||
return request_irq(LUBBOCK_SD_IRQ, lubbock_detect_int,
|
||||
0, "lubbock-sd-detect", data);
|
||||
}
|
||||
|
|
|
@ -341,7 +341,7 @@ static void sharpsl_charge_toggle(struct work_struct *private_)
|
|||
sharpsl_pm.charge_start_time = jiffies;
|
||||
}
|
||||
|
||||
static void sharpsl_ac_timer(unsigned long data)
|
||||
static void sharpsl_ac_timer(struct timer_list *unused)
|
||||
{
|
||||
int acin = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN);
|
||||
|
||||
|
@ -366,7 +366,7 @@ static irqreturn_t sharpsl_ac_isr(int irq, void *dev_id)
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void sharpsl_chrg_full_timer(unsigned long data)
|
||||
static void sharpsl_chrg_full_timer(struct timer_list *unused)
|
||||
{
|
||||
dev_dbg(sharpsl_pm.dev, "Charge Full at time: %lx\n", jiffies);
|
||||
|
||||
|
@ -841,9 +841,9 @@ static int sharpsl_pm_probe(struct platform_device *pdev)
|
|||
sharpsl_pm.charge_mode = CHRG_OFF;
|
||||
sharpsl_pm.flags = 0;
|
||||
|
||||
setup_timer(&sharpsl_pm.ac_timer, sharpsl_ac_timer, 0UL);
|
||||
timer_setup(&sharpsl_pm.ac_timer, sharpsl_ac_timer, 0);
|
||||
|
||||
setup_timer(&sharpsl_pm.chrg_full_timer, sharpsl_chrg_full_timer, 0UL);
|
||||
timer_setup(&sharpsl_pm.chrg_full_timer, sharpsl_chrg_full_timer, 0);
|
||||
|
||||
led_trigger_register_simple("sharpsl-charge", &sharpsl_charge_led_trigger);
|
||||
|
||||
|
|
|
@ -17,6 +17,8 @@
|
|||
#include <asm/sn/types.h>
|
||||
#include <asm/sn/shub_mmr.h>
|
||||
|
||||
struct nodepda_s;
|
||||
|
||||
#define IBCT_NOTIFY (0x1UL << 4)
|
||||
#define IBCT_ZFIL_MODE (0x1UL << 0)
|
||||
|
||||
|
@ -210,7 +212,7 @@ struct bteinfo_s {
|
|||
*/
|
||||
extern bte_result_t bte_copy(u64, u64, u64, u64, void *);
|
||||
extern bte_result_t bte_unaligned_copy(u64, u64, u64, u64);
|
||||
extern void bte_error_handler(unsigned long);
|
||||
extern void bte_error_handler(struct nodepda_s *);
|
||||
|
||||
#define bte_zero(dest, len, mode, notification) \
|
||||
bte_copy(0, dest, len, ((mode) | BTE_ZERO_FILL), notification)
|
||||
|
|
|
@ -1513,7 +1513,7 @@ ia64_mca_cmc_int_caller(int cmc_irq, void *arg)
|
|||
*
|
||||
*/
|
||||
static void
|
||||
ia64_mca_cmc_poll (unsigned long dummy)
|
||||
ia64_mca_cmc_poll (struct timer_list *unused)
|
||||
{
|
||||
/* Trigger a CMC interrupt cascade */
|
||||
platform_send_ipi(cpumask_first(cpu_online_mask), IA64_CMCP_VECTOR,
|
||||
|
@ -1590,7 +1590,7 @@ ia64_mca_cpe_int_caller(int cpe_irq, void *arg)
|
|||
*
|
||||
*/
|
||||
static void
|
||||
ia64_mca_cpe_poll (unsigned long dummy)
|
||||
ia64_mca_cpe_poll (struct timer_list *unused)
|
||||
{
|
||||
/* Trigger a CPE interrupt cascade */
|
||||
platform_send_ipi(cpumask_first(cpu_online_mask), IA64_CPEP_VECTOR,
|
||||
|
@ -2098,7 +2098,7 @@ ia64_mca_late_init(void)
|
|||
return 0;
|
||||
|
||||
/* Setup the CMCI/P vector and handler */
|
||||
setup_timer(&cmc_poll_timer, ia64_mca_cmc_poll, 0UL);
|
||||
timer_setup(&cmc_poll_timer, ia64_mca_cmc_poll, 0);
|
||||
|
||||
/* Unmask/enable the vector */
|
||||
cmc_polling_enabled = 0;
|
||||
|
@ -2109,7 +2109,7 @@ ia64_mca_late_init(void)
|
|||
#ifdef CONFIG_ACPI
|
||||
/* Setup the CPEI/P vector and handler */
|
||||
cpe_vector = acpi_request_vector(ACPI_INTERRUPT_CPEI);
|
||||
setup_timer(&cpe_poll_timer, ia64_mca_cpe_poll, 0UL);
|
||||
timer_setup(&cpe_poll_timer, ia64_mca_cpe_poll, 0);
|
||||
|
||||
{
|
||||
unsigned int irq;
|
||||
|
|
|
@ -263,7 +263,7 @@ salinfo_timeout_check(struct salinfo_data *data)
|
|||
}
|
||||
|
||||
static void
|
||||
salinfo_timeout (unsigned long arg)
|
||||
salinfo_timeout(struct timer_list *unused)
|
||||
{
|
||||
ia64_mlogbuf_dump();
|
||||
salinfo_timeout_check(salinfo_data + SAL_INFO_TYPE_MCA);
|
||||
|
@ -623,9 +623,8 @@ salinfo_init(void)
|
|||
|
||||
*sdir++ = salinfo_dir;
|
||||
|
||||
init_timer(&salinfo_timer);
|
||||
timer_setup(&salinfo_timer, salinfo_timeout, 0);
|
||||
salinfo_timer.expires = jiffies + SALINFO_TIMER_DELAY;
|
||||
salinfo_timer.function = &salinfo_timeout;
|
||||
add_timer(&salinfo_timer);
|
||||
|
||||
i = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "ia64/salinfo:online",
|
||||
|
|
|
@ -219,7 +219,7 @@ retry_bteop:
|
|||
BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na) );
|
||||
bte->bte_error_count++;
|
||||
bte->bh_error = IBLS_ERROR;
|
||||
bte_error_handler((unsigned long)NODEPDA(bte->bte_cnode));
|
||||
bte_error_handler(NODEPDA(bte->bte_cnode));
|
||||
*bte->most_rcnt_na = BTE_WORD_AVAILABLE;
|
||||
goto retry_bteop;
|
||||
}
|
||||
|
@ -414,6 +414,12 @@ EXPORT_SYMBOL(bte_unaligned_copy);
|
|||
* Block Transfer Engine initialization functions.
|
||||
*
|
||||
***********************************************************************/
|
||||
static void bte_recovery_timeout(struct timer_list *t)
|
||||
{
|
||||
struct nodepda_s *nodepda = from_timer(nodepda, t, bte_recovery_timer);
|
||||
|
||||
bte_error_handler(nodepda);
|
||||
}
|
||||
|
||||
/*
|
||||
* bte_init_node(nodepda, cnode)
|
||||
|
@ -436,9 +442,7 @@ void bte_init_node(nodepda_t * mynodepda, cnodeid_t cnode)
|
|||
* will point at this one bte_recover structure to get the lock.
|
||||
*/
|
||||
spin_lock_init(&mynodepda->bte_recovery_lock);
|
||||
init_timer(&mynodepda->bte_recovery_timer);
|
||||
mynodepda->bte_recovery_timer.function = bte_error_handler;
|
||||
mynodepda->bte_recovery_timer.data = (unsigned long)mynodepda;
|
||||
timer_setup(&mynodepda->bte_recovery_timer, bte_recovery_timeout, 0);
|
||||
|
||||
for (i = 0; i < BTES_PER_NODE; i++) {
|
||||
u64 *base_addr;
|
||||
|
|
|
@ -27,15 +27,12 @@
|
|||
* transfers to be queued.
|
||||
*/
|
||||
|
||||
void bte_error_handler(unsigned long);
|
||||
|
||||
/*
|
||||
* Wait until all BTE related CRBs are completed
|
||||
* and then reset the interfaces.
|
||||
*/
|
||||
int shub1_bte_error_handler(unsigned long _nodepda)
|
||||
static int shub1_bte_error_handler(struct nodepda_s *err_nodepda)
|
||||
{
|
||||
struct nodepda_s *err_nodepda = (struct nodepda_s *)_nodepda;
|
||||
struct timer_list *recovery_timer = &err_nodepda->bte_recovery_timer;
|
||||
nasid_t nasid;
|
||||
int i;
|
||||
|
@ -131,9 +128,8 @@ int shub1_bte_error_handler(unsigned long _nodepda)
|
|||
* Wait until all BTE related CRBs are completed
|
||||
* and then reset the interfaces.
|
||||
*/
|
||||
int shub2_bte_error_handler(unsigned long _nodepda)
|
||||
static int shub2_bte_error_handler(struct nodepda_s *err_nodepda)
|
||||
{
|
||||
struct nodepda_s *err_nodepda = (struct nodepda_s *)_nodepda;
|
||||
struct timer_list *recovery_timer = &err_nodepda->bte_recovery_timer;
|
||||
struct bteinfo_s *bte;
|
||||
nasid_t nasid;
|
||||
|
@ -170,9 +166,8 @@ int shub2_bte_error_handler(unsigned long _nodepda)
|
|||
* Wait until all BTE related CRBs are completed
|
||||
* and then reset the interfaces.
|
||||
*/
|
||||
void bte_error_handler(unsigned long _nodepda)
|
||||
void bte_error_handler(struct nodepda_s *err_nodepda)
|
||||
{
|
||||
struct nodepda_s *err_nodepda = (struct nodepda_s *)_nodepda;
|
||||
spinlock_t *recovery_lock = &err_nodepda->bte_recovery_lock;
|
||||
int i;
|
||||
unsigned long irq_flags;
|
||||
|
@ -199,12 +194,12 @@ void bte_error_handler(unsigned long _nodepda)
|
|||
}
|
||||
|
||||
if (is_shub1()) {
|
||||
if (shub1_bte_error_handler(_nodepda)) {
|
||||
if (shub1_bte_error_handler(err_nodepda)) {
|
||||
spin_unlock_irqrestore(recovery_lock, irq_flags);
|
||||
return;
|
||||
}
|
||||
} else {
|
||||
if (shub2_bte_error_handler(_nodepda)) {
|
||||
if (shub2_bte_error_handler(err_nodepda)) {
|
||||
spin_unlock_irqrestore(recovery_lock, irq_flags);
|
||||
return;
|
||||
}
|
||||
|
@ -255,6 +250,6 @@ bte_crb_error_handler(cnodeid_t cnode, int btenum,
|
|||
|
||||
BTE_PRINTK(("Got an error on cnode %d bte %d: HW error type 0x%x\n",
|
||||
bte->bte_cnode, bte->bte_num, ioe->ie_errortype));
|
||||
bte_error_handler((unsigned long) NODEPDA(cnode));
|
||||
bte_error_handler(NODEPDA(cnode));
|
||||
}
|
||||
|
||||
|
|
|
@ -50,7 +50,7 @@ static irqreturn_t hub_eint_handler(int irq, void *arg)
|
|||
if ((int)ret_stuff.v0)
|
||||
panic("%s: Fatal TIO Error", __func__);
|
||||
} else
|
||||
bte_error_handler((unsigned long)NODEPDA(nasid_to_cnodeid(nasid)));
|
||||
bte_error_handler(NODEPDA(nasid_to_cnodeid(nasid)));
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
|
|
@ -72,7 +72,7 @@ static void sn_cpei_handler(int irq, void *devid, struct pt_regs *regs)
|
|||
ia64_sn_plat_cpei_handler();
|
||||
}
|
||||
|
||||
static void sn_cpei_timer_handler(unsigned long dummy)
|
||||
static void sn_cpei_timer_handler(struct timer_list *unused)
|
||||
{
|
||||
sn_cpei_handler(-1, NULL, NULL);
|
||||
mod_timer(&sn_cpei_timer, jiffies + CPEI_INTERVAL);
|
||||
|
@ -80,9 +80,8 @@ static void sn_cpei_timer_handler(unsigned long dummy)
|
|||
|
||||
void sn_init_cpei_timer(void)
|
||||
{
|
||||
init_timer(&sn_cpei_timer);
|
||||
timer_setup(&sn_cpei_timer, sn_cpei_timer_handler, 0);
|
||||
sn_cpei_timer.expires = jiffies + CPEI_INTERVAL;
|
||||
sn_cpei_timer.function = sn_cpei_timer_handler;
|
||||
add_timer(&sn_cpei_timer);
|
||||
}
|
||||
|
||||
|
|
|
@ -66,7 +66,7 @@ void __init amiga_init_sound(void)
|
|||
}
|
||||
|
||||
static void nosound( unsigned long ignored );
|
||||
static DEFINE_TIMER(sound_timer, nosound, 0, 0);
|
||||
static DEFINE_TIMER(sound_timer, nosound);
|
||||
|
||||
void amiga_mksound( unsigned int hz, unsigned int ticks )
|
||||
{
|
||||
|
|
|
@ -57,7 +57,7 @@ static void ( *mac_special_bell )( unsigned int, unsigned int, unsigned int );
|
|||
/*
|
||||
* our timer to start/continue/stop the bell
|
||||
*/
|
||||
static DEFINE_TIMER(mac_sound_timer, mac_nosound, 0, 0);
|
||||
static DEFINE_TIMER(mac_sound_timer, mac_nosound);
|
||||
|
||||
/*
|
||||
* Sort of initialize the sound chip (called from mac_mksound on the first
|
||||
|
|
|
@ -36,10 +36,10 @@ void mips_display_message(const char *str)
|
|||
}
|
||||
}
|
||||
|
||||
static void scroll_display_message(unsigned long data);
|
||||
static DEFINE_TIMER(mips_scroll_timer, scroll_display_message, HZ, 0);
|
||||
static void scroll_display_message(unsigned long unused);
|
||||
static DEFINE_TIMER(mips_scroll_timer, scroll_display_message);
|
||||
|
||||
static void scroll_display_message(unsigned long data)
|
||||
static void scroll_display_message(unsigned long unused)
|
||||
{
|
||||
mips_display_message(&display_string[display_count++]);
|
||||
if (display_count == max_display_count)
|
||||
|
|
|
@ -38,6 +38,7 @@
|
|||
#define PANIC_FREQ (HZ / 8)
|
||||
|
||||
static struct timer_list power_timer, blink_timer, debounce_timer;
|
||||
static unsigned long blink_timer_timeout;
|
||||
|
||||
#define MACHINE_PANICED 1
|
||||
#define MACHINE_SHUTTING_DOWN 2
|
||||
|
@ -81,21 +82,21 @@ static void __noreturn sgi_machine_halt(void)
|
|||
ArcEnterInteractiveMode();
|
||||
}
|
||||
|
||||
static void power_timeout(unsigned long data)
|
||||
static void power_timeout(struct timer_list *unused)
|
||||
{
|
||||
sgi_machine_power_off();
|
||||
}
|
||||
|
||||
static void blink_timeout(unsigned long data)
|
||||
static void blink_timeout(struct timer_list *unused)
|
||||
{
|
||||
/* XXX fix this for fullhouse */
|
||||
sgi_ioc_reset ^= (SGIOC_RESET_LC0OFF|SGIOC_RESET_LC1OFF);
|
||||
sgioc->reset = sgi_ioc_reset;
|
||||
|
||||
mod_timer(&blink_timer, jiffies + data);
|
||||
mod_timer(&blink_timer, jiffies + blink_timer_timeout);
|
||||
}
|
||||
|
||||
static void debounce(unsigned long data)
|
||||
static void debounce(struct timer_list *unused)
|
||||
{
|
||||
del_timer(&debounce_timer);
|
||||
if (sgint->istat1 & SGINT_ISTAT1_PWR) {
|
||||
|
@ -128,11 +129,10 @@ static inline void power_button(void)
|
|||
}
|
||||
|
||||
machine_state |= MACHINE_SHUTTING_DOWN;
|
||||
blink_timer.data = POWERDOWN_FREQ;
|
||||
blink_timeout(POWERDOWN_FREQ);
|
||||
blink_timer_timeout = POWERDOWN_FREQ;
|
||||
blink_timeout(&blink_timer);
|
||||
|
||||
init_timer(&power_timer);
|
||||
power_timer.function = power_timeout;
|
||||
timer_setup(&power_timer, power_timeout, 0);
|
||||
power_timer.expires = jiffies + POWERDOWN_TIMEOUT * HZ;
|
||||
add_timer(&power_timer);
|
||||
}
|
||||
|
@ -147,8 +147,7 @@ static irqreturn_t panel_int(int irq, void *dev_id)
|
|||
if (sgint->istat1 & SGINT_ISTAT1_PWR) {
|
||||
/* Wait until interrupt goes away */
|
||||
disable_irq_nosync(SGI_PANEL_IRQ);
|
||||
init_timer(&debounce_timer);
|
||||
debounce_timer.function = debounce;
|
||||
timer_setup(&debounce_timer, debounce, 0);
|
||||
debounce_timer.expires = jiffies + 5;
|
||||
add_timer(&debounce_timer);
|
||||
}
|
||||
|
@ -171,8 +170,8 @@ static int panic_event(struct notifier_block *this, unsigned long event,
|
|||
return NOTIFY_DONE;
|
||||
machine_state |= MACHINE_PANICED;
|
||||
|
||||
blink_timer.data = PANIC_FREQ;
|
||||
blink_timeout(PANIC_FREQ);
|
||||
blink_timer_timeout = PANIC_FREQ;
|
||||
blink_timeout(&blink_timer);
|
||||
|
||||
return NOTIFY_DONE;
|
||||
}
|
||||
|
@ -195,8 +194,7 @@ static int __init reboot_setup(void)
|
|||
return res;
|
||||
}
|
||||
|
||||
init_timer(&blink_timer);
|
||||
blink_timer.function = blink_timeout;
|
||||
timer_setup(&blink_timer, blink_timeout, 0);
|
||||
atomic_notifier_chain_register(&panic_notifier_list, &panic_block);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -38,6 +38,7 @@
|
|||
extern struct platform_device ip32_rtc_device;
|
||||
|
||||
static struct timer_list power_timer, blink_timer;
|
||||
static unsigned long blink_timer_timeout;
|
||||
static int has_panicked, shutting_down;
|
||||
|
||||
static __noreturn void ip32_poweroff(void *data)
|
||||
|
@ -71,11 +72,11 @@ static void ip32_machine_restart(char *cmd)
|
|||
unreachable();
|
||||
}
|
||||
|
||||
static void blink_timeout(unsigned long data)
|
||||
static void blink_timeout(struct timer_list *unused)
|
||||
{
|
||||
unsigned long led = mace->perif.ctrl.misc ^ MACEISA_LED_RED;
|
||||
mace->perif.ctrl.misc = led;
|
||||
mod_timer(&blink_timer, jiffies + data);
|
||||
mod_timer(&blink_timer, jiffies + blink_timer_timeout);
|
||||
}
|
||||
|
||||
static void ip32_machine_halt(void)
|
||||
|
@ -83,7 +84,7 @@ static void ip32_machine_halt(void)
|
|||
ip32_poweroff(&ip32_rtc_device);
|
||||
}
|
||||
|
||||
static void power_timeout(unsigned long data)
|
||||
static void power_timeout(struct timer_list *unused)
|
||||
{
|
||||
ip32_poweroff(&ip32_rtc_device);
|
||||
}
|
||||
|
@ -99,11 +100,10 @@ void ip32_prepare_poweroff(void)
|
|||
}
|
||||
|
||||
shutting_down = 1;
|
||||
blink_timer.data = POWERDOWN_FREQ;
|
||||
blink_timeout(POWERDOWN_FREQ);
|
||||
blink_timer_timeout = POWERDOWN_FREQ;
|
||||
blink_timeout(&blink_timer);
|
||||
|
||||
init_timer(&power_timer);
|
||||
power_timer.function = power_timeout;
|
||||
timer_setup(&power_timer, power_timeout, 0);
|
||||
power_timer.expires = jiffies + POWERDOWN_TIMEOUT * HZ;
|
||||
add_timer(&power_timer);
|
||||
}
|
||||
|
@ -121,8 +121,8 @@ static int panic_event(struct notifier_block *this, unsigned long event,
|
|||
led = mace->perif.ctrl.misc | MACEISA_LED_GREEN;
|
||||
mace->perif.ctrl.misc = led;
|
||||
|
||||
blink_timer.data = PANIC_FREQ;
|
||||
blink_timeout(PANIC_FREQ);
|
||||
blink_timer_timeout = PANIC_FREQ;
|
||||
blink_timeout(&blink_timer);
|
||||
|
||||
return NOTIFY_DONE;
|
||||
}
|
||||
|
@ -143,8 +143,7 @@ static __init int ip32_reboot_setup(void)
|
|||
_machine_halt = ip32_machine_halt;
|
||||
pm_power_off = ip32_machine_halt;
|
||||
|
||||
init_timer(&blink_timer);
|
||||
blink_timer.function = blink_timeout;
|
||||
timer_setup(&blink_timer, blink_timeout, 0);
|
||||
atomic_notifier_chain_register(&panic_notifier_list, &panic_block);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -92,7 +92,7 @@ static int pdc_console_setup(struct console *co, char *options)
|
|||
#define PDC_CONS_POLL_DELAY (30 * HZ / 1000)
|
||||
|
||||
static void pdc_console_poll(unsigned long unused);
|
||||
static DEFINE_TIMER(pdc_console_timer, pdc_console_poll, 0, 0);
|
||||
static DEFINE_TIMER(pdc_console_timer, pdc_console_poll);
|
||||
static struct tty_port tty_port;
|
||||
|
||||
static int pdc_console_tty_open(struct tty_struct *tty, struct file *filp)
|
||||
|
|
|
@ -262,9 +262,8 @@ static void wd_timer_reset(unsigned int cpu, struct timer_list *t)
|
|||
add_timer_on(t, cpu);
|
||||
}
|
||||
|
||||
static void wd_timer_fn(unsigned long data)
|
||||
static void wd_timer_fn(struct timer_list *t)
|
||||
{
|
||||
struct timer_list *t = this_cpu_ptr(&wd_timer);
|
||||
int cpu = smp_processor_id();
|
||||
|
||||
watchdog_timer_interrupt(cpu);
|
||||
|
@ -288,7 +287,7 @@ static void start_watchdog_timer_on(unsigned int cpu)
|
|||
|
||||
per_cpu(wd_timer_tb, cpu) = get_tb();
|
||||
|
||||
setup_pinned_timer(t, wd_timer_fn, 0);
|
||||
timer_setup(t, wd_timer_fn, TIMER_PINNED);
|
||||
wd_timer_reset(cpu, t);
|
||||
}
|
||||
|
||||
|
|
|
@ -1452,7 +1452,7 @@ static void topology_schedule_update(void)
|
|||
schedule_work(&topology_work);
|
||||
}
|
||||
|
||||
static void topology_timer_fn(unsigned long ignored)
|
||||
static void topology_timer_fn(struct timer_list *unused)
|
||||
{
|
||||
if (prrn_enabled && cpumask_weight(&cpu_associativity_changes_mask))
|
||||
topology_schedule_update();
|
||||
|
@ -1462,14 +1462,11 @@ static void topology_timer_fn(unsigned long ignored)
|
|||
reset_topology_timer();
|
||||
}
|
||||
}
|
||||
static struct timer_list topology_timer =
|
||||
TIMER_INITIALIZER(topology_timer_fn, 0, 0);
|
||||
static struct timer_list topology_timer;
|
||||
|
||||
static void reset_topology_timer(void)
|
||||
{
|
||||
topology_timer.data = 0;
|
||||
topology_timer.expires = jiffies + 60 * HZ;
|
||||
mod_timer(&topology_timer, topology_timer.expires);
|
||||
mod_timer(&topology_timer, jiffies + 60 * HZ);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
|
@ -1529,7 +1526,8 @@ int start_topology_update(void)
|
|||
prrn_enabled = 0;
|
||||
vphn_enabled = 1;
|
||||
setup_cpu_associativity_change_counters();
|
||||
init_timer_deferrable(&topology_timer);
|
||||
timer_setup(&topology_timer, topology_timer_fn,
|
||||
TIMER_DEFERRABLE);
|
||||
reset_topology_timer();
|
||||
}
|
||||
}
|
||||
|
|
|
@ -153,14 +153,13 @@ static void lgr_timer_set(void);
|
|||
/*
|
||||
* LGR timer callback
|
||||
*/
|
||||
static void lgr_timer_fn(unsigned long ignored)
|
||||
static void lgr_timer_fn(struct timer_list *unused)
|
||||
{
|
||||
lgr_info_log();
|
||||
lgr_timer_set();
|
||||
}
|
||||
|
||||
static struct timer_list lgr_timer =
|
||||
TIMER_DEFERRED_INITIALIZER(lgr_timer_fn, 0, 0);
|
||||
static struct timer_list lgr_timer;
|
||||
|
||||
/*
|
||||
* Setup next LGR timer
|
||||
|
@ -181,6 +180,7 @@ static int __init lgr_init(void)
|
|||
debug_register_view(lgr_dbf, &debug_hex_ascii_view);
|
||||
lgr_info_get(&lgr_info_last);
|
||||
debug_event(lgr_dbf, 1, &lgr_info_last, sizeof(lgr_info_last));
|
||||
timer_setup(&lgr_timer, lgr_timer_fn, TIMER_DEFERRABLE);
|
||||
lgr_timer_set();
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -330,15 +330,14 @@ static void topology_flush_work(void)
|
|||
flush_work(&topology_work);
|
||||
}
|
||||
|
||||
static void topology_timer_fn(unsigned long ignored)
|
||||
static void topology_timer_fn(struct timer_list *unused)
|
||||
{
|
||||
if (ptf(PTF_CHECK))
|
||||
topology_schedule_update();
|
||||
set_topology_timer();
|
||||
}
|
||||
|
||||
static struct timer_list topology_timer =
|
||||
TIMER_DEFERRED_INITIALIZER(topology_timer_fn, 0, 0);
|
||||
static struct timer_list topology_timer;
|
||||
|
||||
static atomic_t topology_poll = ATOMIC_INIT(0);
|
||||
|
||||
|
@ -638,6 +637,7 @@ static struct ctl_table topology_dir_table[] = {
|
|||
|
||||
static int __init topology_init(void)
|
||||
{
|
||||
timer_setup(&topology_timer, topology_timer_fn, TIMER_DEFERRABLE);
|
||||
if (MACHINE_HAS_TOPOLOGY)
|
||||
set_topology_timer();
|
||||
else
|
||||
|
|
|
@ -56,7 +56,7 @@ static DEFINE_SPINLOCK(cmm_lock);
|
|||
|
||||
static struct task_struct *cmm_thread_ptr;
|
||||
static DECLARE_WAIT_QUEUE_HEAD(cmm_thread_wait);
|
||||
static DEFINE_TIMER(cmm_timer, NULL, 0, 0);
|
||||
static DEFINE_TIMER(cmm_timer, NULL);
|
||||
|
||||
static void cmm_timer_fn(unsigned long);
|
||||
static void cmm_set_timer(void);
|
||||
|
|
|
@ -31,19 +31,20 @@ static inline void led_toggle(void)
|
|||
}
|
||||
|
||||
static struct timer_list led_blink_timer;
|
||||
static unsigned long led_blink_timer_timeout;
|
||||
|
||||
static void led_blink(unsigned long timeout)
|
||||
static void led_blink(struct timer_list *unused)
|
||||
{
|
||||
unsigned long timeout = led_blink_timer_timeout;
|
||||
|
||||
led_toggle();
|
||||
|
||||
/* reschedule */
|
||||
if (!timeout) { /* blink according to load */
|
||||
led_blink_timer.expires = jiffies +
|
||||
((1 + (avenrun[0] >> FSHIFT)) * HZ);
|
||||
led_blink_timer.data = 0;
|
||||
} else { /* blink at user specified interval */
|
||||
led_blink_timer.expires = jiffies + (timeout * HZ);
|
||||
led_blink_timer.data = timeout;
|
||||
}
|
||||
add_timer(&led_blink_timer);
|
||||
}
|
||||
|
@ -88,9 +89,11 @@ static ssize_t led_proc_write(struct file *file, const char __user *buffer,
|
|||
} else if (!strcmp(buf, "toggle")) {
|
||||
led_toggle();
|
||||
} else if ((*buf > '0') && (*buf <= '9')) {
|
||||
led_blink(simple_strtoul(buf, NULL, 10));
|
||||
led_blink_timer_timeout = simple_strtoul(buf, NULL, 10);
|
||||
led_blink(&led_blink_timer);
|
||||
} else if (!strcmp(buf, "load")) {
|
||||
led_blink(0);
|
||||
led_blink_timer_timeout = 0;
|
||||
led_blink(&led_blink_timer);
|
||||
} else {
|
||||
auxio_set_led(AUXIO_LED_OFF);
|
||||
}
|
||||
|
@ -115,8 +118,7 @@ static struct proc_dir_entry *led;
|
|||
|
||||
static int __init led_init(void)
|
||||
{
|
||||
init_timer(&led_blink_timer);
|
||||
led_blink_timer.function = led_blink;
|
||||
timer_setup(&led_blink_timer, led_blink, 0);
|
||||
|
||||
led = proc_create("led", 0, NULL, &led_proc_fops);
|
||||
if (!led)
|
||||
|
|
|
@ -898,10 +898,9 @@ static void calioc2_dump_error_regs(struct iommu_table *tbl)
|
|||
PHB_ROOT_COMPLEX_STATUS);
|
||||
}
|
||||
|
||||
static void calgary_watchdog(unsigned long data)
|
||||
static void calgary_watchdog(struct timer_list *t)
|
||||
{
|
||||
struct pci_dev *dev = (struct pci_dev *)data;
|
||||
struct iommu_table *tbl = pci_iommu(dev->bus);
|
||||
struct iommu_table *tbl = from_timer(tbl, t, watchdog_timer);
|
||||
void __iomem *bbar = tbl->bbar;
|
||||
u32 val32;
|
||||
void __iomem *target;
|
||||
|
@ -1016,8 +1015,7 @@ static void __init calgary_enable_translation(struct pci_dev *dev)
|
|||
writel(cpu_to_be32(val32), target);
|
||||
readl(target); /* flush */
|
||||
|
||||
setup_timer(&tbl->watchdog_timer, &calgary_watchdog,
|
||||
(unsigned long)dev);
|
||||
timer_setup(&tbl->watchdog_timer, calgary_watchdog, 0);
|
||||
mod_timer(&tbl->watchdog_timer, jiffies);
|
||||
}
|
||||
|
||||
|
|
|
@ -47,15 +47,14 @@ static char *serial_name = "ISS serial driver";
|
|||
* initialization for the tty structure.
|
||||
*/
|
||||
|
||||
static void rs_poll(unsigned long);
|
||||
static void rs_poll(struct timer_list *);
|
||||
|
||||
static int rs_open(struct tty_struct *tty, struct file * filp)
|
||||
{
|
||||
tty->port = &serial_port;
|
||||
spin_lock_bh(&timer_lock);
|
||||
if (tty->count == 1) {
|
||||
setup_timer(&serial_timer, rs_poll,
|
||||
(unsigned long)&serial_port);
|
||||
timer_setup(&serial_timer, rs_poll, 0);
|
||||
mod_timer(&serial_timer, jiffies + SERIAL_TIMER_VALUE);
|
||||
}
|
||||
spin_unlock_bh(&timer_lock);
|
||||
|
@ -92,9 +91,9 @@ static int rs_write(struct tty_struct * tty,
|
|||
return count;
|
||||
}
|
||||
|
||||
static void rs_poll(unsigned long priv)
|
||||
static void rs_poll(struct timer_list *unused)
|
||||
{
|
||||
struct tty_port *port = (struct tty_port *)priv;
|
||||
struct tty_port *port = &serial_port;
|
||||
int i = 0;
|
||||
int rd = 1;
|
||||
unsigned char c;
|
||||
|
|
|
@ -349,9 +349,9 @@ static int iss_net_poll(void)
|
|||
}
|
||||
|
||||
|
||||
static void iss_net_timer(unsigned long priv)
|
||||
static void iss_net_timer(struct timer_list *t)
|
||||
{
|
||||
struct iss_net_private *lp = (struct iss_net_private *)priv;
|
||||
struct iss_net_private *lp = from_timer(lp, t, timer);
|
||||
|
||||
iss_net_poll();
|
||||
spin_lock(&lp->lock);
|
||||
|
@ -386,10 +386,8 @@ static int iss_net_open(struct net_device *dev)
|
|||
spin_unlock_bh(&opened_lock);
|
||||
spin_lock_bh(&lp->lock);
|
||||
|
||||
init_timer(&lp->timer);
|
||||
timer_setup(&lp->timer, iss_net_timer, 0);
|
||||
lp->timer_val = ISS_NET_TIMER_VALUE;
|
||||
lp->timer.data = (unsigned long) lp;
|
||||
lp->timer.function = iss_net_timer;
|
||||
mod_timer(&lp->timer, jiffies + lp->timer_val);
|
||||
|
||||
out:
|
||||
|
@ -482,7 +480,7 @@ static int iss_net_change_mtu(struct net_device *dev, int new_mtu)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
void iss_net_user_timer_expire(unsigned long _conn)
|
||||
void iss_net_user_timer_expire(struct timer_list *unused)
|
||||
{
|
||||
}
|
||||
|
||||
|
@ -582,8 +580,7 @@ static int iss_net_configure(int index, char *init)
|
|||
return 1;
|
||||
}
|
||||
|
||||
init_timer(&lp->tl);
|
||||
lp->tl.function = iss_net_user_timer_expire;
|
||||
timer_setup(&lp->tl, iss_net_user_timer_expire, 0);
|
||||
|
||||
return 0;
|
||||
|
||||
|
|
|
@ -774,9 +774,9 @@ static void ghes_add_timer(struct ghes *ghes)
|
|||
add_timer(&ghes->timer);
|
||||
}
|
||||
|
||||
static void ghes_poll_func(unsigned long data)
|
||||
static void ghes_poll_func(struct timer_list *t)
|
||||
{
|
||||
struct ghes *ghes = (void *)data;
|
||||
struct ghes *ghes = from_timer(ghes, t, timer);
|
||||
|
||||
ghes_proc(ghes);
|
||||
if (!(ghes->flags & GHES_EXITING))
|
||||
|
@ -1147,8 +1147,7 @@ static int ghes_probe(struct platform_device *ghes_dev)
|
|||
|
||||
switch (generic->notify.type) {
|
||||
case ACPI_HEST_NOTIFY_POLLED:
|
||||
setup_deferrable_timer(&ghes->timer, ghes_poll_func,
|
||||
(unsigned long)ghes);
|
||||
timer_setup(&ghes->timer, ghes_poll_func, TIMER_DEFERRABLE);
|
||||
ghes_add_timer(ghes);
|
||||
break;
|
||||
case ACPI_HEST_NOTIFY_EXTERNAL:
|
||||
|
|
|
@ -303,6 +303,7 @@ struct ahci_em_priv {
|
|||
unsigned long saved_activity;
|
||||
unsigned long activity;
|
||||
unsigned long led_state;
|
||||
struct ata_link *link;
|
||||
};
|
||||
|
||||
struct ahci_port_priv {
|
||||
|
|
|
@ -968,12 +968,12 @@ static void ahci_sw_activity(struct ata_link *link)
|
|||
mod_timer(&emp->timer, jiffies + msecs_to_jiffies(10));
|
||||
}
|
||||
|
||||
static void ahci_sw_activity_blink(unsigned long arg)
|
||||
static void ahci_sw_activity_blink(struct timer_list *t)
|
||||
{
|
||||
struct ata_link *link = (struct ata_link *)arg;
|
||||
struct ahci_em_priv *emp = from_timer(emp, t, timer);
|
||||
struct ata_link *link = emp->link;
|
||||
struct ata_port *ap = link->ap;
|
||||
struct ahci_port_priv *pp = ap->private_data;
|
||||
struct ahci_em_priv *emp = &pp->em_priv[link->pmp];
|
||||
|
||||
unsigned long led_message = emp->led_state;
|
||||
u32 activity_led_state;
|
||||
unsigned long flags;
|
||||
|
@ -1020,7 +1020,8 @@ static void ahci_init_sw_activity(struct ata_link *link)
|
|||
|
||||
/* init activity stats, setup timer */
|
||||
emp->saved_activity = emp->activity = 0;
|
||||
setup_timer(&emp->timer, ahci_sw_activity_blink, (unsigned long)link);
|
||||
emp->link = link;
|
||||
timer_setup(&emp->timer, ahci_sw_activity_blink, 0);
|
||||
|
||||
/* check our blink policy and set flag for link if it's enabled */
|
||||
if (emp->blink_policy)
|
||||
|
|
|
@ -5979,9 +5979,8 @@ struct ata_port *ata_port_alloc(struct ata_host *host)
|
|||
INIT_LIST_HEAD(&ap->eh_done_q);
|
||||
init_waitqueue_head(&ap->eh_wait_q);
|
||||
init_completion(&ap->park_req_pending);
|
||||
setup_deferrable_timer(&ap->fastdrain_timer,
|
||||
ata_eh_fastdrain_timerfn,
|
||||
(unsigned long)ap);
|
||||
timer_setup(&ap->fastdrain_timer, ata_eh_fastdrain_timerfn,
|
||||
TIMER_DEFERRABLE);
|
||||
|
||||
ap->cbl = ATA_CBL_NONE;
|
||||
|
||||
|
|
|
@ -879,9 +879,9 @@ static int ata_eh_nr_in_flight(struct ata_port *ap)
|
|||
return nr;
|
||||
}
|
||||
|
||||
void ata_eh_fastdrain_timerfn(unsigned long arg)
|
||||
void ata_eh_fastdrain_timerfn(struct timer_list *t)
|
||||
{
|
||||
struct ata_port *ap = (void *)arg;
|
||||
struct ata_port *ap = from_timer(ap, t, fastdrain_timer);
|
||||
unsigned long flags;
|
||||
int cnt;
|
||||
|
||||
|
|
|
@ -154,7 +154,7 @@ extern void ata_internal_cmd_timed_out(struct ata_device *dev, u8 cmd);
|
|||
extern void ata_eh_acquire(struct ata_port *ap);
|
||||
extern void ata_eh_release(struct ata_port *ap);
|
||||
extern void ata_scsi_error(struct Scsi_Host *host);
|
||||
extern void ata_eh_fastdrain_timerfn(unsigned long arg);
|
||||
extern void ata_eh_fastdrain_timerfn(struct timer_list *t);
|
||||
extern void ata_qc_schedule_eh(struct ata_queued_cmd *qc);
|
||||
extern void ata_dev_disable(struct ata_device *dev);
|
||||
extern void ata_eh_detach_dev(struct ata_device *dev);
|
||||
|
|
|
@ -49,8 +49,8 @@ static void idt77105_stats_timer_func(unsigned long);
|
|||
static void idt77105_restart_timer_func(unsigned long);
|
||||
|
||||
|
||||
static DEFINE_TIMER(stats_timer, idt77105_stats_timer_func, 0, 0);
|
||||
static DEFINE_TIMER(restart_timer, idt77105_restart_timer_func, 0, 0);
|
||||
static DEFINE_TIMER(stats_timer, idt77105_stats_timer_func);
|
||||
static DEFINE_TIMER(restart_timer, idt77105_restart_timer_func);
|
||||
static int start_timer = 1;
|
||||
static struct idt77105_priv *idt77105_all = NULL;
|
||||
|
||||
|
|
|
@ -76,7 +76,7 @@ static IADEV *ia_dev[8];
|
|||
static struct atm_dev *_ia_dev[8];
|
||||
static int iadev_count;
|
||||
static void ia_led_timer(unsigned long arg);
|
||||
static DEFINE_TIMER(ia_timer, ia_led_timer, 0, 0);
|
||||
static DEFINE_TIMER(ia_timer, ia_led_timer);
|
||||
static int IA_TX_BUF = DFL_TX_BUFFERS, IA_TX_BUF_SZ = DFL_TX_BUF_SZ;
|
||||
static int IA_RX_BUF = DFL_RX_BUFFERS, IA_RX_BUF_SZ = DFL_RX_BUF_SZ;
|
||||
static uint IADebugFlag = /* IF_IADBG_ERR | IF_IADBG_CBR| IF_IADBG_INIT_ADAPTER
|
||||
|
|
|
@ -229,9 +229,9 @@ MODULE_DEVICE_TABLE(of, img_ascii_lcd_matches);
|
|||
* Scroll the current message along the LCD by one character, rearming the
|
||||
* timer if required.
|
||||
*/
|
||||
static void img_ascii_lcd_scroll(unsigned long arg)
|
||||
static void img_ascii_lcd_scroll(struct timer_list *t)
|
||||
{
|
||||
struct img_ascii_lcd_ctx *ctx = (struct img_ascii_lcd_ctx *)arg;
|
||||
struct img_ascii_lcd_ctx *ctx = from_timer(ctx, t, timer);
|
||||
unsigned int i, ch = ctx->scroll_pos;
|
||||
unsigned int num_chars = ctx->cfg->num_chars;
|
||||
|
||||
|
@ -299,7 +299,7 @@ static int img_ascii_lcd_display(struct img_ascii_lcd_ctx *ctx,
|
|||
ctx->scroll_pos = 0;
|
||||
|
||||
/* update the LCD */
|
||||
img_ascii_lcd_scroll((unsigned long)ctx);
|
||||
img_ascii_lcd_scroll(&ctx->timer);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -395,9 +395,7 @@ static int img_ascii_lcd_probe(struct platform_device *pdev)
|
|||
ctx->scroll_rate = HZ / 2;
|
||||
|
||||
/* initialise a timer for scrolling the message */
|
||||
init_timer(&ctx->timer);
|
||||
ctx->timer.function = img_ascii_lcd_scroll;
|
||||
ctx->timer.data = (unsigned long)ctx;
|
||||
timer_setup(&ctx->timer, img_ascii_lcd_scroll, 0);
|
||||
|
||||
platform_set_drvdata(pdev, ctx);
|
||||
|
||||
|
|
|
@ -1396,7 +1396,7 @@ static void panel_process_inputs(void)
|
|||
}
|
||||
}
|
||||
|
||||
static void panel_scan_timer(void)
|
||||
static void panel_scan_timer(struct timer_list *unused)
|
||||
{
|
||||
if (keypad.enabled && keypad_initialized) {
|
||||
if (spin_trylock_irq(&pprt_lock)) {
|
||||
|
@ -1421,7 +1421,7 @@ static void init_scan_timer(void)
|
|||
if (scan_timer.function)
|
||||
return; /* already started */
|
||||
|
||||
setup_timer(&scan_timer, (void *)&panel_scan_timer, 0);
|
||||
timer_setup(&scan_timer, panel_scan_timer, 0);
|
||||
scan_timer.expires = jiffies + INPUT_POLL_TIME;
|
||||
add_timer(&scan_timer);
|
||||
}
|
||||
|
|
|
@ -478,9 +478,9 @@ struct dpm_watchdog {
|
|||
* There's not much we can do here to recover so panic() to
|
||||
* capture a crash-dump in pstore.
|
||||
*/
|
||||
static void dpm_watchdog_handler(unsigned long data)
|
||||
static void dpm_watchdog_handler(struct timer_list *t)
|
||||
{
|
||||
struct dpm_watchdog *wd = (void *)data;
|
||||
struct dpm_watchdog *wd = from_timer(wd, t, timer);
|
||||
|
||||
dev_emerg(wd->dev, "**** DPM device timeout ****\n");
|
||||
show_stack(wd->tsk, NULL);
|
||||
|
@ -500,11 +500,9 @@ static void dpm_watchdog_set(struct dpm_watchdog *wd, struct device *dev)
|
|||
wd->dev = dev;
|
||||
wd->tsk = current;
|
||||
|
||||
init_timer_on_stack(timer);
|
||||
timer_setup_on_stack(timer, dpm_watchdog_handler, 0);
|
||||
/* use same timeout value for both suspend and resume */
|
||||
timer->expires = jiffies + HZ * CONFIG_DPM_WATCHDOG_TIMEOUT;
|
||||
timer->function = dpm_watchdog_handler;
|
||||
timer->data = (unsigned long)wd;
|
||||
add_timer(timer);
|
||||
}
|
||||
|
||||
|
|
|
@ -323,7 +323,7 @@ static void fd_deselect (int drive)
|
|||
|
||||
}
|
||||
|
||||
static void motor_on_callback(unsigned long nr)
|
||||
static void motor_on_callback(unsigned long ignored)
|
||||
{
|
||||
if (!(ciaa.pra & DSKRDY) || --on_attempts == 0) {
|
||||
complete_all(&motor_on_completion);
|
||||
|
@ -344,7 +344,6 @@ static int fd_motor_on(int nr)
|
|||
fd_select(nr);
|
||||
|
||||
reinit_completion(&motor_on_completion);
|
||||
motor_on_timer.data = nr;
|
||||
mod_timer(&motor_on_timer, jiffies + HZ/2);
|
||||
|
||||
on_attempts = 10;
|
||||
|
|
|
@ -15,49 +15,19 @@ MODULE_AUTHOR("Sam Hopkins <sah@coraid.com>");
|
|||
MODULE_DESCRIPTION("AoE block/char driver for 2.6.2 and newer 2.6 kernels");
|
||||
MODULE_VERSION(VERSION);
|
||||
|
||||
enum { TINIT, TRUN, TKILL };
|
||||
static struct timer_list timer;
|
||||
|
||||
static void
|
||||
discover_timer(ulong vp)
|
||||
static void discover_timer(struct timer_list *t)
|
||||
{
|
||||
static struct timer_list t;
|
||||
static volatile ulong die;
|
||||
static spinlock_t lock;
|
||||
ulong flags;
|
||||
enum { DTIMERTICK = HZ * 60 }; /* one minute */
|
||||
mod_timer(t, jiffies + HZ * 60); /* one minute */
|
||||
|
||||
switch (vp) {
|
||||
case TINIT:
|
||||
init_timer(&t);
|
||||
spin_lock_init(&lock);
|
||||
t.data = TRUN;
|
||||
t.function = discover_timer;
|
||||
die = 0;
|
||||
case TRUN:
|
||||
spin_lock_irqsave(&lock, flags);
|
||||
if (!die) {
|
||||
t.expires = jiffies + DTIMERTICK;
|
||||
add_timer(&t);
|
||||
}
|
||||
spin_unlock_irqrestore(&lock, flags);
|
||||
|
||||
aoecmd_cfg(0xffff, 0xff);
|
||||
return;
|
||||
case TKILL:
|
||||
spin_lock_irqsave(&lock, flags);
|
||||
die = 1;
|
||||
spin_unlock_irqrestore(&lock, flags);
|
||||
|
||||
del_timer_sync(&t);
|
||||
default:
|
||||
return;
|
||||
}
|
||||
aoecmd_cfg(0xffff, 0xff);
|
||||
}
|
||||
|
||||
static void
|
||||
aoe_exit(void)
|
||||
{
|
||||
discover_timer(TKILL);
|
||||
del_timer_sync(&timer);
|
||||
|
||||
aoenet_exit();
|
||||
unregister_blkdev(AOE_MAJOR, DEVICE_NAME);
|
||||
|
@ -93,7 +63,9 @@ aoe_init(void)
|
|||
goto blkreg_fail;
|
||||
}
|
||||
printk(KERN_INFO "aoe: AoE v%s initialised.\n", VERSION);
|
||||
discover_timer(TINIT);
|
||||
|
||||
timer_setup(&timer, discover_timer, 0);
|
||||
discover_timer(&timer);
|
||||
return 0;
|
||||
blkreg_fail:
|
||||
aoecmd_exit();
|
||||
|
|
|
@ -373,10 +373,10 @@ static void floppy_release(struct gendisk *disk, fmode_t mode);
|
|||
|
||||
/************************* End of Prototypes **************************/
|
||||
|
||||
static DEFINE_TIMER(motor_off_timer, fd_motor_off_timer, 0, 0);
|
||||
static DEFINE_TIMER(readtrack_timer, fd_readtrack_check, 0, 0);
|
||||
static DEFINE_TIMER(timeout_timer, fd_times_out, 0, 0);
|
||||
static DEFINE_TIMER(fd_timer, check_change, 0, 0);
|
||||
static DEFINE_TIMER(motor_off_timer, fd_motor_off_timer);
|
||||
static DEFINE_TIMER(readtrack_timer, fd_readtrack_check);
|
||||
static DEFINE_TIMER(timeout_timer, fd_times_out);
|
||||
static DEFINE_TIMER(fd_timer, check_change);
|
||||
|
||||
static void fd_end_request_cur(blk_status_t err)
|
||||
{
|
||||
|
|
|
@ -1551,8 +1551,8 @@ extern int w_restart_disk_io(struct drbd_work *, int);
|
|||
extern int w_send_out_of_sync(struct drbd_work *, int);
|
||||
extern int w_start_resync(struct drbd_work *, int);
|
||||
|
||||
extern void resync_timer_fn(unsigned long data);
|
||||
extern void start_resync_timer_fn(unsigned long data);
|
||||
extern void resync_timer_fn(struct timer_list *t);
|
||||
extern void start_resync_timer_fn(struct timer_list *t);
|
||||
|
||||
extern void drbd_endio_write_sec_final(struct drbd_peer_request *peer_req);
|
||||
|
||||
|
|
|
@ -64,7 +64,7 @@
|
|||
static DEFINE_MUTEX(drbd_main_mutex);
|
||||
static int drbd_open(struct block_device *bdev, fmode_t mode);
|
||||
static void drbd_release(struct gendisk *gd, fmode_t mode);
|
||||
static void md_sync_timer_fn(unsigned long data);
|
||||
static void md_sync_timer_fn(struct timer_list *t);
|
||||
static int w_bitmap_io(struct drbd_work *w, int unused);
|
||||
|
||||
MODULE_AUTHOR("Philipp Reisner <phil@linbit.com>, "
|
||||
|
@ -2023,14 +2023,10 @@ void drbd_init_set_defaults(struct drbd_device *device)
|
|||
device->unplug_work.cb = w_send_write_hint;
|
||||
device->bm_io_work.w.cb = w_bitmap_io;
|
||||
|
||||
setup_timer(&device->resync_timer, resync_timer_fn,
|
||||
(unsigned long)device);
|
||||
setup_timer(&device->md_sync_timer, md_sync_timer_fn,
|
||||
(unsigned long)device);
|
||||
setup_timer(&device->start_resync_timer, start_resync_timer_fn,
|
||||
(unsigned long)device);
|
||||
setup_timer(&device->request_timer, request_timer_fn,
|
||||
(unsigned long)device);
|
||||
timer_setup(&device->resync_timer, resync_timer_fn, 0);
|
||||
timer_setup(&device->md_sync_timer, md_sync_timer_fn, 0);
|
||||
timer_setup(&device->start_resync_timer, start_resync_timer_fn, 0);
|
||||
timer_setup(&device->request_timer, request_timer_fn, 0);
|
||||
|
||||
init_waitqueue_head(&device->misc_wait);
|
||||
init_waitqueue_head(&device->state_wait);
|
||||
|
@ -3721,9 +3717,9 @@ int drbd_md_test_flag(struct drbd_backing_dev *bdev, int flag)
|
|||
return (bdev->md.flags & flag) != 0;
|
||||
}
|
||||
|
||||
static void md_sync_timer_fn(unsigned long data)
|
||||
static void md_sync_timer_fn(struct timer_list *t)
|
||||
{
|
||||
struct drbd_device *device = (struct drbd_device *) data;
|
||||
struct drbd_device *device = from_timer(device, t, md_sync_timer);
|
||||
drbd_device_post_work(device, MD_SYNC);
|
||||
}
|
||||
|
||||
|
|
|
@ -5056,7 +5056,7 @@ static int drbd_disconnected(struct drbd_peer_device *peer_device)
|
|||
wake_up(&device->misc_wait);
|
||||
|
||||
del_timer_sync(&device->resync_timer);
|
||||
resync_timer_fn((unsigned long)device);
|
||||
resync_timer_fn(&device->resync_timer);
|
||||
|
||||
/* wait for all w_e_end_data_req, w_e_end_rsdata_req, w_send_barrier,
|
||||
* w_make_resync_request etc. which may still be on the worker queue
|
||||
|
|
|
@ -1714,9 +1714,9 @@ static bool net_timeout_reached(struct drbd_request *net_req,
|
|||
* to expire twice (worst case) to become effective. Good enough.
|
||||
*/
|
||||
|
||||
void request_timer_fn(unsigned long data)
|
||||
void request_timer_fn(struct timer_list *t)
|
||||
{
|
||||
struct drbd_device *device = (struct drbd_device *) data;
|
||||
struct drbd_device *device = from_timer(device, t, request_timer);
|
||||
struct drbd_connection *connection = first_peer_device(device)->connection;
|
||||
struct drbd_request *req_read, *req_write, *req_peer; /* oldest request */
|
||||
struct net_conf *nc;
|
||||
|
|
|
@ -294,7 +294,7 @@ extern int __req_mod(struct drbd_request *req, enum drbd_req_event what,
|
|||
struct bio_and_error *m);
|
||||
extern void complete_master_bio(struct drbd_device *device,
|
||||
struct bio_and_error *m);
|
||||
extern void request_timer_fn(unsigned long data);
|
||||
extern void request_timer_fn(struct timer_list *t);
|
||||
extern void tl_restart(struct drbd_connection *connection, enum drbd_req_event what);
|
||||
extern void _tl_restart(struct drbd_connection *connection, enum drbd_req_event what);
|
||||
extern void tl_abort_disk_io(struct drbd_device *device);
|
||||
|
|
|
@ -457,9 +457,9 @@ int w_resync_timer(struct drbd_work *w, int cancel)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void resync_timer_fn(unsigned long data)
|
||||
void resync_timer_fn(struct timer_list *t)
|
||||
{
|
||||
struct drbd_device *device = (struct drbd_device *) data;
|
||||
struct drbd_device *device = from_timer(device, t, resync_timer);
|
||||
|
||||
drbd_queue_work_if_unqueued(
|
||||
&first_peer_device(device)->connection->sender_work,
|
||||
|
@ -1705,9 +1705,9 @@ void drbd_rs_controller_reset(struct drbd_device *device)
|
|||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
void start_resync_timer_fn(unsigned long data)
|
||||
void start_resync_timer_fn(struct timer_list *t)
|
||||
{
|
||||
struct drbd_device *device = (struct drbd_device *) data;
|
||||
struct drbd_device *device = from_timer(device, t, start_resync_timer);
|
||||
drbd_device_post_work(device, RS_START);
|
||||
}
|
||||
|
||||
|
|
|
@ -84,7 +84,7 @@ static int dtlk_has_indexing;
|
|||
static unsigned int dtlk_portlist[] =
|
||||
{0x25e, 0x29e, 0x2de, 0x31e, 0x35e, 0x39e, 0};
|
||||
static wait_queue_head_t dtlk_process_list;
|
||||
static DEFINE_TIMER(dtlk_timer, dtlk_timer_tick, 0, 0);
|
||||
static DEFINE_TIMER(dtlk_timer, dtlk_timer_tick);
|
||||
|
||||
/* prototypes for file_operations struct */
|
||||
static ssize_t dtlk_read(struct file *, char __user *,
|
||||
|
|
|
@ -124,7 +124,7 @@ static unsigned long long hangcheck_tsc, hangcheck_tsc_margin;
|
|||
|
||||
static void hangcheck_fire(unsigned long);
|
||||
|
||||
static DEFINE_TIMER(hangcheck_ticktock, hangcheck_fire, 0, 0);
|
||||
static DEFINE_TIMER(hangcheck_ticktock, hangcheck_fire);
|
||||
|
||||
static void hangcheck_fire(unsigned long data)
|
||||
{
|
||||
|
|
|
@ -100,9 +100,9 @@ struct xgene_rng_dev {
|
|||
struct clk *clk;
|
||||
};
|
||||
|
||||
static void xgene_rng_expired_timer(unsigned long arg)
|
||||
static void xgene_rng_expired_timer(struct timer_list *t)
|
||||
{
|
||||
struct xgene_rng_dev *ctx = (struct xgene_rng_dev *) arg;
|
||||
struct xgene_rng_dev *ctx = from_timer(ctx, t, failure_timer);
|
||||
|
||||
/* Clear failure counter as timer expired */
|
||||
disable_irq(ctx->irq);
|
||||
|
@ -113,8 +113,6 @@ static void xgene_rng_expired_timer(unsigned long arg)
|
|||
|
||||
static void xgene_rng_start_timer(struct xgene_rng_dev *ctx)
|
||||
{
|
||||
ctx->failure_timer.data = (unsigned long) ctx;
|
||||
ctx->failure_timer.function = xgene_rng_expired_timer;
|
||||
ctx->failure_timer.expires = jiffies + 120 * HZ;
|
||||
add_timer(&ctx->failure_timer);
|
||||
}
|
||||
|
@ -292,7 +290,7 @@ static int xgene_rng_init(struct hwrng *rng)
|
|||
struct xgene_rng_dev *ctx = (struct xgene_rng_dev *) rng->priv;
|
||||
|
||||
ctx->failure_cnt = 0;
|
||||
init_timer(&ctx->failure_timer);
|
||||
timer_setup(&ctx->failure_timer, xgene_rng_expired_timer, 0);
|
||||
|
||||
ctx->revision = readl(ctx->csr_base + RNG_EIP_REV);
|
||||
|
||||
|
|
|
@ -27,7 +27,7 @@ static void button_sequence_finished (unsigned long parameters);
|
|||
|
||||
static int button_press_count; /* The count of button presses */
|
||||
/* Times for the end of a sequence */
|
||||
static DEFINE_TIMER(button_timer, button_sequence_finished, 0, 0);
|
||||
static DEFINE_TIMER(button_timer, button_sequence_finished);
|
||||
static DECLARE_WAIT_QUEUE_HEAD(button_wait_queue); /* Used for blocking read */
|
||||
static char button_output_buffer[32]; /* Stores data to write out of device */
|
||||
static int bcount; /* The number of bytes in the buffer */
|
||||
|
|
|
@ -137,7 +137,7 @@ static DECLARE_WAIT_QUEUE_HEAD(rtc_wait);
|
|||
#ifdef RTC_IRQ
|
||||
static void rtc_dropped_irq(unsigned long data);
|
||||
|
||||
static DEFINE_TIMER(rtc_irq_timer, rtc_dropped_irq, 0, 0);
|
||||
static DEFINE_TIMER(rtc_irq_timer, rtc_dropped_irq);
|
||||
#endif
|
||||
|
||||
static ssize_t rtc_read(struct file *file, char __user *buf,
|
||||
|
|
|
@ -184,9 +184,8 @@ static unsigned int telclk_interrupt;
|
|||
static int int_events; /* Event that generate a interrupt */
|
||||
static int got_event; /* if events processing have been done */
|
||||
|
||||
static void switchover_timeout(unsigned long data);
|
||||
static struct timer_list switchover_timer =
|
||||
TIMER_INITIALIZER(switchover_timeout , 0, 0);
|
||||
static void switchover_timeout(struct timer_list *t);
|
||||
static struct timer_list switchover_timer;
|
||||
static unsigned long tlclk_timer_data;
|
||||
|
||||
static struct tlclk_alarms *alarm_events;
|
||||
|
@ -805,7 +804,7 @@ static int __init tlclk_init(void)
|
|||
goto out3;
|
||||
}
|
||||
|
||||
init_timer(&switchover_timer);
|
||||
timer_setup(&switchover_timer, switchover_timeout, 0);
|
||||
|
||||
ret = misc_register(&tlclk_miscdev);
|
||||
if (ret < 0) {
|
||||
|
@ -855,9 +854,9 @@ static void __exit tlclk_cleanup(void)
|
|||
|
||||
}
|
||||
|
||||
static void switchover_timeout(unsigned long data)
|
||||
static void switchover_timeout(struct timer_list *unused)
|
||||
{
|
||||
unsigned long flags = *(unsigned long *) data;
|
||||
unsigned long flags = tlclk_timer_data;
|
||||
|
||||
if ((flags & 1)) {
|
||||
if ((inb(TLCLK_REG1) & 0x08) != (flags & 0x08))
|
||||
|
@ -922,7 +921,6 @@ static irqreturn_t tlclk_interrupt(int irq, void *dev_id)
|
|||
/* TIMEOUT in ~10ms */
|
||||
switchover_timer.expires = jiffies + msecs_to_jiffies(10);
|
||||
tlclk_timer_data = inb(TLCLK_REG1);
|
||||
switchover_timer.data = (unsigned long) &tlclk_timer_data;
|
||||
mod_timer(&switchover_timer, switchover_timer.expires);
|
||||
} else {
|
||||
got_event = 1;
|
||||
|
|
|
@ -1,9 +1,8 @@
|
|||
menu "Clock Source drivers"
|
||||
depends on !ARCH_USES_GETTIMEOFFSET
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
|
||||
config TIMER_OF
|
||||
bool
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select TIMER_PROBE
|
||||
|
||||
config TIMER_ACPI
|
||||
|
@ -30,21 +29,18 @@ config CLKSRC_MMIO
|
|||
|
||||
config BCM2835_TIMER
|
||||
bool "BCM2835 timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
Enables the support for the BCM2835 timer driver.
|
||||
|
||||
config BCM_KONA_TIMER
|
||||
bool "BCM mobile timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
Enables the support for the BCM Kona mobile timer driver.
|
||||
|
||||
config DIGICOLOR_TIMER
|
||||
bool "Digicolor timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select CLKSRC_MMIO
|
||||
depends on HAS_IOMEM
|
||||
help
|
||||
|
@ -52,7 +48,6 @@ config DIGICOLOR_TIMER
|
|||
|
||||
config DW_APB_TIMER
|
||||
bool "DW APB timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
help
|
||||
Enables the support for the dw_apb timer.
|
||||
|
||||
|
@ -63,7 +58,6 @@ config DW_APB_TIMER_OF
|
|||
|
||||
config FTTMR010_TIMER
|
||||
bool "Faraday Technology timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on HAS_IOMEM
|
||||
select CLKSRC_MMIO
|
||||
select TIMER_OF
|
||||
|
@ -90,7 +84,6 @@ config ARMADA_370_XP_TIMER
|
|||
|
||||
config MESON6_TIMER
|
||||
bool "Meson6 timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
Enables the support for the Meson6 timer driver.
|
||||
|
@ -105,14 +98,12 @@ config ORION_TIMER
|
|||
|
||||
config OWL_TIMER
|
||||
bool "Owl timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
Enables the support for the Actions Semi Owl timer driver.
|
||||
|
||||
config SUN4I_TIMER
|
||||
bool "Sun4i timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on HAS_IOMEM
|
||||
select CLKSRC_MMIO
|
||||
select TIMER_OF
|
||||
|
@ -135,7 +126,6 @@ config TEGRA_TIMER
|
|||
|
||||
config VT8500_TIMER
|
||||
bool "VT8500 timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on HAS_IOMEM
|
||||
help
|
||||
Enables support for the VT8500 driver.
|
||||
|
@ -148,7 +138,6 @@ config CADENCE_TTC_TIMER
|
|||
|
||||
config ASM9260_TIMER
|
||||
bool "ASM9260 timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select CLKSRC_MMIO
|
||||
select TIMER_OF
|
||||
help
|
||||
|
@ -171,28 +160,24 @@ config CLKSRC_NOMADIK_MTU_SCHED_CLOCK
|
|||
|
||||
config CLKSRC_DBX500_PRCMU
|
||||
bool "Clocksource PRCMU Timer" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on HAS_IOMEM
|
||||
help
|
||||
Use the always on PRCMU Timer as clocksource
|
||||
|
||||
config CLPS711X_TIMER
|
||||
bool "Cirrus logic timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
Enables support for the Cirrus Logic PS711 timer.
|
||||
|
||||
config ATLAS7_TIMER
|
||||
bool "Atlas7 timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
Enables support for the Atlas7 timer.
|
||||
|
||||
config MXS_TIMER
|
||||
bool "Mxs timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select CLKSRC_MMIO
|
||||
select STMP_DEVICE
|
||||
help
|
||||
|
@ -200,14 +185,12 @@ config MXS_TIMER
|
|||
|
||||
config PRIMA2_TIMER
|
||||
bool "Prima2 timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
Enables support for the Prima2 timer.
|
||||
|
||||
config U300_TIMER
|
||||
bool "U300 timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on ARM
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
|
@ -215,14 +198,12 @@ config U300_TIMER
|
|||
|
||||
config NSPIRE_TIMER
|
||||
bool "NSpire timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
Enables support for the Nspire timer.
|
||||
|
||||
config KEYSTONE_TIMER
|
||||
bool "Keystone timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on ARM || ARM64
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
|
@ -230,7 +211,6 @@ config KEYSTONE_TIMER
|
|||
|
||||
config INTEGRATOR_AP_TIMER
|
||||
bool "Integrator-ap timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
Enables support for the Integrator-ap timer.
|
||||
|
@ -253,7 +233,7 @@ config CLKSRC_EFM32
|
|||
|
||||
config CLKSRC_LPC32XX
|
||||
bool "Clocksource for LPC32XX" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
|
||||
depends on HAS_IOMEM
|
||||
depends on ARM
|
||||
select CLKSRC_MMIO
|
||||
select TIMER_OF
|
||||
|
@ -262,7 +242,7 @@ config CLKSRC_LPC32XX
|
|||
|
||||
config CLKSRC_PISTACHIO
|
||||
bool "Clocksource for Pistachio SoC" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
|
||||
depends on HAS_IOMEM
|
||||
select TIMER_OF
|
||||
help
|
||||
Enables the clocksource for the Pistachio SoC.
|
||||
|
@ -298,7 +278,6 @@ config CLKSRC_MPS2
|
|||
|
||||
config ARC_TIMERS
|
||||
bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select TIMER_OF
|
||||
help
|
||||
These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
|
||||
|
@ -307,7 +286,6 @@ config ARC_TIMERS
|
|||
|
||||
config ARC_TIMERS_64BIT
|
||||
bool "Support for 64-bit counters in ARC HS38 cores" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on ARC_TIMERS
|
||||
select TIMER_OF
|
||||
help
|
||||
|
@ -407,7 +385,6 @@ config ATMEL_PIT
|
|||
|
||||
config ATMEL_ST
|
||||
bool "Atmel ST timer support" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select TIMER_OF
|
||||
select MFD_SYSCON
|
||||
help
|
||||
|
@ -426,7 +403,6 @@ config CLKSRC_EXYNOS_MCT
|
|||
|
||||
config CLKSRC_SAMSUNG_PWM
|
||||
bool "PWM timer driver for Samsung S3C, S5P" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on HAS_IOMEM
|
||||
help
|
||||
This is a new clocksource driver for the PWM timer found in
|
||||
|
@ -436,7 +412,6 @@ config CLKSRC_SAMSUNG_PWM
|
|||
|
||||
config FSL_FTM_TIMER
|
||||
bool "Freescale FlexTimer Module driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on HAS_IOMEM
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
|
@ -450,7 +425,6 @@ config VF_PIT_TIMER
|
|||
|
||||
config OXNAS_RPS_TIMER
|
||||
bool "Oxford Semiconductor OXNAS RPS Timers driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select TIMER_OF
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
|
@ -461,7 +435,7 @@ config SYS_SUPPORTS_SH_CMT
|
|||
|
||||
config MTK_TIMER
|
||||
bool "Mediatek timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
|
||||
depends on HAS_IOMEM
|
||||
select TIMER_OF
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
|
@ -479,7 +453,6 @@ config SYS_SUPPORTS_EM_STI
|
|||
config CLKSRC_JCORE_PIT
|
||||
bool "J-Core PIT timer driver" if COMPILE_TEST
|
||||
depends on OF
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on HAS_IOMEM
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
|
@ -488,7 +461,6 @@ config CLKSRC_JCORE_PIT
|
|||
|
||||
config SH_TIMER_CMT
|
||||
bool "Renesas CMT timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on HAS_IOMEM
|
||||
default SYS_SUPPORTS_SH_CMT
|
||||
help
|
||||
|
@ -498,7 +470,6 @@ config SH_TIMER_CMT
|
|||
|
||||
config SH_TIMER_MTU2
|
||||
bool "Renesas MTU2 timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on HAS_IOMEM
|
||||
default SYS_SUPPORTS_SH_MTU2
|
||||
help
|
||||
|
@ -508,14 +479,12 @@ config SH_TIMER_MTU2
|
|||
|
||||
config RENESAS_OSTM
|
||||
bool "Renesas OSTM timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
Enables the support for the Renesas OSTM.
|
||||
|
||||
config SH_TIMER_TMU
|
||||
bool "Renesas TMU timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on HAS_IOMEM
|
||||
default SYS_SUPPORTS_SH_TMU
|
||||
help
|
||||
|
@ -525,7 +494,7 @@ config SH_TIMER_TMU
|
|||
|
||||
config EM_TIMER_STI
|
||||
bool "Renesas STI timer driver" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
|
||||
depends on HAS_IOMEM
|
||||
default SYS_SUPPORTS_EM_STI
|
||||
help
|
||||
This enables build of a clocksource and clockevent driver for
|
||||
|
@ -566,7 +535,6 @@ config CLKSRC_TANGO_XTAL
|
|||
|
||||
config CLKSRC_PXA
|
||||
bool "Clocksource for PXA or SA-11x0 platform" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS
|
||||
depends on HAS_IOMEM
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
|
@ -575,20 +543,20 @@ config CLKSRC_PXA
|
|||
|
||||
config H8300_TMR8
|
||||
bool "Clockevent timer for the H8300 platform" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
|
||||
depends on HAS_IOMEM
|
||||
help
|
||||
This enables the 8 bits timer for the H8300 platform.
|
||||
|
||||
config H8300_TMR16
|
||||
bool "Clockevent timer for the H83069 platform" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
|
||||
depends on HAS_IOMEM
|
||||
help
|
||||
This enables the 16 bits timer for the H8300 platform with the
|
||||
H83069 cpu.
|
||||
|
||||
config H8300_TPU
|
||||
bool "Clocksource for the H8300 platform" if COMPILE_TEST
|
||||
depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
|
||||
depends on HAS_IOMEM
|
||||
help
|
||||
This enables the clocksource for the H8300 platform with the
|
||||
H8S2678 cpu.
|
||||
|
@ -600,7 +568,7 @@ config CLKSRC_IMX_GPT
|
|||
|
||||
config CLKSRC_IMX_TPM
|
||||
bool "Clocksource using i.MX TPM" if COMPILE_TEST
|
||||
depends on ARM && CLKDEV_LOOKUP && GENERIC_CLOCKEVENTS
|
||||
depends on ARM && CLKDEV_LOOKUP
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
Enable this option to use IMX Timer/PWM Module (TPM) timer as
|
||||
|
|
|
@ -299,8 +299,7 @@ static u64 notrace arm64_858921_read_cntvct_el0(void)
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND
|
||||
DEFINE_PER_CPU(const struct arch_timer_erratum_workaround *,
|
||||
timer_unstable_counter_workaround);
|
||||
DEFINE_PER_CPU(const struct arch_timer_erratum_workaround *, timer_unstable_counter_workaround);
|
||||
EXPORT_SYMBOL_GPL(timer_unstable_counter_workaround);
|
||||
|
||||
DEFINE_STATIC_KEY_FALSE(arch_timer_read_ool_enabled);
|
||||
|
@ -1268,10 +1267,6 @@ arch_timer_mem_find_best_frame(struct arch_timer_mem *timer_mem)
|
|||
|
||||
iounmap(cntctlbase);
|
||||
|
||||
if (!best_frame)
|
||||
pr_err("Unable to find a suitable frame in timer @ %pa\n",
|
||||
&timer_mem->cntctlbase);
|
||||
|
||||
return best_frame;
|
||||
}
|
||||
|
||||
|
@ -1372,6 +1367,8 @@ static int __init arch_timer_mem_of_init(struct device_node *np)
|
|||
|
||||
frame = arch_timer_mem_find_best_frame(timer_mem);
|
||||
if (!frame) {
|
||||
pr_err("Unable to find a suitable frame in timer @ %pa\n",
|
||||
&timer_mem->cntctlbase);
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
@ -1420,7 +1417,7 @@ arch_timer_mem_verify_cntfrq(struct arch_timer_mem *timer_mem)
|
|||
static int __init arch_timer_mem_acpi_init(int platform_timer_count)
|
||||
{
|
||||
struct arch_timer_mem *timers, *timer;
|
||||
struct arch_timer_mem_frame *frame;
|
||||
struct arch_timer_mem_frame *frame, *best_frame = NULL;
|
||||
int timer_count, i, ret = 0;
|
||||
|
||||
timers = kcalloc(platform_timer_count, sizeof(*timers),
|
||||
|
@ -1432,14 +1429,6 @@ static int __init arch_timer_mem_acpi_init(int platform_timer_count)
|
|||
if (ret || !timer_count)
|
||||
goto out;
|
||||
|
||||
for (i = 0; i < timer_count; i++) {
|
||||
ret = arch_timer_mem_verify_cntfrq(&timers[i]);
|
||||
if (ret) {
|
||||
pr_err("Disabling MMIO timers due to CNTFRQ mismatch\n");
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* While unlikely, it's theoretically possible that none of the frames
|
||||
* in a timer expose the combination of feature we want.
|
||||
|
@ -1448,12 +1437,26 @@ static int __init arch_timer_mem_acpi_init(int platform_timer_count)
|
|||
timer = &timers[i];
|
||||
|
||||
frame = arch_timer_mem_find_best_frame(timer);
|
||||
if (frame)
|
||||
break;
|
||||
if (!best_frame)
|
||||
best_frame = frame;
|
||||
|
||||
ret = arch_timer_mem_verify_cntfrq(timer);
|
||||
if (ret) {
|
||||
pr_err("Disabling MMIO timers due to CNTFRQ mismatch\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (!best_frame) /* implies !frame */
|
||||
/*
|
||||
* Only complain about missing suitable frames if we
|
||||
* haven't already found one in a previous iteration.
|
||||
*/
|
||||
pr_err("Unable to find a suitable frame in timer @ %pa\n",
|
||||
&timer->cntctlbase);
|
||||
}
|
||||
|
||||
if (frame)
|
||||
ret = arch_timer_mem_frame_register(frame);
|
||||
if (best_frame)
|
||||
ret = arch_timer_mem_frame_register(best_frame);
|
||||
out:
|
||||
kfree(timers);
|
||||
return ret;
|
||||
|
|
|
@ -39,16 +39,18 @@ static u64 notrace gic_read_count(void)
|
|||
|
||||
static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
|
||||
{
|
||||
unsigned long flags;
|
||||
int cpu = cpumask_first(evt->cpumask);
|
||||
u64 cnt;
|
||||
int res;
|
||||
|
||||
cnt = gic_read_count();
|
||||
cnt += (u64)delta;
|
||||
local_irq_save(flags);
|
||||
write_gic_vl_other(mips_cm_vp_id(cpumask_first(evt->cpumask)));
|
||||
write_gic_vo_compare(cnt);
|
||||
local_irq_restore(flags);
|
||||
if (cpu == raw_smp_processor_id()) {
|
||||
write_gic_vl_compare(cnt);
|
||||
} else {
|
||||
write_gic_vl_other(mips_cm_vp_id(cpu));
|
||||
write_gic_vo_compare(cnt);
|
||||
}
|
||||
res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
|
||||
return res;
|
||||
}
|
||||
|
|
|
@ -125,7 +125,7 @@ static int __init owl_timer_init(struct device_node *node)
|
|||
|
||||
owl_timer_base = of_io_request_and_map(node, 0, "owl-timer");
|
||||
if (IS_ERR(owl_timer_base)) {
|
||||
pr_err("Can't map timer registers");
|
||||
pr_err("Can't map timer registers\n");
|
||||
return PTR_ERR(owl_timer_base);
|
||||
}
|
||||
|
||||
|
@ -134,7 +134,7 @@ static int __init owl_timer_init(struct device_node *node)
|
|||
|
||||
timer1_irq = of_irq_get_byname(node, "timer1");
|
||||
if (timer1_irq <= 0) {
|
||||
pr_err("Can't parse timer1 IRQ");
|
||||
pr_err("Can't parse timer1 IRQ\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
|
@ -274,7 +274,7 @@ static int __init rk_clksrc_init(struct device_node *np)
|
|||
TIMER_NAME, rk_clksrc->freq, 250, 32,
|
||||
clocksource_mmio_readl_down);
|
||||
if (ret) {
|
||||
pr_err("Failed to register clocksource");
|
||||
pr_err("Failed to register clocksource\n");
|
||||
goto out_clocksource;
|
||||
}
|
||||
|
||||
|
|
|
@ -25,6 +25,7 @@
|
|||
#include <linux/irq.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm_domain.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
|
@ -39,16 +40,16 @@ struct sh_cmt_device;
|
|||
* SoC but also on the particular instance. The following table lists the main
|
||||
* characteristics of those flavours.
|
||||
*
|
||||
* 16B 32B 32B-F 48B 48B-2
|
||||
* 16B 32B 32B-F 48B R-Car Gen2
|
||||
* -----------------------------------------------------------------------------
|
||||
* Channels 2 1/4 1 6 2/8
|
||||
* Control Width 16 16 16 16 32
|
||||
* Counter Width 16 32 32 32/48 32/48
|
||||
* Shared Start/Stop Y Y Y Y N
|
||||
*
|
||||
* The 48-bit gen2 version has a per-channel start/stop register located in the
|
||||
* channel registers block. All other versions have a shared start/stop register
|
||||
* located in the global space.
|
||||
* The r8a73a4 / R-Car Gen2 version has a per-channel start/stop register
|
||||
* located in the channel registers block. All other versions have a shared
|
||||
* start/stop register located in the global space.
|
||||
*
|
||||
* Channels are indexed from 0 to N-1 in the documentation. The channel index
|
||||
* infers the start/stop bit position in the control register and the channel
|
||||
|
@ -66,14 +67,16 @@ struct sh_cmt_device;
|
|||
enum sh_cmt_model {
|
||||
SH_CMT_16BIT,
|
||||
SH_CMT_32BIT,
|
||||
SH_CMT_32BIT_FAST,
|
||||
SH_CMT_48BIT,
|
||||
SH_CMT_48BIT_GEN2,
|
||||
SH_CMT0_RCAR_GEN2,
|
||||
SH_CMT1_RCAR_GEN2,
|
||||
};
|
||||
|
||||
struct sh_cmt_info {
|
||||
enum sh_cmt_model model;
|
||||
|
||||
unsigned int channels_mask;
|
||||
|
||||
unsigned long width; /* 16 or 32 bit version of hardware block */
|
||||
unsigned long overflow_bit;
|
||||
unsigned long clear_bits;
|
||||
|
@ -200,18 +203,9 @@ static const struct sh_cmt_info sh_cmt_info[] = {
|
|||
.read_count = sh_cmt_read32,
|
||||
.write_count = sh_cmt_write32,
|
||||
},
|
||||
[SH_CMT_32BIT_FAST] = {
|
||||
.model = SH_CMT_32BIT_FAST,
|
||||
.width = 32,
|
||||
.overflow_bit = SH_CMT32_CMCSR_CMF,
|
||||
.clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
|
||||
.read_control = sh_cmt_read16,
|
||||
.write_control = sh_cmt_write16,
|
||||
.read_count = sh_cmt_read32,
|
||||
.write_count = sh_cmt_write32,
|
||||
},
|
||||
[SH_CMT_48BIT] = {
|
||||
.model = SH_CMT_48BIT,
|
||||
.channels_mask = 0x3f,
|
||||
.width = 32,
|
||||
.overflow_bit = SH_CMT32_CMCSR_CMF,
|
||||
.clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
|
||||
|
@ -220,8 +214,20 @@ static const struct sh_cmt_info sh_cmt_info[] = {
|
|||
.read_count = sh_cmt_read32,
|
||||
.write_count = sh_cmt_write32,
|
||||
},
|
||||
[SH_CMT_48BIT_GEN2] = {
|
||||
.model = SH_CMT_48BIT_GEN2,
|
||||
[SH_CMT0_RCAR_GEN2] = {
|
||||
.model = SH_CMT0_RCAR_GEN2,
|
||||
.channels_mask = 0x60,
|
||||
.width = 32,
|
||||
.overflow_bit = SH_CMT32_CMCSR_CMF,
|
||||
.clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
|
||||
.read_control = sh_cmt_read32,
|
||||
.write_control = sh_cmt_write32,
|
||||
.read_count = sh_cmt_read32,
|
||||
.write_count = sh_cmt_write32,
|
||||
},
|
||||
[SH_CMT1_RCAR_GEN2] = {
|
||||
.model = SH_CMT1_RCAR_GEN2,
|
||||
.channels_mask = 0xff,
|
||||
.width = 32,
|
||||
.overflow_bit = SH_CMT32_CMCSR_CMF,
|
||||
.clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
|
||||
|
@ -859,6 +865,7 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
|
|||
ch->cmt = cmt;
|
||||
ch->index = index;
|
||||
ch->hwidx = hwidx;
|
||||
ch->timer_bit = hwidx;
|
||||
|
||||
/*
|
||||
* Compute the address of the channel control register block. For the
|
||||
|
@ -873,16 +880,11 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
|
|||
case SH_CMT_48BIT:
|
||||
ch->ioctrl = cmt->mapbase + 0x10 + ch->hwidx * 0x10;
|
||||
break;
|
||||
case SH_CMT_32BIT_FAST:
|
||||
/*
|
||||
* The 32-bit "fast" timer has a single channel at hwidx 5 but
|
||||
* is located at offset 0x40 instead of 0x60 for some reason.
|
||||
*/
|
||||
ch->ioctrl = cmt->mapbase + 0x40;
|
||||
break;
|
||||
case SH_CMT_48BIT_GEN2:
|
||||
case SH_CMT0_RCAR_GEN2:
|
||||
case SH_CMT1_RCAR_GEN2:
|
||||
ch->iostart = cmt->mapbase + ch->hwidx * 0x100;
|
||||
ch->ioctrl = ch->iostart + 0x10;
|
||||
ch->timer_bit = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -894,8 +896,6 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
|
|||
ch->match_value = ch->max_match_value;
|
||||
raw_spin_lock_init(&ch->lock);
|
||||
|
||||
ch->timer_bit = cmt->info->model == SH_CMT_48BIT_GEN2 ? 0 : ch->hwidx;
|
||||
|
||||
ret = sh_cmt_register(ch, dev_name(&cmt->pdev->dev),
|
||||
clockevent, clocksource);
|
||||
if (ret) {
|
||||
|
@ -935,22 +935,18 @@ static const struct platform_device_id sh_cmt_id_table[] = {
|
|||
MODULE_DEVICE_TABLE(platform, sh_cmt_id_table);
|
||||
|
||||
static const struct of_device_id sh_cmt_of_table[] __maybe_unused = {
|
||||
{ .compatible = "renesas,cmt-32", .data = &sh_cmt_info[SH_CMT_32BIT] },
|
||||
{ .compatible = "renesas,cmt-32-fast", .data = &sh_cmt_info[SH_CMT_32BIT_FAST] },
|
||||
{ .compatible = "renesas,cmt-48", .data = &sh_cmt_info[SH_CMT_48BIT] },
|
||||
{ .compatible = "renesas,cmt-48-gen2", .data = &sh_cmt_info[SH_CMT_48BIT_GEN2] },
|
||||
{
|
||||
/* deprecated, preserved for backward compatibility */
|
||||
.compatible = "renesas,cmt-48-gen2",
|
||||
.data = &sh_cmt_info[SH_CMT0_RCAR_GEN2]
|
||||
},
|
||||
{ .compatible = "renesas,rcar-gen2-cmt0", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] },
|
||||
{ .compatible = "renesas,rcar-gen2-cmt1", .data = &sh_cmt_info[SH_CMT1_RCAR_GEN2] },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, sh_cmt_of_table);
|
||||
|
||||
static int sh_cmt_parse_dt(struct sh_cmt_device *cmt)
|
||||
{
|
||||
struct device_node *np = cmt->pdev->dev.of_node;
|
||||
|
||||
return of_property_read_u32(np, "renesas,channels-mask",
|
||||
&cmt->hw_channels);
|
||||
}
|
||||
|
||||
static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
|
||||
{
|
||||
unsigned int mask;
|
||||
|
@ -961,14 +957,8 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
|
|||
raw_spin_lock_init(&cmt->lock);
|
||||
|
||||
if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
|
||||
const struct of_device_id *id;
|
||||
|
||||
id = of_match_node(sh_cmt_of_table, pdev->dev.of_node);
|
||||
cmt->info = id->data;
|
||||
|
||||
ret = sh_cmt_parse_dt(cmt);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
cmt->info = of_device_get_match_data(&pdev->dev);
|
||||
cmt->hw_channels = cmt->info->channels_mask;
|
||||
} else if (pdev->dev.platform_data) {
|
||||
struct sh_timer_config *cfg = pdev->dev.platform_data;
|
||||
const struct platform_device_id *id = pdev->id_entry;
|
||||
|
|
|
@ -264,14 +264,14 @@ static int __init fttmr010_common_init(struct device_node *np, bool is_aspeed)
|
|||
|
||||
fttmr010->base = of_iomap(np, 0);
|
||||
if (!fttmr010->base) {
|
||||
pr_err("Can't remap registers");
|
||||
pr_err("Can't remap registers\n");
|
||||
ret = -ENXIO;
|
||||
goto out_free;
|
||||
}
|
||||
/* IRQ for timer 1 */
|
||||
irq = irq_of_parse_and_map(np, 0);
|
||||
if (irq <= 0) {
|
||||
pr_err("Can't parse IRQ");
|
||||
pr_err("Can't parse IRQ\n");
|
||||
ret = -EINVAL;
|
||||
goto out_unmap;
|
||||
}
|
||||
|
|
|
@ -176,3 +176,15 @@ out_fail:
|
|||
timer_base_exit(&to->of_base);
|
||||
return ret;
|
||||
}
|
||||
|
||||
void timer_of_exit(struct timer_of *to)
|
||||
{
|
||||
if (to->flags & TIMER_OF_IRQ)
|
||||
timer_irq_exit(&to->of_irq);
|
||||
|
||||
if (to->flags & TIMER_OF_CLOCK)
|
||||
timer_clk_exit(&to->of_clk);
|
||||
|
||||
if (to->flags & TIMER_OF_BASE)
|
||||
timer_base_exit(&to->of_base);
|
||||
}
|
||||
|
|
|
@ -67,4 +67,7 @@ static inline unsigned long timer_of_period(struct timer_of *to)
|
|||
|
||||
extern int __init timer_of_init(struct device_node *np,
|
||||
struct timer_of *to);
|
||||
|
||||
extern void timer_of_exit(struct timer_of *to);
|
||||
|
||||
#endif
|
||||
|
|
|
@ -90,6 +90,7 @@ struct global_pstate_info {
|
|||
int last_gpstate_idx;
|
||||
spinlock_t gpstate_lock;
|
||||
struct timer_list timer;
|
||||
struct cpufreq_policy *policy;
|
||||
};
|
||||
|
||||
static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
|
||||
|
@ -625,10 +626,10 @@ static inline void queue_gpstate_timer(struct global_pstate_info *gpstates)
|
|||
* according quadratic equation. Queues a new timer if it is still not equal
|
||||
* to local pstate
|
||||
*/
|
||||
void gpstate_timer_handler(unsigned long data)
|
||||
void gpstate_timer_handler(struct timer_list *t)
|
||||
{
|
||||
struct cpufreq_policy *policy = (struct cpufreq_policy *)data;
|
||||
struct global_pstate_info *gpstates = policy->driver_data;
|
||||
struct global_pstate_info *gpstates = from_timer(gpstates, t, timer);
|
||||
struct cpufreq_policy *policy = gpstates->policy;
|
||||
int gpstate_idx, lpstate_idx;
|
||||
unsigned long val;
|
||||
unsigned int time_diff = jiffies_to_msecs(jiffies)
|
||||
|
@ -800,9 +801,9 @@ static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy)
|
|||
policy->driver_data = gpstates;
|
||||
|
||||
/* initialize timer */
|
||||
init_timer_pinned_deferrable(&gpstates->timer);
|
||||
gpstates->timer.data = (unsigned long)policy;
|
||||
gpstates->timer.function = gpstate_timer_handler;
|
||||
gpstates->policy = policy;
|
||||
timer_setup(&gpstates->timer, gpstate_timer_handler,
|
||||
TIMER_PINNED | TIMER_DEFERRABLE);
|
||||
gpstates->timer.expires = jiffies +
|
||||
msecs_to_jiffies(GPSTATE_TIMER_INTERVAL);
|
||||
spin_lock_init(&gpstates->gpstate_lock);
|
||||
|
|
|
@ -2072,9 +2072,9 @@ static void artpec6_crypto_process_queue(struct artpec6_crypto *ac)
|
|||
del_timer(&ac->timer);
|
||||
}
|
||||
|
||||
static void artpec6_crypto_timeout(unsigned long data)
|
||||
static void artpec6_crypto_timeout(struct timer_list *t)
|
||||
{
|
||||
struct artpec6_crypto *ac = (struct artpec6_crypto *) data;
|
||||
struct artpec6_crypto *ac = from_timer(ac, t, timer);
|
||||
|
||||
dev_info_ratelimited(artpec6_crypto_dev, "timeout\n");
|
||||
|
||||
|
@ -3063,7 +3063,7 @@ static int artpec6_crypto_probe(struct platform_device *pdev)
|
|||
spin_lock_init(&ac->queue_lock);
|
||||
INIT_LIST_HEAD(&ac->queue);
|
||||
INIT_LIST_HEAD(&ac->pending);
|
||||
setup_timer(&ac->timer, artpec6_crypto_timeout, (unsigned long) ac);
|
||||
timer_setup(&ac->timer, artpec6_crypto_timeout, 0);
|
||||
|
||||
ac->base = base;
|
||||
|
||||
|
|
|
@ -149,7 +149,7 @@ struct mv_req_hash_ctx {
|
|||
int count_add;
|
||||
};
|
||||
|
||||
static void mv_completion_timer_callback(unsigned long unused)
|
||||
static void mv_completion_timer_callback(struct timer_list *unused)
|
||||
{
|
||||
int active = readl(cpg->reg + SEC_ACCEL_CMD) & SEC_CMD_EN_SEC_ACCL0;
|
||||
|
||||
|
@ -167,7 +167,7 @@ static void mv_completion_timer_callback(unsigned long unused)
|
|||
|
||||
static void mv_setup_timer(void)
|
||||
{
|
||||
setup_timer(&cpg->completion_timer, &mv_completion_timer_callback, 0);
|
||||
timer_setup(&cpg->completion_timer, mv_completion_timer_callback, 0);
|
||||
mod_timer(&cpg->completion_timer,
|
||||
jiffies + msecs_to_jiffies(MV_CESA_EXPIRE));
|
||||
}
|
||||
|
|
|
@ -1125,9 +1125,9 @@ static irqreturn_t spacc_spacc_irq(int irq, void *dev)
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void spacc_packet_timeout(unsigned long data)
|
||||
static void spacc_packet_timeout(struct timer_list *t)
|
||||
{
|
||||
struct spacc_engine *engine = (struct spacc_engine *)data;
|
||||
struct spacc_engine *engine = from_timer(engine, t, packet_timeout);
|
||||
|
||||
spacc_process_done(engine);
|
||||
}
|
||||
|
@ -1714,8 +1714,7 @@ static int spacc_probe(struct platform_device *pdev)
|
|||
writel(SPA_IRQ_EN_STAT_EN | SPA_IRQ_EN_GLBL_EN,
|
||||
engine->regs + SPA_IRQ_EN_REG_OFFSET);
|
||||
|
||||
setup_timer(&engine->packet_timeout, spacc_packet_timeout,
|
||||
(unsigned long)engine);
|
||||
timer_setup(&engine->packet_timeout, spacc_packet_timeout, 0);
|
||||
|
||||
INIT_LIST_HEAD(&engine->pending);
|
||||
INIT_LIST_HEAD(&engine->completed);
|
||||
|
|
|
@ -137,9 +137,9 @@ int fw_cancel_transaction(struct fw_card *card,
|
|||
}
|
||||
EXPORT_SYMBOL(fw_cancel_transaction);
|
||||
|
||||
static void split_transaction_timeout_callback(unsigned long data)
|
||||
static void split_transaction_timeout_callback(struct timer_list *timer)
|
||||
{
|
||||
struct fw_transaction *t = (struct fw_transaction *)data;
|
||||
struct fw_transaction *t = from_timer(t, timer, split_timeout_timer);
|
||||
struct fw_card *card = t->card;
|
||||
unsigned long flags;
|
||||
|
||||
|
@ -373,8 +373,8 @@ void fw_send_request(struct fw_card *card, struct fw_transaction *t, int tcode,
|
|||
t->tlabel = tlabel;
|
||||
t->card = card;
|
||||
t->is_split_transaction = false;
|
||||
setup_timer(&t->split_timeout_timer,
|
||||
split_transaction_timeout_callback, (unsigned long)t);
|
||||
timer_setup(&t->split_timeout_timer,
|
||||
split_transaction_timeout_callback, 0);
|
||||
t->callback = callback;
|
||||
t->callback_data = callback_data;
|
||||
|
||||
|
@ -423,7 +423,7 @@ int fw_run_transaction(struct fw_card *card, int tcode, int destination_id,
|
|||
struct transaction_callback_data d;
|
||||
struct fw_transaction t;
|
||||
|
||||
init_timer_on_stack(&t.split_timeout_timer);
|
||||
timer_setup_on_stack(&t.split_timeout_timer, NULL, 0);
|
||||
init_completion(&d.done);
|
||||
d.payload = payload;
|
||||
fw_send_request(card, &t, tcode, destination_id, generation, speed,
|
||||
|
|
|
@ -975,9 +975,9 @@ static void hangcheck_timer_reset(struct etnaviv_gpu *gpu)
|
|||
round_jiffies_up(jiffies + DRM_ETNAVIV_HANGCHECK_JIFFIES));
|
||||
}
|
||||
|
||||
static void hangcheck_handler(unsigned long data)
|
||||
static void hangcheck_handler(struct timer_list *t)
|
||||
{
|
||||
struct etnaviv_gpu *gpu = (struct etnaviv_gpu *)data;
|
||||
struct etnaviv_gpu *gpu = from_timer(gpu, t, hangcheck_timer);
|
||||
u32 fence = gpu->completed_fence;
|
||||
bool progress = false;
|
||||
|
||||
|
@ -1648,8 +1648,7 @@ static int etnaviv_gpu_bind(struct device *dev, struct device *master,
|
|||
INIT_WORK(&gpu->recover_work, recover_worker);
|
||||
init_waitqueue_head(&gpu->fence_event);
|
||||
|
||||
setup_deferrable_timer(&gpu->hangcheck_timer, hangcheck_handler,
|
||||
(unsigned long)gpu);
|
||||
timer_setup(&gpu->hangcheck_timer, hangcheck_handler, TIMER_DEFERRABLE);
|
||||
|
||||
priv->gpu[priv->num_gpus++] = gpu;
|
||||
|
||||
|
|
|
@ -23,9 +23,9 @@
|
|||
#include "psb_intel_reg.h"
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
static void psb_lid_timer_func(unsigned long data)
|
||||
static void psb_lid_timer_func(struct timer_list *t)
|
||||
{
|
||||
struct drm_psb_private * dev_priv = (struct drm_psb_private *)data;
|
||||
struct drm_psb_private *dev_priv = from_timer(dev_priv, t, lid_timer);
|
||||
struct drm_device *dev = (struct drm_device *)dev_priv->dev;
|
||||
struct timer_list *lid_timer = &dev_priv->lid_timer;
|
||||
unsigned long irq_flags;
|
||||
|
@ -77,10 +77,8 @@ void psb_lid_timer_init(struct drm_psb_private *dev_priv)
|
|||
spin_lock_init(&dev_priv->lid_lock);
|
||||
spin_lock_irqsave(&dev_priv->lid_lock, irq_flags);
|
||||
|
||||
init_timer(lid_timer);
|
||||
timer_setup(lid_timer, psb_lid_timer_func, 0);
|
||||
|
||||
lid_timer->data = (unsigned long)dev_priv;
|
||||
lid_timer->function = psb_lid_timer_func;
|
||||
lid_timer->expires = jiffies + PSB_LID_DELAY;
|
||||
|
||||
add_timer(lid_timer);
|
||||
|
|
|
@ -464,10 +464,10 @@ static void ssip_error(struct hsi_client *cl)
|
|||
hsi_async_read(cl, msg);
|
||||
}
|
||||
|
||||
static void ssip_keep_alive(unsigned long data)
|
||||
static void ssip_keep_alive(struct timer_list *t)
|
||||
{
|
||||
struct hsi_client *cl = (struct hsi_client *)data;
|
||||
struct ssi_protocol *ssi = hsi_client_drvdata(cl);
|
||||
struct ssi_protocol *ssi = from_timer(ssi, t, keep_alive);
|
||||
struct hsi_client *cl = ssi->cl;
|
||||
|
||||
dev_dbg(&cl->device, "Keep alive kick in: m(%d) r(%d) s(%d)\n",
|
||||
ssi->main_state, ssi->recv_state, ssi->send_state);
|
||||
|
@ -490,9 +490,19 @@ static void ssip_keep_alive(unsigned long data)
|
|||
spin_unlock(&ssi->lock);
|
||||
}
|
||||
|
||||
static void ssip_wd(unsigned long data)
|
||||
static void ssip_rx_wd(struct timer_list *t)
|
||||
{
|
||||
struct hsi_client *cl = (struct hsi_client *)data;
|
||||
struct ssi_protocol *ssi = from_timer(ssi, t, rx_wd);
|
||||
struct hsi_client *cl = ssi->cl;
|
||||
|
||||
dev_err(&cl->device, "Watchdog trigerred\n");
|
||||
ssip_error(cl);
|
||||
}
|
||||
|
||||
static void ssip_tx_wd(struct timer_list *t)
|
||||
{
|
||||
struct ssi_protocol *ssi = from_timer(ssi, t, tx_wd);
|
||||
struct hsi_client *cl = ssi->cl;
|
||||
|
||||
dev_err(&cl->device, "Watchdog trigerred\n");
|
||||
ssip_error(cl);
|
||||
|
@ -1084,15 +1094,9 @@ static int ssi_protocol_probe(struct device *dev)
|
|||
}
|
||||
|
||||
spin_lock_init(&ssi->lock);
|
||||
init_timer_deferrable(&ssi->rx_wd);
|
||||
init_timer_deferrable(&ssi->tx_wd);
|
||||
init_timer(&ssi->keep_alive);
|
||||
ssi->rx_wd.data = (unsigned long)cl;
|
||||
ssi->rx_wd.function = ssip_wd;
|
||||
ssi->tx_wd.data = (unsigned long)cl;
|
||||
ssi->tx_wd.function = ssip_wd;
|
||||
ssi->keep_alive.data = (unsigned long)cl;
|
||||
ssi->keep_alive.function = ssip_keep_alive;
|
||||
timer_setup(&ssi->rx_wd, ssip_rx_wd, TIMER_DEFERRABLE);
|
||||
timer_setup(&ssi->tx_wd, ssip_tx_wd, TIMER_DEFERRABLE);
|
||||
timer_setup(&ssi->keep_alive, ssip_keep_alive, 0);
|
||||
INIT_LIST_HEAD(&ssi->txqueue);
|
||||
INIT_LIST_HEAD(&ssi->cmdqueue);
|
||||
atomic_set(&ssi->tx_usecnt, 0);
|
||||
|
|
|
@ -611,9 +611,9 @@ static int drive_is_ready(ide_drive_t *drive)
|
|||
* logic that wants cleaning up.
|
||||
*/
|
||||
|
||||
void ide_timer_expiry (unsigned long data)
|
||||
void ide_timer_expiry (struct timer_list *t)
|
||||
{
|
||||
ide_hwif_t *hwif = (ide_hwif_t *)data;
|
||||
ide_hwif_t *hwif = from_timer(hwif, t, timer);
|
||||
ide_drive_t *uninitialized_var(drive);
|
||||
ide_handler_t *handler;
|
||||
unsigned long flags;
|
||||
|
|
|
@ -1184,7 +1184,7 @@ static void ide_init_port_data(ide_hwif_t *hwif, unsigned int index)
|
|||
|
||||
spin_lock_init(&hwif->lock);
|
||||
|
||||
setup_timer(&hwif->timer, &ide_timer_expiry, (unsigned long)hwif);
|
||||
timer_setup(&hwif->timer, ide_timer_expiry, 0);
|
||||
|
||||
init_completion(&hwif->gendev_rel_comp);
|
||||
|
||||
|
|
|
@ -145,7 +145,7 @@ static void touch_timer_fire(unsigned long data)
|
|||
}
|
||||
}
|
||||
|
||||
static DEFINE_TIMER(touch_timer, touch_timer_fire, 0, 0);
|
||||
static DEFINE_TIMER(touch_timer, touch_timer_fire);
|
||||
|
||||
/**
|
||||
* stylus_irq - touchscreen stylus event interrupt
|
||||
|
|
|
@ -103,7 +103,7 @@ static DEFINE_MUTEX(smu_part_access);
|
|||
static int smu_irq_inited;
|
||||
static unsigned long smu_cmdbuf_abs;
|
||||
|
||||
static void smu_i2c_retry(unsigned long data);
|
||||
static void smu_i2c_retry(struct timer_list *t);
|
||||
|
||||
/*
|
||||
* SMU driver low level stuff
|
||||
|
@ -582,9 +582,7 @@ static int smu_late_init(void)
|
|||
if (!smu)
|
||||
return 0;
|
||||
|
||||
init_timer(&smu->i2c_timer);
|
||||
smu->i2c_timer.function = smu_i2c_retry;
|
||||
smu->i2c_timer.data = (unsigned long)smu;
|
||||
timer_setup(&smu->i2c_timer, smu_i2c_retry, 0);
|
||||
|
||||
if (smu->db_node) {
|
||||
smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
|
||||
|
@ -755,7 +753,7 @@ static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
|
|||
}
|
||||
|
||||
|
||||
static void smu_i2c_retry(unsigned long data)
|
||||
static void smu_i2c_retry(struct timer_list *unused)
|
||||
{
|
||||
struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
|
||||
|
||||
|
@ -795,7 +793,7 @@ static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
|
|||
BUG_ON(cmd != smu->cmd_i2c_cur);
|
||||
if (!smu_irq_inited) {
|
||||
mdelay(5);
|
||||
smu_i2c_retry(0);
|
||||
smu_i2c_retry(NULL);
|
||||
return;
|
||||
}
|
||||
mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
|
||||
|
|
|
@ -57,6 +57,7 @@ struct altera_mbox {
|
|||
|
||||
/* If the controller supports only RX polling mode */
|
||||
struct timer_list rxpoll_timer;
|
||||
struct mbox_chan *chan;
|
||||
};
|
||||
|
||||
static struct altera_mbox *mbox_chan_to_altera_mbox(struct mbox_chan *chan)
|
||||
|
@ -138,12 +139,11 @@ static void altera_mbox_rx_data(struct mbox_chan *chan)
|
|||
}
|
||||
}
|
||||
|
||||
static void altera_mbox_poll_rx(unsigned long data)
|
||||
static void altera_mbox_poll_rx(struct timer_list *t)
|
||||
{
|
||||
struct mbox_chan *chan = (struct mbox_chan *)data;
|
||||
struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan);
|
||||
struct altera_mbox *mbox = from_timer(mbox, t, rxpoll_timer);
|
||||
|
||||
altera_mbox_rx_data(chan);
|
||||
altera_mbox_rx_data(mbox->chan);
|
||||
|
||||
mod_timer(&mbox->rxpoll_timer,
|
||||
jiffies + msecs_to_jiffies(MBOX_POLLING_MS));
|
||||
|
@ -206,8 +206,8 @@ static int altera_mbox_startup_receiver(struct mbox_chan *chan)
|
|||
|
||||
polling:
|
||||
/* Setup polling timer */
|
||||
setup_timer(&mbox->rxpoll_timer, altera_mbox_poll_rx,
|
||||
(unsigned long)chan);
|
||||
mbox->chan = chan;
|
||||
timer_setup(&mbox->rxpoll_timer, altera_mbox_poll_rx, 0);
|
||||
mod_timer(&mbox->rxpoll_timer,
|
||||
jiffies + msecs_to_jiffies(MBOX_POLLING_MS));
|
||||
|
||||
|
|
|
@ -330,10 +330,10 @@ static void pvr2_hdw_state_log_state(struct pvr2_hdw *);
|
|||
static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl);
|
||||
static int pvr2_hdw_commit_setup(struct pvr2_hdw *hdw);
|
||||
static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw);
|
||||
static void pvr2_hdw_quiescent_timeout(unsigned long);
|
||||
static void pvr2_hdw_decoder_stabilization_timeout(unsigned long);
|
||||
static void pvr2_hdw_encoder_wait_timeout(unsigned long);
|
||||
static void pvr2_hdw_encoder_run_timeout(unsigned long);
|
||||
static void pvr2_hdw_quiescent_timeout(struct timer_list *);
|
||||
static void pvr2_hdw_decoder_stabilization_timeout(struct timer_list *);
|
||||
static void pvr2_hdw_encoder_wait_timeout(struct timer_list *);
|
||||
static void pvr2_hdw_encoder_run_timeout(struct timer_list *);
|
||||
static int pvr2_issue_simple_cmd(struct pvr2_hdw *,u32);
|
||||
static int pvr2_send_request_ex(struct pvr2_hdw *hdw,
|
||||
unsigned int timeout,int probe_fl,
|
||||
|
@ -2373,18 +2373,15 @@ struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf,
|
|||
}
|
||||
if (!hdw) goto fail;
|
||||
|
||||
setup_timer(&hdw->quiescent_timer, pvr2_hdw_quiescent_timeout,
|
||||
(unsigned long)hdw);
|
||||
timer_setup(&hdw->quiescent_timer, pvr2_hdw_quiescent_timeout, 0);
|
||||
|
||||
setup_timer(&hdw->decoder_stabilization_timer,
|
||||
pvr2_hdw_decoder_stabilization_timeout,
|
||||
(unsigned long)hdw);
|
||||
timer_setup(&hdw->decoder_stabilization_timer,
|
||||
pvr2_hdw_decoder_stabilization_timeout, 0);
|
||||
|
||||
setup_timer(&hdw->encoder_wait_timer, pvr2_hdw_encoder_wait_timeout,
|
||||
(unsigned long)hdw);
|
||||
timer_setup(&hdw->encoder_wait_timer, pvr2_hdw_encoder_wait_timeout,
|
||||
0);
|
||||
|
||||
setup_timer(&hdw->encoder_run_timer, pvr2_hdw_encoder_run_timeout,
|
||||
(unsigned long)hdw);
|
||||
timer_setup(&hdw->encoder_run_timer, pvr2_hdw_encoder_run_timeout, 0);
|
||||
|
||||
hdw->master_state = PVR2_STATE_DEAD;
|
||||
|
||||
|
@ -3539,10 +3536,16 @@ static void pvr2_ctl_read_complete(struct urb *urb)
|
|||
complete(&hdw->ctl_done);
|
||||
}
|
||||
|
||||
struct hdw_timer {
|
||||
struct timer_list timer;
|
||||
struct pvr2_hdw *hdw;
|
||||
};
|
||||
|
||||
static void pvr2_ctl_timeout(unsigned long data)
|
||||
static void pvr2_ctl_timeout(struct timer_list *t)
|
||||
{
|
||||
struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
|
||||
struct hdw_timer *timer = from_timer(timer, t, timer);
|
||||
struct pvr2_hdw *hdw = timer->hdw;
|
||||
|
||||
if (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) {
|
||||
hdw->ctl_timeout_flag = !0;
|
||||
if (hdw->ctl_write_pend_flag)
|
||||
|
@ -3564,7 +3567,10 @@ static int pvr2_send_request_ex(struct pvr2_hdw *hdw,
|
|||
{
|
||||
unsigned int idx;
|
||||
int status = 0;
|
||||
struct timer_list timer;
|
||||
struct hdw_timer timer = {
|
||||
.hdw = hdw,
|
||||
};
|
||||
|
||||
if (!hdw->ctl_lock_held) {
|
||||
pvr2_trace(PVR2_TRACE_ERROR_LEGS,
|
||||
"Attempted to execute control transfer without lock!!");
|
||||
|
@ -3621,8 +3627,8 @@ static int pvr2_send_request_ex(struct pvr2_hdw *hdw,
|
|||
hdw->ctl_timeout_flag = 0;
|
||||
hdw->ctl_write_pend_flag = 0;
|
||||
hdw->ctl_read_pend_flag = 0;
|
||||
setup_timer(&timer, pvr2_ctl_timeout, (unsigned long)hdw);
|
||||
timer.expires = jiffies + timeout;
|
||||
timer_setup_on_stack(&timer.timer, pvr2_ctl_timeout, 0);
|
||||
timer.timer.expires = jiffies + timeout;
|
||||
|
||||
if (write_len && write_data) {
|
||||
hdw->cmd_debug_state = 2;
|
||||
|
@ -3677,7 +3683,7 @@ status);
|
|||
}
|
||||
|
||||
/* Start timer */
|
||||
add_timer(&timer);
|
||||
add_timer(&timer.timer);
|
||||
|
||||
/* Now wait for all I/O to complete */
|
||||
hdw->cmd_debug_state = 4;
|
||||
|
@ -3687,7 +3693,7 @@ status);
|
|||
hdw->cmd_debug_state = 5;
|
||||
|
||||
/* Stop timer */
|
||||
del_timer_sync(&timer);
|
||||
del_timer_sync(&timer.timer);
|
||||
|
||||
hdw->cmd_debug_state = 6;
|
||||
status = 0;
|
||||
|
@ -3769,6 +3775,8 @@ status);
|
|||
if ((status < 0) && (!probe_fl)) {
|
||||
pvr2_hdw_render_useless(hdw);
|
||||
}
|
||||
destroy_timer_on_stack(&timer.timer);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
|
@ -4366,9 +4374,9 @@ static int state_eval_encoder_run(struct pvr2_hdw *hdw)
|
|||
|
||||
|
||||
/* Timeout function for quiescent timer. */
|
||||
static void pvr2_hdw_quiescent_timeout(unsigned long data)
|
||||
static void pvr2_hdw_quiescent_timeout(struct timer_list *t)
|
||||
{
|
||||
struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
|
||||
struct pvr2_hdw *hdw = from_timer(hdw, t, quiescent_timer);
|
||||
hdw->state_decoder_quiescent = !0;
|
||||
trace_stbit("state_decoder_quiescent",hdw->state_decoder_quiescent);
|
||||
hdw->state_stale = !0;
|
||||
|
@ -4377,9 +4385,9 @@ static void pvr2_hdw_quiescent_timeout(unsigned long data)
|
|||
|
||||
|
||||
/* Timeout function for decoder stabilization timer. */
|
||||
static void pvr2_hdw_decoder_stabilization_timeout(unsigned long data)
|
||||
static void pvr2_hdw_decoder_stabilization_timeout(struct timer_list *t)
|
||||
{
|
||||
struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
|
||||
struct pvr2_hdw *hdw = from_timer(hdw, t, decoder_stabilization_timer);
|
||||
hdw->state_decoder_ready = !0;
|
||||
trace_stbit("state_decoder_ready", hdw->state_decoder_ready);
|
||||
hdw->state_stale = !0;
|
||||
|
@ -4388,9 +4396,9 @@ static void pvr2_hdw_decoder_stabilization_timeout(unsigned long data)
|
|||
|
||||
|
||||
/* Timeout function for encoder wait timer. */
|
||||
static void pvr2_hdw_encoder_wait_timeout(unsigned long data)
|
||||
static void pvr2_hdw_encoder_wait_timeout(struct timer_list *t)
|
||||
{
|
||||
struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
|
||||
struct pvr2_hdw *hdw = from_timer(hdw, t, encoder_wait_timer);
|
||||
hdw->state_encoder_waitok = !0;
|
||||
trace_stbit("state_encoder_waitok",hdw->state_encoder_waitok);
|
||||
hdw->state_stale = !0;
|
||||
|
@ -4399,9 +4407,9 @@ static void pvr2_hdw_encoder_wait_timeout(unsigned long data)
|
|||
|
||||
|
||||
/* Timeout function for encoder run timer. */
|
||||
static void pvr2_hdw_encoder_run_timeout(unsigned long data)
|
||||
static void pvr2_hdw_encoder_run_timeout(struct timer_list *t)
|
||||
{
|
||||
struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
|
||||
struct pvr2_hdw *hdw = from_timer(hdw, t, encoder_run_timer);
|
||||
if (!hdw->state_encoder_runok) {
|
||||
hdw->state_encoder_runok = !0;
|
||||
trace_stbit("state_encoder_runok",hdw->state_encoder_runok);
|
||||
|
|
|
@ -59,6 +59,7 @@ struct jmb38x_ms_host {
|
|||
unsigned int block_pos;
|
||||
unsigned long timeout_jiffies;
|
||||
struct timer_list timer;
|
||||
struct memstick_host *msh;
|
||||
struct memstick_request *req;
|
||||
unsigned char cmd_flags;
|
||||
unsigned char io_pos;
|
||||
|
@ -592,10 +593,10 @@ static irqreturn_t jmb38x_ms_isr(int irq, void *dev_id)
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void jmb38x_ms_abort(unsigned long data)
|
||||
static void jmb38x_ms_abort(struct timer_list *t)
|
||||
{
|
||||
struct memstick_host *msh = (struct memstick_host *)data;
|
||||
struct jmb38x_ms_host *host = memstick_priv(msh);
|
||||
struct jmb38x_ms_host *host = from_timer(host, t, timer);
|
||||
struct memstick_host *msh = host->msh;
|
||||
unsigned long flags;
|
||||
|
||||
dev_dbg(&host->chip->pdev->dev, "abort\n");
|
||||
|
@ -878,6 +879,7 @@ static struct memstick_host *jmb38x_ms_alloc_host(struct jmb38x_ms *jm, int cnt)
|
|||
return NULL;
|
||||
|
||||
host = memstick_priv(msh);
|
||||
host->msh = msh;
|
||||
host->chip = jm;
|
||||
host->addr = ioremap(pci_resource_start(jm->pdev, cnt),
|
||||
pci_resource_len(jm->pdev, cnt));
|
||||
|
@ -897,7 +899,7 @@ static struct memstick_host *jmb38x_ms_alloc_host(struct jmb38x_ms *jm, int cnt)
|
|||
|
||||
msh->caps = MEMSTICK_CAP_PAR4 | MEMSTICK_CAP_PAR8;
|
||||
|
||||
setup_timer(&host->timer, jmb38x_ms_abort, (unsigned long)msh);
|
||||
timer_setup(&host->timer, jmb38x_ms_abort, 0);
|
||||
|
||||
if (!request_irq(host->irq, jmb38x_ms_isr, IRQF_SHARED, host->host_id,
|
||||
msh))
|
||||
|
|
|
@ -616,9 +616,9 @@ static void r592_update_card_detect(struct r592_device *dev)
|
|||
}
|
||||
|
||||
/* Timer routine that fires 1 second after last card detection event, */
|
||||
static void r592_detect_timer(long unsigned int data)
|
||||
static void r592_detect_timer(struct timer_list *t)
|
||||
{
|
||||
struct r592_device *dev = (struct r592_device *)data;
|
||||
struct r592_device *dev = from_timer(dev, t, detect_timer);
|
||||
r592_update_card_detect(dev);
|
||||
memstick_detect_change(dev->host);
|
||||
}
|
||||
|
@ -770,8 +770,7 @@ static int r592_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|||
spin_lock_init(&dev->io_thread_lock);
|
||||
init_completion(&dev->dma_done);
|
||||
INIT_KFIFO(dev->pio_fifo);
|
||||
setup_timer(&dev->detect_timer,
|
||||
r592_detect_timer, (long unsigned int)dev);
|
||||
timer_setup(&dev->detect_timer, r592_detect_timer, 0);
|
||||
|
||||
/* Host initialization */
|
||||
host->caps = MEMSTICK_CAP_PAR4;
|
||||
|
|
|
@ -538,9 +538,9 @@ static int tifm_ms_set_param(struct memstick_host *msh,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void tifm_ms_abort(unsigned long data)
|
||||
static void tifm_ms_abort(struct timer_list *t)
|
||||
{
|
||||
struct tifm_ms *host = (struct tifm_ms *)data;
|
||||
struct tifm_ms *host = from_timer(host, t, timer);
|
||||
|
||||
dev_dbg(&host->dev->dev, "status %x\n",
|
||||
readl(host->dev->addr + SOCK_MS_STATUS));
|
||||
|
@ -575,7 +575,7 @@ static int tifm_ms_probe(struct tifm_dev *sock)
|
|||
host->dev = sock;
|
||||
host->timeout_jiffies = msecs_to_jiffies(1000);
|
||||
|
||||
setup_timer(&host->timer, tifm_ms_abort, (unsigned long)host);
|
||||
timer_setup(&host->timer, tifm_ms_abort, 0);
|
||||
tasklet_init(&host->notify, tifm_ms_req_tasklet, (unsigned long)msh);
|
||||
|
||||
msh->request = tifm_ms_submit_req;
|
||||
|
|
|
@ -172,9 +172,9 @@ struct xpc_arch_operations xpc_arch_ops;
|
|||
* Timer function to enforce the timelimit on the partition disengage.
|
||||
*/
|
||||
static void
|
||||
xpc_timeout_partition_disengage(unsigned long data)
|
||||
xpc_timeout_partition_disengage(struct timer_list *t)
|
||||
{
|
||||
struct xpc_partition *part = (struct xpc_partition *)data;
|
||||
struct xpc_partition *part = from_timer(part, t, disengage_timer);
|
||||
|
||||
DBUG_ON(time_is_after_jiffies(part->disengage_timeout));
|
||||
|
||||
|
@ -190,7 +190,7 @@ xpc_timeout_partition_disengage(unsigned long data)
|
|||
* specify when the next timeout should occur.
|
||||
*/
|
||||
static void
|
||||
xpc_hb_beater(unsigned long dummy)
|
||||
xpc_hb_beater(struct timer_list *unused)
|
||||
{
|
||||
xpc_arch_ops.increment_heartbeat();
|
||||
|
||||
|
@ -205,8 +205,7 @@ static void
|
|||
xpc_start_hb_beater(void)
|
||||
{
|
||||
xpc_arch_ops.heartbeat_init();
|
||||
init_timer(&xpc_hb_timer);
|
||||
xpc_hb_timer.function = xpc_hb_beater;
|
||||
timer_setup(&xpc_hb_timer, xpc_hb_beater, 0);
|
||||
xpc_hb_beater(0);
|
||||
}
|
||||
|
||||
|
@ -931,10 +930,8 @@ xpc_setup_partitions(void)
|
|||
part->act_state = XPC_P_AS_INACTIVE;
|
||||
XPC_SET_REASON(part, 0, 0);
|
||||
|
||||
init_timer(&part->disengage_timer);
|
||||
part->disengage_timer.function =
|
||||
xpc_timeout_partition_disengage;
|
||||
part->disengage_timer.data = (unsigned long)part;
|
||||
timer_setup(&part->disengage_timer,
|
||||
xpc_timeout_partition_disengage, 0);
|
||||
|
||||
part->setup_state = XPC_P_SS_UNSET;
|
||||
init_waitqueue_head(&part->teardown_wq);
|
||||
|
|
|
@ -323,16 +323,16 @@ xpc_handle_notify_IRQ_sn2(int irq, void *dev_id)
|
|||
* was received.
|
||||
*/
|
||||
static void
|
||||
xpc_check_for_dropped_notify_IRQ_sn2(struct xpc_partition *part)
|
||||
xpc_check_for_dropped_notify_IRQ_sn2(struct timer_list *t)
|
||||
{
|
||||
struct xpc_partition_sn2 *part_sn2 = &part->sn.sn2;
|
||||
struct xpc_partition *part =
|
||||
from_timer(part, t, sn.sn2.dropped_notify_IRQ_timer);
|
||||
|
||||
if (xpc_part_ref(part)) {
|
||||
xpc_check_for_sent_chctl_flags_sn2(part);
|
||||
|
||||
part_sn2->dropped_notify_IRQ_timer.expires = jiffies +
|
||||
XPC_DROPPED_NOTIFY_IRQ_WAIT_INTERVAL;
|
||||
add_timer(&part_sn2->dropped_notify_IRQ_timer);
|
||||
t->expires = jiffies + XPC_DROPPED_NOTIFY_IRQ_WAIT_INTERVAL;
|
||||
add_timer(t);
|
||||
xpc_part_deref(part);
|
||||
}
|
||||
}
|
||||
|
@ -1232,10 +1232,7 @@ xpc_setup_ch_structures_sn2(struct xpc_partition *part)
|
|||
|
||||
/* Setup a timer to check for dropped notify IRQs */
|
||||
timer = &part_sn2->dropped_notify_IRQ_timer;
|
||||
init_timer(timer);
|
||||
timer->function =
|
||||
(void (*)(unsigned long))xpc_check_for_dropped_notify_IRQ_sn2;
|
||||
timer->data = (unsigned long)part;
|
||||
timer_setup(timer, xpc_check_for_dropped_notify_IRQ_sn2, 0);
|
||||
timer->expires = jiffies + XPC_DROPPED_NOTIFY_IRQ_WAIT_INTERVAL;
|
||||
add_timer(timer);
|
||||
|
||||
|
|
|
@ -166,8 +166,8 @@ static unsigned int network_rec_config_shadow = 0;
|
|||
static unsigned int network_tr_ctrl_shadow = 0;
|
||||
|
||||
/* Network speed indication. */
|
||||
static DEFINE_TIMER(speed_timer, NULL, 0, 0);
|
||||
static DEFINE_TIMER(clear_led_timer, NULL, 0, 0);
|
||||
static DEFINE_TIMER(speed_timer, NULL);
|
||||
static DEFINE_TIMER(clear_led_timer, NULL);
|
||||
static int current_speed; /* Speed read from transceiver */
|
||||
static int current_speed_selection; /* Speed selected by user */
|
||||
static unsigned long led_next_time;
|
||||
|
@ -175,7 +175,7 @@ static int led_active;
|
|||
static int rx_queue_len;
|
||||
|
||||
/* Duplex */
|
||||
static DEFINE_TIMER(duplex_timer, NULL, 0, 0);
|
||||
static DEFINE_TIMER(duplex_timer, NULL);
|
||||
static int full_duplex;
|
||||
static enum duplex current_duplex;
|
||||
|
||||
|
|
|
@ -4725,9 +4725,9 @@ static const struct net_device_ops qlge_netdev_ops = {
|
|||
.ndo_vlan_rx_kill_vid = qlge_vlan_rx_kill_vid,
|
||||
};
|
||||
|
||||
static void ql_timer(unsigned long data)
|
||||
static void ql_timer(struct timer_list *t)
|
||||
{
|
||||
struct ql_adapter *qdev = (struct ql_adapter *)data;
|
||||
struct ql_adapter *qdev = from_timer(qdev, t, timer);
|
||||
u32 var = 0;
|
||||
|
||||
var = ql_read32(qdev, STS);
|
||||
|
@ -4806,11 +4806,8 @@ static int qlge_probe(struct pci_dev *pdev,
|
|||
/* Start up the timer to trigger EEH if
|
||||
* the bus goes dead
|
||||
*/
|
||||
init_timer_deferrable(&qdev->timer);
|
||||
qdev->timer.data = (unsigned long)qdev;
|
||||
qdev->timer.function = ql_timer;
|
||||
qdev->timer.expires = jiffies + (5*HZ);
|
||||
add_timer(&qdev->timer);
|
||||
timer_setup(&qdev->timer, ql_timer, TIMER_DEFERRABLE);
|
||||
mod_timer(&qdev->timer, jiffies + (5*HZ));
|
||||
ql_link_off(qdev);
|
||||
ql_display_dev_info(ndev);
|
||||
atomic_set(&qdev->lb_count, 0);
|
||||
|
|
|
@ -608,9 +608,9 @@ static void tile_net_schedule_egress_timer(struct tile_net_cpu *info)
|
|||
* ISSUE: Maybe instead track number of expected completions, and free
|
||||
* only that many, resetting to zero if "pending" is ever false.
|
||||
*/
|
||||
static void tile_net_handle_egress_timer(unsigned long arg)
|
||||
static void tile_net_handle_egress_timer(struct timer_list *t)
|
||||
{
|
||||
struct tile_net_cpu *info = (struct tile_net_cpu *)arg;
|
||||
struct tile_net_cpu *info = from_timer(info, t, egress_timer);
|
||||
struct net_device *dev = info->napi.dev;
|
||||
|
||||
/* The timer is no longer scheduled. */
|
||||
|
@ -1004,9 +1004,8 @@ static void tile_net_register(void *dev_ptr)
|
|||
BUG();
|
||||
|
||||
/* Initialize the egress timer. */
|
||||
init_timer_pinned(&info->egress_timer);
|
||||
info->egress_timer.data = (long)info;
|
||||
info->egress_timer.function = tile_net_handle_egress_timer;
|
||||
timer_setup(&info->egress_timer, tile_net_handle_egress_timer,
|
||||
TIMER_PINNED);
|
||||
|
||||
u64_stats_init(&info->stats.syncp);
|
||||
|
||||
|
|
|
@ -157,7 +157,7 @@ static struct net_device *yam_devs[NR_PORTS];
|
|||
|
||||
static struct yam_mcs *yam_data;
|
||||
|
||||
static DEFINE_TIMER(yam_timer, NULL, 0, 0);
|
||||
static DEFINE_TIMER(yam_timer, NULL);
|
||||
|
||||
/* --------------------------------------------------------------------- */
|
||||
|
||||
|
|
|
@ -2325,9 +2325,9 @@ static netdev_tx_t vxlan_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
}
|
||||
|
||||
/* Walk the forwarding table and purge stale entries */
|
||||
static void vxlan_cleanup(unsigned long arg)
|
||||
static void vxlan_cleanup(struct timer_list *t)
|
||||
{
|
||||
struct vxlan_dev *vxlan = (struct vxlan_dev *) arg;
|
||||
struct vxlan_dev *vxlan = from_timer(vxlan, t, age_timer);
|
||||
unsigned long next_timer = jiffies + FDB_AGE_INTERVAL;
|
||||
unsigned int h;
|
||||
|
||||
|
@ -2647,9 +2647,7 @@ static void vxlan_setup(struct net_device *dev)
|
|||
INIT_LIST_HEAD(&vxlan->next);
|
||||
spin_lock_init(&vxlan->hash_lock);
|
||||
|
||||
init_timer_deferrable(&vxlan->age_timer);
|
||||
vxlan->age_timer.function = vxlan_cleanup;
|
||||
vxlan->age_timer.data = (unsigned long) vxlan;
|
||||
timer_setup(&vxlan->age_timer, vxlan_cleanup, TIMER_DEFERRABLE);
|
||||
|
||||
vxlan->dev = dev;
|
||||
|
||||
|
|
|
@ -276,8 +276,6 @@ static void cisco_timer(unsigned long arg)
|
|||
spin_unlock(&st->lock);
|
||||
|
||||
st->timer.expires = jiffies + st->settings.interval * HZ;
|
||||
st->timer.function = cisco_timer;
|
||||
st->timer.data = arg;
|
||||
add_timer(&st->timer);
|
||||
}
|
||||
|
||||
|
|
|
@ -644,8 +644,6 @@ static void fr_timer(unsigned long arg)
|
|||
state(hdlc)->settings.t391 * HZ;
|
||||
}
|
||||
|
||||
state(hdlc)->timer.function = fr_timer;
|
||||
state(hdlc)->timer.data = arg;
|
||||
add_timer(&state(hdlc)->timer);
|
||||
}
|
||||
|
||||
|
|
|
@ -60,9 +60,9 @@ void ath6kl_recovery_hb_event(struct ath6kl *ar, u32 cookie)
|
|||
ar->fw_recovery.hb_pending = false;
|
||||
}
|
||||
|
||||
static void ath6kl_recovery_hb_timer(unsigned long data)
|
||||
static void ath6kl_recovery_hb_timer(struct timer_list *t)
|
||||
{
|
||||
struct ath6kl *ar = (struct ath6kl *) data;
|
||||
struct ath6kl *ar = from_timer(ar, t, fw_recovery.hb_timer);
|
||||
int err;
|
||||
|
||||
if (test_bit(RECOVERY_CLEANUP, &ar->flag) ||
|
||||
|
@ -104,9 +104,8 @@ void ath6kl_recovery_init(struct ath6kl *ar)
|
|||
recovery->seq_num = 0;
|
||||
recovery->hb_misscnt = 0;
|
||||
ar->fw_recovery.hb_pending = false;
|
||||
ar->fw_recovery.hb_timer.function = ath6kl_recovery_hb_timer;
|
||||
ar->fw_recovery.hb_timer.data = (unsigned long) ar;
|
||||
init_timer_deferrable(&ar->fw_recovery.hb_timer);
|
||||
timer_setup(&ar->fw_recovery.hb_timer, ath6kl_recovery_hb_timer,
|
||||
TIMER_DEFERRABLE);
|
||||
|
||||
if (ar->fw_recovery.hb_poll)
|
||||
mod_timer(&ar->fw_recovery.hb_timer, jiffies +
|
||||
|
|
|
@ -519,7 +519,7 @@ exit:
|
|||
/* LED trigger */
|
||||
static int tx_activity;
|
||||
static void at76_ledtrig_tx_timerfunc(unsigned long data);
|
||||
static DEFINE_TIMER(ledtrig_tx_timer, at76_ledtrig_tx_timerfunc, 0, 0);
|
||||
static DEFINE_TIMER(ledtrig_tx_timer, at76_ledtrig_tx_timerfunc);
|
||||
DEFINE_LED_TRIGGER(ledtrig_tx);
|
||||
|
||||
static void at76_ledtrig_tx_timerfunc(unsigned long data)
|
||||
|
|
|
@ -44,10 +44,11 @@ static void parport_ieee1284_wakeup (struct parport *port)
|
|||
up (&port->physport->ieee1284.irq);
|
||||
}
|
||||
|
||||
static struct parport *port_from_cookie[PARPORT_MAX];
|
||||
static void timeout_waiting_on_port (unsigned long cookie)
|
||||
static void timeout_waiting_on_port (struct timer_list *t)
|
||||
{
|
||||
parport_ieee1284_wakeup (port_from_cookie[cookie % PARPORT_MAX]);
|
||||
struct parport *port = from_timer(port, t, timer);
|
||||
|
||||
parport_ieee1284_wakeup (port);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -69,27 +70,19 @@ static void timeout_waiting_on_port (unsigned long cookie)
|
|||
int parport_wait_event (struct parport *port, signed long timeout)
|
||||
{
|
||||
int ret;
|
||||
struct timer_list timer;
|
||||
|
||||
if (!port->physport->cad->timeout)
|
||||
/* Zero timeout is special, and we can't down() the
|
||||
semaphore. */
|
||||
return 1;
|
||||
|
||||
init_timer_on_stack(&timer);
|
||||
timer.expires = jiffies + timeout;
|
||||
timer.function = timeout_waiting_on_port;
|
||||
port_from_cookie[port->number % PARPORT_MAX] = port;
|
||||
timer.data = port->number;
|
||||
|
||||
add_timer (&timer);
|
||||
timer_setup(&port->timer, timeout_waiting_on_port, 0);
|
||||
mod_timer(&port->timer, jiffies + timeout);
|
||||
ret = down_interruptible (&port->physport->ieee1284.irq);
|
||||
if (!del_timer_sync(&timer) && !ret)
|
||||
if (!del_timer_sync(&port->timer) && !ret)
|
||||
/* Timed out. */
|
||||
ret = 1;
|
||||
|
||||
destroy_timer_on_stack(&timer);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -263,12 +263,12 @@ static int bcm63xx_pcmcia_get_status(struct pcmcia_socket *sock,
|
|||
/*
|
||||
* socket polling timer callback
|
||||
*/
|
||||
static void bcm63xx_pcmcia_poll(unsigned long data)
|
||||
static void bcm63xx_pcmcia_poll(struct timer_list *t)
|
||||
{
|
||||
struct bcm63xx_pcmcia_socket *skt;
|
||||
unsigned int stat, events;
|
||||
|
||||
skt = (struct bcm63xx_pcmcia_socket *)data;
|
||||
skt = from_timer(skt, t, timer);
|
||||
|
||||
spin_lock_bh(&skt->lock);
|
||||
|
||||
|
@ -392,7 +392,7 @@ static int bcm63xx_drv_pcmcia_probe(struct platform_device *pdev)
|
|||
sock->map_size = resource_size(skt->common_res);
|
||||
|
||||
/* initialize polling timer */
|
||||
setup_timer(&skt->timer, bcm63xx_pcmcia_poll, (unsigned long)skt);
|
||||
timer_setup(&skt->timer, bcm63xx_pcmcia_poll, 0);
|
||||
|
||||
/* initialize pcmcia control register, drive VS[12] to 0,
|
||||
* leave CB IDSEL to the old value since it is set by the PCI
|
||||
|
|
|
@ -86,9 +86,9 @@ static int bfin_cf_ss_init(struct pcmcia_socket *s)
|
|||
}
|
||||
|
||||
/* the timer is primarily to kick this socket's pccardd */
|
||||
static void bfin_cf_timer(unsigned long _cf)
|
||||
static void bfin_cf_timer(struct timer_list *t)
|
||||
{
|
||||
struct bfin_cf_socket *cf = (void *)_cf;
|
||||
struct bfin_cf_socket *cf = from_timer(cf, t, timer);
|
||||
unsigned short present = bfin_cf_present(cf->cd_pfx);
|
||||
|
||||
if (present != cf->present) {
|
||||
|
@ -227,7 +227,7 @@ static int bfin_cf_probe(struct platform_device *pdev)
|
|||
|
||||
cf->cd_pfx = cd_pfx;
|
||||
|
||||
setup_timer(&cf->timer, bfin_cf_timer, (unsigned long)cf);
|
||||
timer_setup(&cf->timer, bfin_cf_timer, 0);
|
||||
|
||||
cf->pdev = pdev;
|
||||
platform_set_drvdata(pdev, cf);
|
||||
|
|
|
@ -875,7 +875,7 @@ static irqreturn_t pcic_interrupt(int irq, void *dev)
|
|||
return IRQ_RETVAL(handled);
|
||||
} /* pcic_interrupt */
|
||||
|
||||
static void pcic_interrupt_wrapper(u_long data)
|
||||
static void pcic_interrupt_wrapper(struct timer_list *unused)
|
||||
{
|
||||
pcic_interrupt(0, NULL);
|
||||
poll_timer.expires = jiffies + poll_interval;
|
||||
|
@ -1289,9 +1289,7 @@ static int __init init_i82365(void)
|
|||
|
||||
/* Finally, schedule a polling interrupt */
|
||||
if (poll_interval != 0) {
|
||||
poll_timer.function = pcic_interrupt_wrapper;
|
||||
poll_timer.data = 0;
|
||||
init_timer(&poll_timer);
|
||||
timer_setup(&poll_timer, pcic_interrupt_wrapper, 0);
|
||||
poll_timer.expires = jiffies + poll_interval;
|
||||
add_timer(&poll_timer);
|
||||
}
|
||||
|
|
|
@ -80,9 +80,9 @@ static int omap_cf_ss_init(struct pcmcia_socket *s)
|
|||
}
|
||||
|
||||
/* the timer is primarily to kick this socket's pccardd */
|
||||
static void omap_cf_timer(unsigned long _cf)
|
||||
static void omap_cf_timer(struct timer_list *t)
|
||||
{
|
||||
struct omap_cf_socket *cf = (void *) _cf;
|
||||
struct omap_cf_socket *cf = from_timer(cf, t, timer);
|
||||
unsigned present = omap_cf_present();
|
||||
|
||||
if (present != cf->present) {
|
||||
|
@ -102,7 +102,9 @@ static void omap_cf_timer(unsigned long _cf)
|
|||
*/
|
||||
static irqreturn_t omap_cf_irq(int irq, void *_cf)
|
||||
{
|
||||
omap_cf_timer((unsigned long)_cf);
|
||||
struct omap_cf_socket *cf = (struct omap_cf_socket *)_cf;
|
||||
|
||||
omap_cf_timer(&cf->timer);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
@ -220,7 +222,7 @@ static int __init omap_cf_probe(struct platform_device *pdev)
|
|||
cf = kzalloc(sizeof *cf, GFP_KERNEL);
|
||||
if (!cf)
|
||||
return -ENOMEM;
|
||||
setup_timer(&cf->timer, omap_cf_timer, (unsigned long)cf);
|
||||
timer_setup(&cf->timer, omap_cf_timer, 0);
|
||||
|
||||
cf->pdev = pdev;
|
||||
platform_set_drvdata(pdev, cf);
|
||||
|
|
|
@ -234,9 +234,9 @@ static irqreturn_t pd6729_interrupt(int irq, void *dev)
|
|||
|
||||
/* socket functions */
|
||||
|
||||
static void pd6729_interrupt_wrapper(unsigned long data)
|
||||
static void pd6729_interrupt_wrapper(struct timer_list *t)
|
||||
{
|
||||
struct pd6729_socket *socket = (struct pd6729_socket *) data;
|
||||
struct pd6729_socket *socket = from_timer(socket, t, poll_timer);
|
||||
|
||||
pd6729_interrupt(0, (void *)socket);
|
||||
mod_timer(&socket->poll_timer, jiffies + HZ);
|
||||
|
@ -707,8 +707,7 @@ static int pd6729_pci_probe(struct pci_dev *dev,
|
|||
}
|
||||
} else {
|
||||
/* poll Card status change */
|
||||
setup_timer(&socket->poll_timer, pd6729_interrupt_wrapper,
|
||||
(unsigned long)socket);
|
||||
timer_setup(&socket->poll_timer, pd6729_interrupt_wrapper, 0);
|
||||
mod_timer(&socket->poll_timer, jiffies + HZ);
|
||||
}
|
||||
|
||||
|
|
|
@ -456,9 +456,9 @@ static void soc_common_check_status(struct soc_pcmcia_socket *skt)
|
|||
}
|
||||
|
||||
/* Let's poll for events in addition to IRQs since IRQ only is unreliable... */
|
||||
static void soc_common_pcmcia_poll_event(unsigned long dummy)
|
||||
static void soc_common_pcmcia_poll_event(struct timer_list *t)
|
||||
{
|
||||
struct soc_pcmcia_socket *skt = (struct soc_pcmcia_socket *)dummy;
|
||||
struct soc_pcmcia_socket *skt = from_timer(skt, t, poll_timer);
|
||||
debug(skt, 4, "polling for events\n");
|
||||
|
||||
mod_timer(&skt->poll_timer, jiffies + SOC_PCMCIA_POLL_PERIOD);
|
||||
|
@ -794,8 +794,7 @@ int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt)
|
|||
|
||||
skt->cs_state = dead_socket;
|
||||
|
||||
setup_timer(&skt->poll_timer, soc_common_pcmcia_poll_event,
|
||||
(unsigned long)skt);
|
||||
timer_setup(&skt->poll_timer, soc_common_pcmcia_poll_event, 0);
|
||||
skt->poll_timer.expires = jiffies + SOC_PCMCIA_POLL_PERIOD;
|
||||
|
||||
ret = request_resource(&iomem_resource, &skt->res_skt);
|
||||
|
|
|
@ -98,7 +98,7 @@ module_param(cycle_time, int, 0444);
|
|||
/*====================================================================*/
|
||||
|
||||
static irqreturn_t tcic_interrupt(int irq, void *dev);
|
||||
static void tcic_timer(u_long data);
|
||||
static void tcic_timer(struct timer_list *unused);
|
||||
static struct pccard_operations tcic_operations;
|
||||
|
||||
struct tcic_socket {
|
||||
|
@ -435,9 +435,7 @@ static int __init init_tcic(void)
|
|||
}
|
||||
|
||||
/* Set up polling */
|
||||
poll_timer.function = &tcic_timer;
|
||||
poll_timer.data = 0;
|
||||
init_timer(&poll_timer);
|
||||
timer_setup(&poll_timer, &tcic_timer, 0);
|
||||
|
||||
/* Build interrupt mask */
|
||||
printk(KERN_CONT ", %d sockets\n", sockets);
|
||||
|
@ -583,7 +581,7 @@ static irqreturn_t tcic_interrupt(int irq, void *dev)
|
|||
return IRQ_HANDLED;
|
||||
} /* tcic_interrupt */
|
||||
|
||||
static void tcic_timer(u_long data)
|
||||
static void tcic_timer(struct timer_list *unused)
|
||||
{
|
||||
pr_debug("tcic_timer()\n");
|
||||
tcic_timer_pending = 0;
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue