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ARM/dmaengine: edma: Merge the two drivers under drivers/dma/ 

Move the code out from arch/arm/common and merge it inside of the dmaengine
driver.
This change is done with as minimal (if eny) functional change to the code
as possible to avoid introducing regression.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
Peter Ujfalusi 2015-10-14 14:42:53 +03:00 committed by Vinod Koul
parent cef5b0da40
commit 2b6b3b7420
8 changed files with 1431 additions and 1587 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/Kconfig
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@ -736,7 +736,6 @@ config ARCH_DAVINCI
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
select HAVE_IDE
select TI_PRIV_EDMA
select USE_OF
select ZONE_DMA
help

3
arch/arm/common/Kconfig
View File

@ -17,6 +17,3 @@ config SHARP_PARAM
config SHARP_SCOOP
bool
config TI_PRIV_EDMA
bool

1
arch/arm/common/Makefile
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@ -15,6 +15,5 @@ obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o
CFLAGS_REMOVE_mcpm_entry.o = -pg
AFLAGS_mcpm_head.o := -march=armv7-a
AFLAGS_vlock.o := -march=armv7-a
obj-$(CONFIG_TI_PRIV_EDMA) += edma.o
obj-$(CONFIG_BL_SWITCHER) += bL_switcher.o
obj-$(CONFIG_BL_SWITCHER_DUMMY_IF) += bL_switcher_dummy_if.o

1431
arch/arm/common/edma.c
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File diff suppressed because it is too large Load Diff

1
arch/arm/mach-omap2/Kconfig
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@ -90,7 +90,6 @@ config ARCH_OMAP2PLUS
select OMAP_GPMC
select PINCTRL
select SOC_BUS
select TI_PRIV_EDMA
select OMAP_IRQCHIP
help
Systems based on OMAP2, OMAP3, OMAP4 or OMAP5

1
drivers/dma/Kconfig
View File

@ -486,7 +486,6 @@ config TI_EDMA
depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
select TI_PRIV_EDMA
default n
help
Enable support for the TI EDMA controller. This DMA

1506
drivers/dma/edma.c
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File diff suppressed because it is too large Load Diff

74
include/linux/platform_data/edma.h
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@ -41,37 +41,6 @@
#ifndef EDMA_H_
#define EDMA_H_
/* PaRAM slots are laid out like this */
struct edmacc_param {
u32 opt;
u32 src;
u32 a_b_cnt;
u32 dst;
u32 src_dst_bidx;
u32 link_bcntrld;
u32 src_dst_cidx;
u32 ccnt;
} __packed;
/* fields in edmacc_param.opt */
#define SAM BIT(0)
#define DAM BIT(1)
#define SYNCDIM BIT(2)
#define STATIC BIT(3)
#define EDMA_FWID (0x07 << 8)
#define TCCMODE BIT(11)
#define EDMA_TCC(t) ((t) << 12)
#define TCINTEN BIT(20)
#define ITCINTEN BIT(21)
#define TCCHEN BIT(22)
#define ITCCHEN BIT(23)
/*ch_status paramater of callback function possible values*/
#define EDMA_DMA_COMPLETE 1
#define EDMA_DMA_CC_ERROR 2
#define EDMA_DMA_TC1_ERROR 3
#define EDMA_DMA_TC2_ERROR 4
enum dma_event_q {
EVENTQ_0 = 0,
EVENTQ_1 = 1,
@ -84,49 +53,6 @@ enum dma_event_q {
#define EDMA_CTLR(i) ((i) >> 16)
#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
#define EDMA_CONT_PARAMS_ANY 1001
#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
#define EDMA_MAX_CC 2
struct edma;
struct edma *edma_get_data(struct device *edma_dev);
/* alloc/free DMA channels and their dedicated parameter RAM slots */
int edma_alloc_channel(struct edma *cc, int channel,
void (*callback)(unsigned channel, u16 ch_status, void *data),
void *data, enum dma_event_q);
void edma_free_channel(struct edma *cc, unsigned channel);
/* alloc/free parameter RAM slots */
int edma_alloc_slot(struct edma *cc, int slot);
void edma_free_slot(struct edma *cc, unsigned slot);
/* calls that operate on part of a parameter RAM slot */
dma_addr_t edma_get_position(struct edma *cc, unsigned slot, bool dst);
void edma_link(struct edma *cc, unsigned from, unsigned to);
/* calls that operate on an entire parameter RAM slot */
void edma_write_slot(struct edma *cc, unsigned slot,
const struct edmacc_param *params);
void edma_read_slot(struct edma *cc, unsigned slot,
struct edmacc_param *params);
/* channel control operations */
int edma_start(struct edma *cc, unsigned channel);
void edma_stop(struct edma *cc, unsigned channel);
void edma_clean_channel(struct edma *cc, unsigned channel);
void edma_pause(struct edma *cc, unsigned channel);
void edma_resume(struct edma *cc, unsigned channel);
int edma_trigger_channel(struct edma *cc, unsigned channel);
void edma_assign_channel_eventq(struct edma *cc, unsigned channel,
enum dma_event_q eventq_no);
struct edma_rsv_info {
const s16 (*rsv_chans)[2];