EDAC, altera: Add panic flag check to A10 IRQ
In preparation for additional memory module ECCs, the IRQ function will check a panic flag before doing a kernel panic on double bit errors. OCRAM uncorrectable errors cause a panic because sleep/resume functions and FPGA contents during sleep are stored in OCRAM. ECCs on peripheral FIFO buffers will not cause a kernel panic on DBERRs because the packet can be retried and therefore recovered. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1466603939-7526-3-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
This commit is contained in:
parent
44ec9b307e
commit
2b083d65ff
|
@ -897,6 +897,7 @@ static irqreturn_t altr_edac_a10_ecc_irq(int irq, void *dev_id)
|
|||
writel(ALTR_A10_ECC_DERRPENA,
|
||||
base + ALTR_A10_ECC_INTSTAT_OFST);
|
||||
edac_device_handle_ue(dci->edac_dev, 0, 0, dci->edac_dev_name);
|
||||
if (dci->data->panic)
|
||||
panic("\nEDAC:ECC_DEVICE[Uncorrectable errors]\n");
|
||||
|
||||
return IRQ_HANDLED;
|
||||
|
@ -936,6 +937,12 @@ static const struct edac_device_prv_data a10_ocramecc_data = {
|
|||
.set_err_ofst = ALTR_A10_ECC_INTTEST_OFST,
|
||||
.ecc_irq_handler = altr_edac_a10_ecc_irq,
|
||||
.inject_fops = &altr_edac_a10_device_inject_fops,
|
||||
/*
|
||||
* OCRAM panic on uncorrectable error because sleep/resume
|
||||
* functions and FPGA contents are stored in OCRAM. Prefer
|
||||
* a kernel panic over executing/loading corrupted data.
|
||||
*/
|
||||
.panic = true,
|
||||
};
|
||||
|
||||
#endif /* CONFIG_EDAC_ALTERA_OCRAM */
|
||||
|
|
|
@ -298,6 +298,7 @@ struct edac_device_prv_data {
|
|||
irqreturn_t (*ecc_irq_handler)(int irq, void *dev_id);
|
||||
int trig_alloc_sz;
|
||||
const struct file_operations *inject_fops;
|
||||
bool panic;
|
||||
};
|
||||
|
||||
struct altr_edac_device_dev {
|
||||
|
|
Loading…
Reference in New Issue